DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the amendments/remarks filed on 02/06/2020.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1,148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, is/are rejected under 35 U.S.C. 103 as being unpatentable over Xiong [US 9203321 B1] in view of Pan et al. [US 20150171746 A1] and Wachi et al. [US 9444402 B2].
Claim 1. Xiong [US 9203321 B1] discloses [Fig. 4], A voltage source for modulated DC voltages for amplifying the power of a reference signal having a static DC voltage source with at least one parallel capacitor, comprising:
voltage regulation (504) means for regulating the output voltage of the DC voltage
source; a first electronic switching element (Q1), which is connected in parallel to the DC voltage source and operable to be switched on or off by an unregulated controller,
a second electronic switching element (Q2), which is connected in series to the first electronic switching element and in parallel to the DC voltage source and operable to be switched on or off by the controller; a coil (L_boost), a smoothing capacitor (C1); a load (R_Load), which is connected in parallel to the smoothing capacitor.; 2. (Previously Presented) Voltage source as in claim 1, wherein both the first electronic switching element and the second electronic switching element are designed as field effect transistors.
3. (Previously Presented) Voltage source as in claim 1, wherein the first and the second electronic switching element are connected in phase opposition.
Xiong fails to disclose, the coil, which is connected in series to the first electronic switching element and in parallel to the second electronic switching element; the smoothing capacitor, which is connected in series to the coil; and the load, which is connected in parallel to the smoothing capacitor.
Pan et al. [US 20150171746 A1] teaches [Fig. 3], the coil (L1), which is connected in series to the first electronic switching element and in parallel to the second electronic switching element; and the smoothing capacitor (Cc), which is connected in series to the coil (L1); and a load, which is connected in parallel to the smoothing capacitor. (see Abstract; paras. 0011-0013, 0027, 0046)
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the circuit arrangement of Xiong to include the circuitry of Pan, because it provides reduced switching loss.
Wachi et al. [US 9444402 B2] teaches [Fig.2], wherein a high-frequency amplifier (111) is provided as the load (e.g. at out), which is additionally supplied with a high-frequency signal from a high-frequency oscillator (via 112).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the circuit arrangement of Xiong to include the circuitry of Wachi, because it provides improved noise mitigation.
Examiner Note: The combination would result in the parallel relationship between Xiong’s switches (Fig. 4,) and Pan’s LC circuit. (as Pan’s Fig. 3, LC incorporated into Xiong’s, Fig. 4, 512)
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xiong [US 9203321 B1] in view of Pan et al. [US 20150171746 A1].
17. Xiong [US 9203321 B1] discloses [Fig. 4], A voltage source for modulated DC voltages for amplifying the power of a reference signal having a static DC voltage source with at least one parallel capacitor, comprising:
voltage regulation means for regulating the output voltage of the DC voltage
source, a first electronic switching element(Q1), which is connected in parallel to the DC voltage source and operable to be switched on or off by an unregulated controller;
a second electronic switching element (Q2), which is connected in series to the first electronic switching element and in parallel to the DC voltage source and operable to be switched on or off by the controller;
a coil (Lboost), which is connected in series to the first electronic switching element and in parallel to the second electronic switching element,
a smoothing capacitor (C1, which is connected in series to the coil; wherein a filtering circuit (C_dc) is provided with a resonance coil and a resonance capacitor, and wherein the filtering circuit is arranged parallel to the smoothing capacitor; and a load, which is connected in parallel to the smoothing capacitor.
Xiong fails to disclose, wherein the filtering circuit is provided with the resonance coil and the resonance capacitor.
Pan et al. [US 20150171746 A1] teaches [Fig. 3], wherein a filtering circuit (LC) is provided with a resonance coil and a resonance capacitor, and wherein the filtering circuit is arranged parallel to the smoothing capacitor. (see Abstract; paras. 0011-0013, 0027, 0046)
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the circuit arrangement of Xiong to include the circuitry of Pan, because it provides reduced switching loss.
Examiner Note: The combination would result in the parallel relationship between Xiong’s switches (Fig. 4,) and Pan’s LC circuit. (as Pan’s Fig. 3, LC incorporated into Xiong’s, Fig. 4, 512)
Conclusion
Allowable Subject Matter
Claims 16, 18 are allowed.
The following is an Examiner' s statement of reasons for allowance:
Claim 16: The prior art of record fails to disc, 18 lose or suggest a voltage source for modulated DC voltages, includes: wherein the unregulated controller comprises at least one analog-to-digital converter and one digital controller, and wherein the digital controller has another analog-to-digital converter that is connected to the regulated DC voltage source and to the digital controller;
Claim 18: The prior art of record fails to disclose or suggest a voltage source for modulated DC voltages, includes: wherein the unregulated controller comprises, wherein a first voltage-limiting diode and a second voltage-limiting diode are switched in parallel to the second electronic switching element.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claim(s) 4-12, 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Examiner's Note(s)
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim(s), other passages and figures may apply as well.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied upon in order to ensure proper interpretation of the newly added limitations and to verify/ascertain the metes and bounds of the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HENRY E. LEE III whose telephone number is (571)270-1525. The examiner can normally be reached on 7:30a-5:00p (M-TH) (cst).
If attempts to reach the Examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HENRY E LEE III/Examiner, Art Unit 2838
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