Prosecution Insights
Last updated: April 19, 2026
Application No. 16/175,205

ANGLED SURFACE REMOVAL PROCESS AND STRUCTURE RELATING THERETO

Non-Final OA §103
Filed
Oct 30, 2018
Examiner
NGUYEN, SOPHIA T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Everspin Technologies Inc.
OA Round
9 (Non-Final)
45%
Grant Probability
Moderate
9-10
OA Rounds
2y 8m
To Grant
58%
With Interview

Examiner Intelligence

Grants 45% of resolved cases
45%
Career Allow Rate
230 granted / 509 resolved
-22.8% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
86 currently pending
Career history
595
Total Applications
across all art units

Statute-Specific Performance

§103
51.4%
+11.4% vs TC avg
§102
17.0%
-23.0% vs TC avg
§112
26.7%
-13.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 509 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/17/2025 has been entered. Response to Amendment Applicant’s amendment dated 12/17/2025, in which claims 1, 12, 24 were amended, claims 5-6, 9 and 16-17, 21, 23 were cancelled, has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 7, 10-15, 18-20, 22, 24-25 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (US Pub. 20060033133) in view of Chen (US Pub. 20020022335), Whig et al. (US Pub. 20110244599), Liu et al. (US Pat. 9960129), hereafter Liu129, Guo et al. (US Pat. 8084346) and Siddiqui et al. (US Pub. 20060162261). Regarding claims 1, 3 and 4, Liu et al. discloses in Fig. 3a-3e a method of fabricating an integrated circuit device, comprising: depositing a first dielectric material above a substrate [305] to form a layer of the first dielectric material [310][Fig. 3a, paragraph [0025], lines 3-7]; forming a first trench [315] through at least the layer of the first dielectric material [310][paragraph [0026]]; depositing a ferromagnetic material in the first trench [315] and on an exposed surface of the layer of the first dielectric material [310] to form a layer of the ferromagnetic material [320][Fig. 3b, paragraph [0028]; etching the layer of the ferromagnetic material [320] from the layer of the first dielectric material [310] to form a flux guide [330 and 335] comprising the layer of ferromagnetic material having a vertical surface and an upper surface, wherein the flux guide [330 and 335] comprises a pattern of the layer of the ferromagnetic material [320] in at least a shape [Fig. 3c, paragraph [0029]][the structure [330 and 335] of Liu is formed of ferromagnetic material [320], thus structure [330 and 335] is a flux guide as claimed]; depositing a second dielectric material [dielectric material for forming layers 340, 345] on the flux guide [330 and 335] and the exposed surface of the layer of the first dielectric material [310] to form a layer of the second dielectric material, the layer of the second dielectric material having a vertical surface conforming to the vertical surface of the ferromagnetic material, an upper surface corresponding to the upper surface of the ferromagnetic material, and a horizontal surface conforming to the exposed surface of the layer of the first dielectric material [Fig. 3d, paragraph [0032], “the dielectric MRAM stack layers 340, 345 may be formed by a CVD… forming the dielectric MRAM stack layers 340, 345 comprises conformally depositing a dielectric material layer over the material layer 310 and in the recess 315”]; before depositing any additional material over the layer of the second dielectric material, starting polishing of an exposed surface of the layer of the second dielectric material [dielectric layer for forming 340 and 345] by subjecting the exposed surface of the layer of the second dielectric material [dielectric layer for forming 340 and 345] to a first chemical mechanical polishing (CMP) process, and stopping the polishing when a top surface of the flux guide [330 and 335] and a top surface of the second dielectric material [340, 345] are exposed, such that the layer of the first dielectric material [310] on which the layer of the ferromagnetic material is deposited is exposed with the top surface of the flux guide [330 and 335] and the top surface of the second dielectric material [340, 345] [Fig. 3d, paragraph [0029], paragraph [0032], [0034]][See annotated drawing for illustration of paragraph [0032]]; and depositing an electrically conductive material in the first trench [315] to form a layer of electrically conductive material [350] extending over the top surface of the flux guide and the top surface of the second dielectric material [Fig. 3e, paragraph [0036]-[0037]][See annotated drawing for illustration of paragraph [0037]]; removing a portion of the electrically conductive material deposited on a top surface of the layer of the first dielectric material [310] by subjecting the portion of the electrically conductive material to a second CMP process [paragraph [0036]-[0037]]; wherein the step of etching the layer of the ferromagnetic material includes etching the deposited ferromagnetic material to form the flux guide [330 and 335] on a sidewall of the first trench [315]. PNG media_image1.png 359 1071 media_image1.png Greyscale PNG media_image2.png 397 1046 media_image2.png Greyscale Liu fails to disclose depositing the first dielectric material above the substrate to form the layer of the first dielectric material comprising: depositing an etch stop layer above the substrate; depositing the first dielectric material above the etch stop layer; forming a second trench through at least the first dielectric material; and depositing the electrically conductive material in the first trench and the second trench in a single deposition process to form the layer of electrically conductive material after the step of forming the second trench such that the electrically conductive material directly contacts a vertical surface of the second dielectric material in the first trench and vertical surfaces of the etch stop layer and first dielectric material in the second trench. Chen discloses in Figs. 5-6, paragraph [0067], [0077] depositing the first dielectric material above the substrate [10] to form the layer of the first dielectric material [56] comprising: depositing an etch stop layer [54] above the substrate [10]; depositing the first dielectric material [56] above the etch stop layer [54]; forming a second trench [62] through at least the first dielectric material [56]; and depositing the electrically conductive material [copper] in the first trench [58] and the second trench [62] in a single deposition process to form the layer of electrically conductive material after the step of forming the second trench [62] such that the electrically conductive material [copper] directly contacts a vertical surface of the second dielectric material [60] in the first trench [58] and vertical surfaces of the etch stop layer [54] and first dielectric material [56] in the second trench [62]. For further providing support for a method of forming an integrated structure including first and second trenches, Whig et al. is cited. Whig et al. discloses in Fig. 4, paragraph [0033]-[0040] forming a second trench [222] through at least the first dielectric material [206]; and depositing the electrically conductive material [226] in the first trench [208] and the second trench [222] to form the layer of electrically conductive material after the step of forming the second trench [222]; depositing the electrically conductive material [226] in the first trench [208] and the second trench [222] in a single deposition process [paragraph [0035], a conductive material 226, e.g., copper, is deposited 1016 in the first and second plurality of trenches 208, 222]. It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Chen and Whig et al. into the method of Liu to include depositing the first dielectric material above the substrate to form the layer of the first dielectric material comprising: depositing an etch stop layer above the substrate; depositing the first dielectric material above the etch stop layer; forming a second trench through at least the first dielectric material; and depositing the electrically conductive material in the first trench and the second trench in a single deposition process to form the layer of electrically conductive material after the step of forming the second trench such that the electrically conductive material directly contacts a vertical surface of the second dielectric material in the first trench and vertical surfaces of the etch stop layer and first dielectric material in the second trench. The ordinary artisan would have been motivated to modify Liu in the above manner for the purpose of creating isolation regions on the surface of a substrate; forming integrated structure comprising flux guide and conductive via for electrical connecting with upper device features; forming integrated structure having mixing of functions and processing capabilities [paragraph [0005], [0066] of Chen, paragraph [0035], [0037] of Whig et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Liu et al. fails to disclose the upper surface of the layer of the ferromagnetic material comprises an angled surface that is angled with respect to the vertical surface; the upper surface of the layer of the second dielectric material comprises an angled surface corresponding to the angled surface of the layer of the ferromagnetic material; subjecting the exposed surface of the layer of the second dielectric material to the first CMP process such that the entire angled surface of the layer of the ferromagnetic material and the entire angled surface of the layer of the second dielectric material are removed together in the same first CMP process; wherein the step of etching the layer of the ferromagnetic material includes etching the deposited ferromagnetic material to form the flux guide with the angled surface positioned proximate an opening of the first trench. However, Liu et al. discloses in paragraph [0029], that “one or more isotropic and/or anisotropic etching processes may be performed to define the magnetic MRAM stack layers 330, 335.” Liu further shows that the flux guide having a shape of a spacer. Guo et al. discloses in Fig. 8-Fig. 11, columns 4-5 etching a layer of a first material from a layer of the dielectric material [130] to form a spacer comprising the layer of the first material [120]; an upper surface of the layer of the first material [120] comprises an angled surface [164 that is angled with respect to the vertical surface of the layer of the first material [120][Fig. 8]; an upper surface of the layer of the second dielectric material [174] comprises an angled surface corresponding to the angled surface of the layer of the first material [120][Fig. 9]; subjecting the exposed surface [surface of layer 174 must be exposed before it is removed by CMP] of the layer of the second dielectric material [174] to the first CMP process such that the entire angled surface [164] of the layer of the first material [120] and the entire angled surface of the layer of the second dielectric material [174] are removed together in the same first CMP process [Fig. 11, column 5, lines 42-44, 63-64 “FIGS. 10 and 11 show the structure after subsequent and conventional processing, most notably, planarization, e.g., CMP…the planarization entirely removes angled entrance”]. wherein the step of etching the layer of the first material includes etching the deposited first material to form the spacer [120] on a sidewall of the first trench [140] with the angled surface [164] positioned proximate an opening of the first trench [140][Fig. 7-Fig. 8]. For further provide support evidence that it is a known technique for reducing chance of pinch off leading to voids inside the contact trench by forming a layer of a first material having an angled surface positioned proximate an opening of the trench, Liu129 is cited. Liu129 discloses in Fig. 9C-Fig. 9F etching a layer of a first material from a layer of the dielectric layer [161, 114, 121] to form a spacer comprising the layer of the first material [160B’][Fig. 9D]; an upper surface of the layer of the first material [160B’] comprises an angled surface [164] that is angled with respect to the vertical surface of the layer of the first material [160B’]; [Fig. 9D]; an upper surface of the layer of the second dielectric material [113] comprises an angled surface corresponding to the angled surface of the layer of the first material [160B’][Fig. 9E]; subjecting the exposed surface [the surface of 113 must be exposed before it is removed by CMP] of the layer of the second dielectric material [113] to the first CMP process such that the entire angled surface of the layer of the first material [160B’] and the entire angled surface of the layer of the second material [113] are removed together in the same first CMP process [Fig. 9F]; wherein the step of etching the layer of the first material includes etching the deposited first material to form the spacer [160B’] on a sidewall of the first trench with the angled surface positioned proximate an opening of the first trench [Fig. 9D] It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Guo et al. and Liu129 into the method of Liu et al. to include the upper surface of the layer of the ferromagnetic material comprises an angled surface that is angled with respect to the vertical surface; the upper surface of the layer of the second dielectric material comprises an angled surface corresponding to the angled surface of the layer of the ferromagnetic material; subjecting the exposed surface of the layer of the second dielectric material to the first CMP process such that the entire angled surface of the layer of the ferromagnetic material and the entire angled surface of the layer of the second dielectric material are removed together in the same first CMP process; wherein the step of etching the layer of the ferromagnetic material includes etching the deposited ferromagnetic material to form the flux guide with the angled surface positioned proximate an opening of the first trench. The ordinary artisan would have been motivated to modify Liu et al. in the above manner for the purpose of preventing the conductive material from forming voids in the first trench without violating any design ground rules of the trench dimension and depositing within the trench easier [column 9, lines 11-12 of Liu129; column 5, lines 35-41 of Guo et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Liu fails to explicitly discloses the first CMP process is an oxide-CMP; the second CMP process is a metal-CMP or copper-CMP. Liu et al. discloses in paragraph [0032] that the first CMP must be able to remove portions of both the dielectric material layer and the magnetic material layer “a planarizing process may remove portions of both the dielectric material layer and the magnetic material layer to expose the material layer 310.” Liu further discloses in paragraph [0034] that the dielectric material layer comprises oxides. Liu et al. discloses in paragraph [0036]-[0037] that electrically conductive material [350] comprises metal and is removed by CMP. Siddiqui et al. discloses in paragraph [0006] oxide CMP is utilized to achieve planarization of oxide dielectric layers and metal CMP is utilized to achieve planarization of metal layers. Thus, it would be obvious to select oxide-CMP based on its suitability for use as the first CMP process to remove material of the dielectric material layer comprises oxides in the device of Liu et al. And, it would be obvious to select metal-CMP based on its suitability for use as the second CMP process to remove the electrically conductive material in the device of Liu et al. Thus, it would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Siddiqui et al. into the method of Liu et al. to include the first CMP process is an oxide-CMP; the second CMP process is a metal-CMP. The ordinary artisan would have been motivated to modify Liu et al. in the above manner for the purpose of providing suitable CMP process to remove material of the dielectric material layer comprises oxides and to remove the electrically conductive material [paragraph [0006] of Siddiqui et al.]. In addition, paragraph [0018] of the original specification admitted that “Magnetic field sensor 100 is fabricated using conventional processes used in semiconductor processing.” Thus, absent unexpected results, it would have been obvious to try any one of the known CMP methods to yield a CMP method suitable for removing oxide material and/or metal material with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). In addition, when the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, claimed properties or functions are presumed to be inherent. Consequently, the combination of Liu et al., Siddiqui et al., Liu129 and Guo et al. would suggest every limitation of claim 1 including the limitation of “before depositing any additional material over the layer of the second dielectric material, starting polishing of an exposed surface of the layer of the second dielectric material by subjecting the exposed surface of the layer of the second dielectric material to an oxide-chemical mechanical polishing (CMP) process the entire angled surface of the layer of the ferromagnetic material and the entire angled surface of the layer of the second dielectric material are removed together in the same oxide-CMP process, and stopping the polishing when a top surface of the flux guide and a top surface of the second dielectric material are exposed, such that the layer of the first dielectric material on which the layer of the ferromagnetic material is deposited is exposed with the top surface of the flux guide and the top surface of the second dielectric material, thereby more effectively removing the angled surface of the layer of the ferromagnetic material than by a metal-CMP process.” Regarding claims 2, 14, 15, Liu et al. further discloses in paragraph [0028] wherein the ferromagnetic material [320] is an alloy including one or more of nickel, iron, cobalt, or boron [NiFe, NiFeCo, CoFe, Fe, Co, Ni, alloys or compounds thereof]; wherein the ferromagnetic material [320] is one of a nickel- iron alloy or a cobalt-iron-boron alloy [NiFe, NiFeCo]; wherein the ferromagnetic material [320] is an alloy including nickel and iron [NiFe, NiFeCo]. Whig et al. also discloses in paragraph [0033] wherein the ferromagnetic material [212] or [ 256] is an alloy including one or more of nickel, iron, cobalt, or boron [NiFe, NiFeCo]; wherein the ferromagnetic material [212] or [ 256] is one of a nickel- iron alloy or a cobalt-iron-boron alloy [NiFe, NiFeCo]; wherein the ferromagnetic material [212] or [ 256] is an alloy including nickel and iron [NiFe, NiFeCo]. Regarding claims 7 and 18, Liu et al. discloses in Fig. 3c, Fig. 3d, paragraph [0027] wherein the step of etching the ferromagnetic material [320] to form the flux guide [330 and 335] includes removing the deposited ferromagnetic material [320] from a base of the first trench to form the flux guide [330 and 335] having a thickness between 3 to 150 nm on a sidewall of the first trench [3-20nm]; wherein the step of etching the ferromagnetic material [320] includes forming the flux guide [330 and 335] having a thickness between 3 to 150 nm [3-20nm] on the sidewall of the first trench. Regarding claims 10 and 19, Liu et al. fails to disclose wherein depositing the electrically conductive material includes depositing copper in the first trench and the second trench. However, Liu et al. discloses in Fig. 5, Fig. 6, paragraph [0048] and paragraph [0052] wherein depositing the electrically conductive material [580 or 680] includes any electrically conductive materials. Whig discloses in Fig. 4, Fig. 8, paragraph [0035], paragraph [0040] wherein depositing the electrically conductive material [226] or [282] includes depositing copper in the first trench [208] or [252] and the second trench [222 or 224] or [272 or 274]. Chen discloses in Fig. 6, paragraph [0077] wherein depositing the electrically conductive material [66 and 70] includes depositing copper in the first trench [58] and the second trench [62]. It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Chen and Whig into the method of Liu et al. to include wherein depositing the electrically conductive material includes depositing copper in the first trench and the second trench. The ordinary artisan would have been motivated to modify Liu in the above manner for the purpose of providing suitable material of the electrically conductive material as needed to form conductive line to interconnect the MRAM stacks [paragraph [0035] of Whig and paragraph [0048] and paragraph [0052] of Liu et al.]. Regarding claims 11 and 20, Whig et al. further discloses in paragraph [0021], [0033], 0039] wherein the integrated circuit is a magnetic field sensor. Thus, the combination of Liu and Whig discloses limitation of claims 11 and 20. Regarding claims 12 and 13, Liu et al. discloses in Fig. 3a-3e a method of fabricating an integrated circuit device, comprising: depositing a first dielectric material above a substrate [305] to form a layer of the first dielectric material [310] [Fig. 3a, paragraph [0025], lines 3-7]; forming a first trench [315] through at least the layer of the first dielectric material [310][paragraph [0026]]; depositing a ferromagnetic material in the first trench [315] and on an exposed surface of the layer of the first dielectric material [310] to form a layer of the ferromagnetic material [320] [Fig. 3b, paragraph [0028]; etching the layer of the ferromagnetic material [320] to remove the deposited ferromagnetic material [320] from the layer of the first dielectric material [310] and from a base of the first trench [315] to form a flux guide [330 and 335] on a sidewall of the first trench [315], the flux guide [330 and 335] comprising the layer of the ferromagnetic material [320] having a vertical surface and an upper surface proximate an opening of the first trench [315], wherein the flux guide [330 and 335] comprises a pattern of the layer of the ferromagnetic material [320] in at least a shape [Fig. 3c, paragraph [0029]][the structure [330 and 335] of Liu is formed of ferromagnetic material [320] as claimed, thus structure [330 and 335] is equivalent to the claimed flux guide]; depositing a second dielectric material [dielectric material for forming layers 340, 345] on the flux guide [330 and 335] and the exposed surface of the layer of the first dielectric material [310] to form a layer of the second dielectric material, the layer of the second dielectric material having a vertical surface conforming to the vertical surface of the ferromagnetic material and an upper surface corresponding to the upper surface of the layer of the ferromagnetic material [320][Fig. 3d, paragraph [0032], “the dielectric MRAM stack layers 340, 345 may be formed by a CVD… forming the dielectric MRAM stack layers 340, 345 comprises conformally depositing a dielectric material layer over the material layer 310 and in the recess 315”][See annotated drawing for illustration of paragraph [0032]]; before depositing any additional material over the layer of the second dielectric material, starting polishing an exposed surface of the layer of the second dielectric material [layer of dielectric material for forming layers 340, 345] by subjecting the exposed surface of the layer of the second dielectric material [layer of dielectric material for forming layers 340, 345] to a first chemical mechanical polishing (CMP) process and stopping the polishing when a top surface of the flux guide [330 and 335] and a top surface of the second dielectric material [340, 345] are exposed, such that the layer of the first dielectric material [310] on which the layer of the ferromagnetic material [320] is deposited is exposed with the top surface of the flux guide [330 and 335] and the top surface of the second dielectric material [340, 345][Fig. 3d, paragraph [0029], paragraph [0032], [0034]]; and depositing an electrically conductive material in the first trench [315] to form a layer of electrically conductive material [350] extending over the top surface of the flux guide [330 and 335] and the top surface of the second dielectric material [340, 345][Fig. 3e, paragraph [0036]-[0037]][see annotated drawing for illustration of paragraph [0037]]; removing a portion of the electrically conductive material [350] deposited on a top surface of the layer of the first dielectric material [310] by subjecting the portion of the electrically conductive material [350] to a second CMP process [paragraph [0036]-[0037]]. PNG media_image1.png 359 1071 media_image1.png Greyscale PNG media_image3.png 397 1046 media_image3.png Greyscale Liu fails to disclose depositing the first dielectric material above the substrate to form the layer of the first dielectric material comprising: depositing an etch stop layer above the substrate; depositing the first dielectric material above the etch stop layer; forming a second trench through at least the first dielectric material; and depositing the electrically conductive material in the first trench and the second trench in a single deposition process to form the layer of electrically conductive material after the step of forming the second trench such that the electrically conductive material directly contacts a vertical surface of the second dielectric material in the first trench and vertical surfaces of the etch stop layer and first dielectric material in the second trench. Chen discloses in Figs. 5-6, paragraph [0067], [0077] depositing the first dielectric material above the substrate [10] to form the layer of the first dielectric material [56] comprising: depositing an etch stop layer [54] above the substrate [10]; depositing the first dielectric material [56] above the etch stop layer [54]; forming a second trench [62] through at least the first dielectric material [56]; and depositing the electrically conductive material [copper] in the first trench [58] and the second trench [62] in a single deposition process to form the layer of electrically conductive material after the step of forming the second trench [62] such that the electrically conductive material [copper] directly contacts a vertical surface of the second dielectric material [60] in the first trench [58] and vertical surfaces of the etch stop layer [54] and first dielectric material [56] in the second trench [62]. For further providing support for a method of forming an integrated structure including first and second trenches, Whig et al. is cited. Whig et al. discloses in Fig. 4, paragraph [0033]-[0040] forming a second trench [222] through at least the first dielectric material [206]; and depositing the electrically conductive material [226] in the first trench [208] and the second trench [222] to form the layer of electrically conductive material after the step of forming the second trench [222]; depositing the electrically conductive material [226] in the first trench [208] and the second trench [222] in a single deposition process [paragraph [0035], a conductive material 226, e.g., copper, is deposited 1016 in the first and second plurality of trenches 208, 222]. It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Chen and Whig et al. into the method of Liu to include depositing the first dielectric material above the substrate to form the layer of the first dielectric material comprising: depositing an etch stop layer above the substrate; depositing the first dielectric material above the etch stop layer; forming a second trench through at least the first dielectric material; and depositing the electrically conductive material in the first trench and the second trench in a single deposition process to form the layer of electrically conductive material after the step of forming the second trench such that the electrically conductive material directly contacts a vertical surface of the second dielectric material in the first trench and vertical surfaces of the etch stop layer and first dielectric material in the second trench. The ordinary artisan would have been motivated to modify Liu in the above manner for the purpose of creating isolation regions on the surface of a substrate; forming integrated structure comprising flux guide and conductive via for electrical connecting with upper device features; forming integrated structure having mixing of functions and processing capabilities [paragraph [0005], [0066] of Chen, paragraph [0035], [0037] of Whig et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Liu et al. fails to disclose the upper surface of the layer of the ferromagnetic material comprises an angled surface, wherein the angled surface of the layer of the ferromagnetic material is angled with respect to the vertical surface; the upper surface of the layer of the second dielectric material comprises an angled surface corresponding to the angled surface of the layer of the ferromagnetic material; subjecting the exposed surface of the layer of the second dielectric material to the first CMP process such that the entire angled surface of the layer of the ferromagnetic material and the entire angled surface of the layer of the second dielectric material are removed together in the same first CMP process. However, Liu et al. discloses in paragraph [0029], that “one or more isotropic and/or anisotropic etching processes may be performed to define the magnetic MRAM stack layers 330, 335.” Liu et al. further discloses the flux guide having shape of a spacer. Guo et al. discloses in Fig. 8-Fig. 11, columns 4-5 the spacer comprising the layer of the first material [120]; an upper surface of the layer of the first material [120] comprises an angled surface [164], the angled surface [164] of the layer of the first material [120] is angled with respect to the vertical surface of the layer of the first material [120][Fig. 8]; an upper surface of the layer of the second dielectric material [174] comprises an angled surface corresponding to the angled surface of the layer of the first material [120][Fig. 9]; subjecting the exposed surface [surface of layer 174 must be exposed before it is removed by CMP] of the layer of the second dielectric material [174] to the first CMP process such that the entire angled surface [164] of the layer of the first material [120] and the entire angled surface of the layer of the second dielectric material [174] are removed together in the same first CMP process [Fig. 11, column 5, lines 42-44, 63-64 “FIGS. 10 and 11 show the structure after subsequent and conventional processing, most notably, planarization, e.g., CMP…the planarization entirely removes angled entrance”]. For further provide support evidence that it is a known technique for reducing chance of pinch off leading to voids inside the contact trench by forming a layer of a first material having an angled surface positioned proximate an opening of the trench, Liu129 is cited. Liu129 discloses in Fig. 9C-Fig. 9F the spacer comprising the layer of the first material [160B’]; an upper surface of the layer of the first material [160B’] comprises an angled surface [164] that is angled with respect to the vertical surface of the layer of the first material [160B’][Fig. 9D]; an upper surface of the layer of the second dielectric material [113] comprises an angled surface corresponding to the angled surface of the layer of the first material [160B’][Fig. 9E]; subjecting the exposed surface [the surface of 113 must be exposed before it is removed by CMP] of the layer of the second dielectric material [113] to the first CMP process such that the entire angled surface of the layer of the first material [160B’] and the entire angled surface of the layer of the second material [113] are removed together in the same first CMP process [Fig. 9F]. It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Guo et al. and Liu129 into the method of Liu et al. to include the upper surface of the layer of the ferromagnetic material comprises an angled surface, wherein the angled surface of the layer of the ferromagnetic material is angled with respect to the vertical surface; the upper surface of the layer of the second dielectric material comprises an angled surface corresponding to the angled surface of the layer of the ferromagnetic material; subjecting the exposed surface of the layer of the second dielectric material to the first CMP process such that the entire angled surface of the layer of the ferromagnetic material and the entire angled surface of the layer of the second dielectric material are removed together in the same first CMP process. The ordinary artisan would have been motivated to modify Liu et al. in the above manner for the purpose of preventing forming voids in the first trench without violating any design ground rules of the trench dimension and depositing within the trench easier [column 9, lines 11-12 of Liu129; column 5, lines 35-41 of Guo et al.]. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Combination of Guo et al. and Liu129 and Liu et al. would result to “the flux guide comprising the layer of the ferromagnetic material having a vertical surface and an angled surface proximate an opening of the first trench, the angled surface of the layer of the ferromagnetic material is angled with respect to the vertical surface.” Liu fails to explicitly discloses the first CMP process is an oxide-CMP; the second CMP process is a metal-CMP or copper-CMP. Liu et al. discloses in paragraph [0032] that the first CMP must be able to remove portions of both the dielectric material layer and the magnetic material layer “a planarizing process may remove portions of both the dielectric material layer and the magnetic material layer to expose the material layer 310.” Liu further discloses in paragraph [0034] that the dielectric material layer comprises oxides. Liu et al. discloses in paragraph [0036]-[0037] that electrically conductive material [350] comprises metal and is removed by CMP. Siddiqui et al. discloses in paragraph [0006] oxide CMP is utilized to achieve planarization of oxide dielectric layers and metal CMP is utilized to achieve planarization of metal layers. Thus, it would be obvious to select oxide-CMP based on its suitability for use as the first CMP process to remove material of the dielectric material layer comprises oxides in the device of Liu et al. And, it would be obvious to select metal-CMP based on its suitability for use as the second CMP process to remove the electrically conductive material in the device of Liu et al. Thus, it would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Siddiqui et al. into the method of Liu et al. to include the first CMP process is an oxide-CMP; the second CMP process is a metal-CMP. The ordinary artisan would have been motivated to modify Liu et al. in the above manner for the purpose of providing suitable CMP process to remove material of the dielectric material layer comprises oxides and to remove the electrically conductive material [paragraph [0006] of Siddiqui et al.]. In addition, paragraph [0018] of the original specification admitted that “Magnetic field sensor 100 is fabricated using conventional processes used in semiconductor processing.” Thus, absent unexpected results, it would have been obvious to try any one of the known CMP methods to yield a CMP method suitable for removing oxide material and/or metal material with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Consequently, the combination of Liu et al., Siddiqui et al., Liu129 and Guo et al. would suggest every limitation of claim 12 including the limitation of “before depositing any additional material over the layer of the second dielectric material, starting polishing of an exposed surface of the layer of the second dielectric material by subjecting the exposed surface of the layer of the second dielectric material to an oxide-chemical mechanical polishing (CMP) process such that the entire angled surface of the layer of the ferromagnetic material and the entire angled surface of the layer of the second dielectric material are removed together in the same oxide-CMP process, and stopping the polishing when a top surface of the flux guide and a top surface of the second dielectric material are exposed, such that the layer of the first dielectric material on which the layer of the ferromagnetic material is deposited is exposed with the top surface of the flux guide and the top surface of the second dielectric material, thereby more effectively removing the angled surface of the flux guide than by a metal-CMP process.” Regarding claims 22, 24, and 25, Liu et al. discloses in Fig. 3e, paragraph [0037] removing a portion of the electrically conductive material [305] deposited on a top surface of the layer of the first dielectric material [310] by subjecting the portion of the electrically conductive material to a CMP process; removing a portion of the layer of electrically conductive material [350] deposited over the top surface of the flux guide [330 and 335] and over the top surface of the second dielectric material [340 and 345] by subjecting the portion of the layer of electrically conductive material [350] to a CMP process; removing a portion of the electrically conductive material with a CMP process such that the top surface of the flux guide [330 and 335] and the top surface of the second dielectric material [340 and 345] are exposed. [paragraph [0037], “forming the dielectric MRAM stack layer 350 comprises depositing an additional magnetic material layer over the material layer 310 and substantially filling the remaining unoccupied portion of the recess 315, and subsequently planarizing (e.g., by CMP) the remaining portions of the additional magnetic material layer until the additional magnetic material layer is substantially removed from over the material layer 310”] PNG media_image4.png 397 1046 media_image4.png Greyscale Liu et al. fails to disclose subjecting the portion of the electrically conductive material to a copper-CMP process, wherein the electrically conductive material includes copper; subjecting the portion of the layer of electrically conductive material to one of a metal-CMP process or a copper-CMP process; removing the portion of the electrically conductive material with one of a metal-CMP process or a copper-CMP process. Whig discloses in Fig. 4, Fig. 11, paragraph [0035] subjecting the portion of the electrically conductive material [226] to a CMP process [polish surface of conductive material 1018], wherein the electrically conductive material [226] includes copper. Chen also discloses in Fig. 6, paragraph [0077] the electrically conductive material includes copper. Siddiqui et al. discloses in paragraph [0006] oxide CMP is utilized to achieve planarization of oxide dielectric layers and metal CMP is utilized to achieve planarization of metal layers. Thus, it would be obvious to select metal-CMP based on its suitability for use as the CMP process to remove the electrically conductive material includes metal material suggested by Liu et al., Whig and Chen. It would be obvious to select copper-CMP based on its suitability for use as the CMP process to remove the electrically conductive material includes copper suggested by Chen and Whig. Thus, it would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Siddiqui et al., Chen and Whig into the method of Liu et al. to include subjecting the portion of the electrically conductive material to a copper-CMP process, wherein the electrically conductive material includes copper; subjecting the portion of the layer of electrically conductive material to one of a metal-CMP process or a copper-CMP process; removing a portion of the electrically conductive material with one of a metal-CMP process or a copper-CMP process. The ordinary artisan would have been motivated to modify Liu et al. in the above manner for the purpose of providing suitable conductive material deposited in the trenches to form integrated device and providing suitable CMP process to remove the electrically conductive material including metal/copper. In addition, paragraph [0018] of the original specification admitted that “Magnetic field sensor 100 is fabricated using conventional processes used in semiconductor processing.” Thus, absent unexpected results, it would have been obvious to try any one of the known CMP methods to yield a CMP method suitable for removing metal/copper material with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Liu et al. (US Pub. 20060033133) in view of Whig et al. (US Pub. 20110244599), Chen (US Pub. 20020022335), Guo et al. (US Pat. 8084346), Liu et al. (US Pat. 9960129), hereafter Liu129, and Siddiqui et al. (US Pub. 20060162261) as applied to claim 1 above and further in view of Paci et al. (US Pub. 20140159717) and Mather et al. (US Pub. 20160320460). Regarding claim 8, Liu discloses in paragraph [0036] wherein the step of forming a trench includes forming a trench having a depth between 0.3-2.0 µm [the thickness of layer 310 is from 0.05 µm -1 µm]. Liu et al. fails to disclose the trench having a width between 0.15-1.0µm. Paci discloses in Fig. 7, Fig. 16B, paragraph [0054] the trench having a width of 1.0µm. Thus, it would have been obvious to one of ordinary skill in the art at the time of the effective filling date of the invention to incorporate the teachings of Paci into the method of Liu et al. to provide suitable dimension of the trench width. Applicant does not show any criticality of the claimed range. Per MPEP 2144.05 (I), “A prima facie case of obviousness exists where the claimed ranges or amounts do not overlap with the prior art but are merely close. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 783, 227 USPQ 773, 779 (Fed. Cir. 1985)” and “In re Brandt, 886 F.3d 1171, 1177, 126 USPQ2d 1079, 1082 (Fed. Cir. 2018)(the court found a prima facie case of obviousness had been made in a predictable art wherein the claimed range of "less than 6 pounds per cubic feet" and the prior art range of "between 6 lbs./ft3 and 25 lbs./ft3" were so mathematically close that the difference between the claimed ranges was virtually negligible absent any showing of unexpected results or criticality.)”. Consequently, the claimed range is obvious over the trench width disclosed by Paci. Further, Mather et al. discloses in Fig. 8A-8C, the trench width can be adjusted. Mather et al. discloses in paragraph [0010], it is desired to provide an optimal trench width. Therefore, it would have been obvious to modify Liu et al. to provide the trench having a width between 0.15-1.0µm. The ordinary artisan would have been motivated to modify Liu et al. in the manner set forth above for at least the purpose of optimization and routine experimentation to provide optimal dimension for the trench. The claimed ranges are merely optimizations, and as such are not patentable over the prior art. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Response to Arguments Applicant’s arguments with respect to claims 1-4, 7-8, 10-15, 18-20, 22, 24-25 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Overall, Applicant’s arguments are not persuasive. The claims stand rejected. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited art discloses similar materials, devices and methods. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA T NGUYEN whose telephone number is (571)272-1686. The examiner can normally be reached 9:00am -5:00 pm, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BRITT D HANLEY can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SOPHIA T NGUYEN/ Primary Examiner, Art Unit 2893
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Prosecution Timeline

Oct 30, 2018
Application Filed
Feb 28, 2020
Non-Final Rejection — §103
Jun 24, 2020
Response Filed
Jul 21, 2020
Final Rejection — §103
Sep 25, 2020
Response after Non-Final Action
Oct 20, 2020
Request for Continued Examination
Oct 24, 2020
Response after Non-Final Action
Dec 15, 2020
Non-Final Rejection — §103
Mar 17, 2021
Response Filed
Apr 12, 2021
Final Rejection — §103
Jul 12, 2021
Notice of Allowance
Jul 12, 2021
Response after Non-Final Action
Aug 02, 2021
Response after Non-Final Action
Dec 16, 2021
Request for Continued Examination
Dec 18, 2021
Response after Non-Final Action
May 26, 2022
Non-Final Rejection — §103
Aug 15, 2022
Examiner Interview Summary
Aug 15, 2022
Applicant Interview (Telephonic)
Aug 31, 2022
Response Filed
Oct 20, 2022
Final Rejection — §103
Jan 24, 2023
Notice of Allowance
Mar 21, 2023
Response after Non-Final Action
Apr 01, 2023
Response after Non-Final Action
May 30, 2023
Response after Non-Final Action
Aug 02, 2023
Response after Non-Final Action
Aug 02, 2023
Response after Non-Final Action
Aug 03, 2023
Response after Non-Final Action
Aug 03, 2023
Response after Non-Final Action
Jan 28, 2025
Response after Non-Final Action
Mar 26, 2025
Examiner Interview Summary
Mar 26, 2025
Applicant Interview (Telephonic)
Mar 28, 2025
Request for Continued Examination
Mar 31, 2025
Response after Non-Final Action
May 09, 2025
Non-Final Rejection — §103
Aug 14, 2025
Response Filed
Sep 15, 2025
Final Rejection — §103
Nov 20, 2025
Applicant Interview (Telephonic)
Nov 20, 2025
Examiner Interview Summary
Dec 17, 2025
Response after Non-Final Action
Jan 08, 2026
Request for Continued Examination
Jan 23, 2026
Response after Non-Final Action
Mar 16, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Expected OA Rounds
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2y 8m
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