DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Reopening of Prosecution
In view of the Patent Board Decision filed on September 18, 2025, PROSECUTION IS HEREBY REOPENED. New grounds of rejection are set forth below.
To avoid abandonment of the application, appellant must exercise one of the following two options:
(1) file a reply under 37 CFR 1.111 (if this Office action is non-final) or a reply under 37 CFR 1.113 (if this Office action is final); or,
(2) initiate a new appeal by filing a notice of appeal under 37 CFR 41.31 followed by an appeal brief under 37 CFR 41.37. The previously paid notice of appeal fee and appeal brief fee can be applied to the new appeal. If, however, the appeal fees set forth in 37 CFR 41.20 have been increased since they were previously paid, then appellant must pay the difference between the increased fees and the amount previously paid.
A Technology Center Director (TC Director) has approved of reopening prosecution by signing below:
/JOHN K FRISTOE JR/ Group Director, Art Unit 2800
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3 and 6-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wei et al. (U.S. Pub. No. 2019/0096830).
Regarding claim 1, Wei et al. teaches a first electronic circuit (Fig. 1H, 100a, ¶ [0013]) comprising a first planar surface (Figs. 1H and 2, bottom surface of 110/114 in area 12, ¶¶ [0015], [0020], [0032], and [0033]), intended to be affixed to a second electronic circuit (though the second electronic circuit is not positively required by the claim, for purposes of illustrating the functionality of the first electronic circuit, see Figs. 1H – 1I, second electronic circuit 200a, ¶ [0045]) by a self-assembly method with a hybrid molecular bonding (¶ [0045]), and first electrically-conductive pads (Fig. 1H, 114, ¶ [0032]) exposed on the first surface (Fig. 1H), the first electronic circuit further comprising a peripheral area (Figs. 1H and 2, 11, ¶ [0015]) around the first surface comprising second exposed and raised pads (Fig. 1H, 104/116, ¶¶ [0018] & [0033], exposed by 110 and “raised” with respect to 102, noting that since the transitional phrase “comprising” is used, additional, unrecited elements are not precluded), each at least partly having the same composition as the first pads (see Figs. 1F and 1G, showing the formation of 114 and 116 in the same step, thus having the same composition, ¶¶ [0029] – [0031]).
Regarding claim 2, Wei et al. teaches a first electronic circuit wherein the second pads (Fig. 1H, 104/116, ¶¶ [0018] & [0033]) each comprise a hydrophobic coating (Fig. 1H, 110, ¶ [0020]. Examiner notes that a recitation of “coating” does not require that top and lateral sides of the structure be covered in the same way that a recitation of “coating covering top and lateral sides” of the structure would. Examiner additionally notes that silicon nitride in its pure form is inherently hydrophobic).
Regarding claim 3, Wei et al. teaches a first electronic circuit wherein the second pads (Fig. 2, 104/116, ¶¶ [0018] & [0033]) are arranged all around the first surface (Figs. 1H and 2, bottom surface of 110/114 in area 12, ¶¶ [0015], [0020], [0032], and [0033]).
Regarding claim 6, Wei et al. teaches a first electronic circuit wherein the tops of the second pads (Fig. 1H, 104/116, ¶¶ [0018] & [0033]) are recessed (Fig. 1H, the top surface of 104 is “recessed” with respect to the top surfaces of 110 and 114) with respect to the first surface (Figs. 1H and 2, bottom surface of 110/114 in area 12, ¶¶ [0015], [0020], [0032], and [0033]).
Regarding claim 7, Wei et al. teaches a first electronic circuit wherein the ratio of the surface area of the first pads (Fig. 2, 114, ¶ [0032]), seen perpendicularly to the first surface (Figs. 1H and 2, bottom surface of 110/114 in area 12, ¶¶ [0015], [0020], [0032], and [0033]), to the surface area of the first surface is different (This is a broad recitation that captures even a de minimis difference. Further, the designation between the first surface and the second surface of Wei et al. is arbitrary, thus can be moved such that the ratio is “different”. Further still, though Wei et al.’s drawings are depicted as “not drawn to scale,” Examiner is not relying on the drawings to teach a “particular size” of any of the claimed elements, but rather the relationship between their sizes. The drawings may be relied upon to teach all that they would suggest to one having ordinary skill in the art, and Fig. 2 of Wei et al. suggests the claimed ratios. See MPEP § 2125.) from the ratio of the surface area of the second pads (Fig. 2, 116, ¶ [0033]), seen perpendicularly to the peripheral area (Figs. 1H and 2, 11, ¶ [0015]), to the surface area of the peripheral area.
Regarding claim 8, Wei et al. teaches a method of manufacturing a first electronic circuit (Fig. 1H, 100a, ¶ [0013]) comprising a first planar surface (Fig. 1H, bottom surface of 110/114/116, ¶¶ [0020], [0032], and [0033]), intended to be affixed to a second surface of a second electronic circuit (though the second electronic circuit is not positively required by the claim, for purposes of illustrating the functionality of the first electronic circuit, see Figs. 1H – 1I, second electronic circuit 200a and its second surface on top of 210/214/216, ¶ [0045]) by a self-assembly method with a hybrid molecular bonding (¶ [0045]), and first electrically-conductive pads (Fig. 1H, 114, ¶ [0032]) exposed on the first surface (Fig. 1H), the method comprising the forming of a peripheral area (Figs. 1H and 2, 11, ¶ [0015]) around the first surface comprising second exposed and raised pads (Fig. 1H, 116, ¶ [0033], exposed by 110 and “raised” with respect to 102, noting that since the transitional phrase “comprising” is used, additional, unrecited elements are not precluded), each at least partly having the same composition as the first pads (see Figs. 1F and 1G, showing the formation of 114 and 116 in the same step, thus having the same composition, ¶¶ [0029] – [0031]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Wei et al. (U.S. Pub. No. 2019/0096830), as applied to claim 1 above, further in view of Haehn et al. (U.S. Pub. No. 2020/0203240).
Regarding claim 4, Wei et al. fails to teach a first electronic circuit wherein the peripheral area (Figs. 1H and 2, 11, ¶ [0015]) comprises at least one raised track surrounding the first surface (Figs. 1H and 2, bottom surface of 110/114 in area 12, ¶¶ [0015], [0020], [0032], and [0033]), the track at least partly having the same composition as the first pads (Fig. 1H, 114, ¶ [0032]).
Haehn et al. teaches an electronic circuit (Figs. 1 and 2) wherein a peripheral area (Figs. 1 and 2, area outside die 102, ¶ [0013]) comprises at least one raised track (Figs. 1 and 2, 130, ¶ [0018]) surrounding the first surface (Figs. 1 and 2, top surface of 104 under die 102, ¶ [0013]), the track at least partly having the same composition as the first pads (Fig. 1, 114, ¶ [0018]). Haehn et al. teaches that by surrounding a plurality of electrically conductive pads with a raised track, one can mitigate current crowding in the regions containing the first pads (¶ [0002]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to add the raised tracks of Haehn et al. to the electronic circuit of Wei et al., in order to mitigate current crowing near the first pads.
Regarding claim 5, Wei et al. fails to teach a first electronic circuit wherein the peripheral area (Figs. 1H and 2, 11, ¶ [0015]) comprises, around the first surface (Figs. 1 and 2, top surface of 104 under die 102, ¶ [0013]), raised bars extending perpendicularly to the edges of the first surface, each bar at least partly having the same composition as the first pads (Fig. 1H, 114, ¶ [0032]).
Haehn et al. teaches an electronic circuit (Figs. 1 and 2) wherein a peripheral area (Figs. 1 and 2, area outside die 102, ¶ [0013]) comprises, around the first surface (Figs. 1 and 2, top surface of 104 under die 102, ¶ [0013]), raised bars (Figs. 1 and 2, 130, ¶ [0018]) extending perpendicularly to the edges of the first surface (Fig. 2, noting that the vertical “bars” extend perpendicularly to the top and bottom edges of the first surface), each bar at least partly having the same composition as the first pads (Fig. 1, 114, ¶ [0018]). Haehn et al. teaches that by surrounding a plurality of electrically conductive pads with raised bars, one can mitigate current crowding in the regions containing the first pads (¶ [0002]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to add the raised bars of Haehn et al. to the electronic circuit of Wei et al., in order to mitigate current crowing near the first pads.
Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Wei et al. (U.S. Pub. No. 2019/0096830), as applied to claims 1 and 8 above, further in view of Di Cioccio et al. (U.S. Pub. No. 2011/0033976).
Regarding claim 11, Wei et al. teaches a method of self-assembly with a hybrid bonding of the first planar surface (Fig. 1I, bottom surface of 110/114 in area 12, ¶¶ [0015], [0020], [0032], and [0033]) of a first electronic circuit manufactured according to the method according to claim 8 (Fig. 1I, 100a, ¶ [0013]) to a second surface (Fig. 1I, top surface of 210/214, ¶¶ [0044]-[0045]) of a second electronic circuit (Fig. 1I, 200a, ¶ [0046]), the second electronic circuit comprising third electrically-conductive pads (Fig. 1I, 214, ¶ [0046]) exposed on the second surface.
Wei et al. fails to teach explicitly the method comprising the deposition of a drop of a liquid on the first surface and the placing into contact of the second surface with said drop.
Di Cioccio et al. teaches a method of self-assembly with a hybrid bonding comprising the deposition of a drop of a liquid on the first surface and the placing into contact of the second surface with said drop (Figs. 4A-5A, ¶¶ [0103]-[0108]). Di Cioccio et al. teaches that by using the drop of liquid in this manner, one can better align the first and second chips during the hybrid bonding (¶ [0107]). Accordingly, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to utilize the drop of liquid as taught by Di Cioccio et al. with the method of self-assembly with hybrid bonding of Wei et al., in order to better align the first and second electronic circuits during hybrid bonding.
Regarding claim 12, Wei et al. teaches a method of self-assembly with a hybrid bonding wherein the third pads (Fig. 1I, 214, ¶ [0046]) are arranged symmetrically with respect to the first pads (Fig. 1I, 114, ¶ [0046]).
Allowable Subject Matter
Claims 9-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN B GAUTHIER whose telephone number is (571)270-0373. The examiner can normally be reached on M-F 7:30a-4:30p.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, John K. Fristoe, Jr., can be reached on 571-272-4926. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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STEVEN B. GAUTHIER
Supervisory Patent Examiner
Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
Prosecution Insights