Prosecution Insights
Last updated: April 19, 2026
Application No. 16/869,732

Battery Pack, Treatment System and Method for the Production of a Battery Pack

Non-Final OA §102§103§DP
Filed
May 08, 2020
Examiner
NEDIALKOVA, LILIA V
Art Unit
1724
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Murata Manufacturing Co. Ltd.
OA Round
5 (Non-Final)
55%
Grant Probability
Moderate
5-6
OA Rounds
3y 4m
To Grant
77%
With Interview

Examiner Intelligence

Grants 55% of resolved cases
55%
Career Allow Rate
233 granted / 423 resolved
-9.9% vs TC avg
Strong +22% interview lift
Without
With
+21.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
53 currently pending
Career history
476
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
23.3%
-16.7% vs TC avg
§112
22.4%
-17.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 423 resolved cases

Office Action

§102 §103 §DP
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114 was filed in this application after a decision by the Patent Trial and Appeal Board, but before the filing of a Notice of Appeal to the Court of Appeals for the Federal Circuit or the commencement of a civil action. Since this application is eligible for continued examination under 37 CFR 1.114 and the fee set forth in 37 CFR 1.17(e) has been timely paid, the appeal has been withdrawn pursuant to 37 CFR 1.114 and prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant’s submission filed on September 8, 2025 has been entered. Claims 1, 7 and 14 are currently amended. Claim 15 is canceled. Claim 18 is newly added. Claims 1, 2, 4-8, 11-14 and 16-18 are pending review in this action. New grounds of rejection necessitated by Applicant’s amendments are presented below. Information Disclosure Statement The information disclosure statement submitted on July 9, 2024 has been considered by the examiner. Claim Objections Claim 1 is objected to because of the following informalities. The second to last line of the claim reads in part: “the cell tabs of next pouch cells are electrically connected to each other”. A review of the original German suggests that rather than the word “next”, the appropriate word is “adjacent”. (See original specification, p.2, lines 10-11: “Insbesondere können die Zelltabs, insbesondere jeweils, nächster Pouchzellen miteinander elektrisch verbunden sein”). Claim 14 is objected to because of the following informalities. Line 24 of the claim recites the limitation: “the yet further circuit board holds user a interface electronics display”. The limitation should be edited to read: “the yet further circuit board holds a user interface electronics display”. The last two lines of the claim read: “the cell tabs of next pouch cells for electrical connection of the cell tabs of next pouch cells to each other”. A review of the original German suggests that rather than the word “next”, the appropriate word is “adjacent”. Claim 18 is objected to because of the following informalities. Line 8 of the claim terminates with “;,”. One of the punctuation marks is unnecessary and should be deleted. Appropriate correction is required. Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim 18 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Pre-Grant Publication No. 2012/0082881, hereinafter Tsukamoto. Regarding claim 18, Tsukamoto teaches a battery pack (56) (figures 4 and 8). The battery pack (56) comprises a plurality of pouch cells (56a) arranged in a stack (paragraphs [0086, 0087]). The battery cells (56a) have cell tabs (602) (paragraph [0088]). The cell tabs (602) are on the same side of the stack and are arranged in two columns (figures 6a and 6b). The cell tabs (602) are bent (have “averted ends”) (figure 6a). Edges of the bent portions (“averted ends”) define an intermediate zone. A circuit board (50c) is disposed between the two tab columns within the intermediate zone and is electrically connected to the cell tabs (602) (paragraph [0088] and figures 6a and 6b). A thermally conductive potting compound (59) encloses the cell tabs (602) and the circuit board (50c) in a common casting block (paragraph [0107] and figure 8). Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 2, 4-8, 11, 12, 14, 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pre-Grant Publication No. 2012/0328908, hereinafter Han in view of U.S. Pre-Grant Publication No. 2018/0229621, hereinafter Roh, U.S. Pre-Grant Publication No. 2018/0301913, hereinafter Irish, U.S. Pre-Grant Publication No. 2018/0361516, hereinafter Kobayashi and U.S. Pre-Grant Publication No. 2021/0288370, hereinafter Rejman. Regarding claim 1, Han teaches a battery pack (paragraph [0039] and figures 1 and 2). The battery pack comprises a plurality of cells (123) arranged in a stack. The battery cells (123) have cell tabs (121 and 122) (paragraph [0041]). The cell tabs (121 and 122) are on the same side of the stack and are arranged in two columns (paragraph [0044] and figure 2). The cell tabs (121 and 122) are bent (have “averted ends”) (paragraph [0046] and figure 2). Edges of the bent portions (“averted ends”) define an intermediate zone. A circuit board (170) is disposed between the two tab columns within the intermediate zone and is electrically connected to the cell tabs (121 and 122) via bus bars (160) (paragraphs [0050, 0051] and figures 1 and 11). The circuit board (170) senses voltage of the battery cells (123) (paragraph [0057]) – therefore it “holds measuring electronics configured to measure voltages of the battery cells”. A battery management system (BMS) (150) is disposed on the tab side of the stack (paragraph [0039]). The BMS (150) is positioned further from the stack than the circuit board (170) (figure 1). The BMS (150) includes electronics for performing cell balancing (paragraph [0058]). As such it may be said to “hold power electronics for controlling the output of the driving power from the battery pack”. Han teaches that the cell tabs (121 and 122) and bus bars (160) are interconnected through mechanical fixing members (184) (paragraph [0048]). Han’s battery cells (123) are flat cells retained within frame cartridges (125) (paragraph [0041] and figure 2). Han provides no information on the casing of each battery cell. Han does not: 1) explicitly describe the battery cells (123) as “pouch” cells, 2) teach a material-bonding engagement; 3) teach that the BMS includes a circuit board (“further circuit board”) and has a width such that it covers both tab columns; 4) teach a yet further circuit board; 5) teach a display configured for display of a charging condition of the battery pack. Regarding 1), Roh teaches a comparable battery module (100) formed of a plurality of pouch cells (110). Each cell is a flat cell housed within a cartridge (130) (paragraphs [0037-0042] and figure 1). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to select a pouch as the casing of each of Han’s battery cells without undue experimentation and with a reasonable expectation of success. Regarding 2), the use of welding for electrical interconnection is ubiquitous in the art – see, e.g. Roh (paragraphs [0054, 0076, 0077]). It is further appreciated in the art that welding is superior to mechanical connections because it results in lower electrical resistance – see, e.g. Kobayashi (paragraph [0003]). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to implement welding (“material-bonding”) engagement to form the electrical connections among the cell tabs (121 and 122) and bus bars (160) for the purpose of forming electrical connections having a lower electrical resistance. Regarding 3), it is well-known in the art that BMSs may be configured as circuit boards – see, e.g. Irish. Irish teaches a BMS (101) positioned on a circuit board and including a power controller (115) configured to control the current and voltage from a battery (105) (paragraphs [0024, 0032]). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to provide Han’s BMS (150) on a circuit board (“further circuit board”) without undue experimentation and with a reasonable expectation of success. The size of a BMS circuit board is a design choice motivated by the number and type of electronic components located on the circuit board. Further, there are considerations on the spacing of components such that they don’t interfere with each other – see, e.g. Irish (paragraph [0034]). Moreover, sizing a BMS circuit board to have a footprint as large as the footprint of its corresponding battery pack is well-known in the art – see, e.g. Irish (paragraph [0108] and figure 14). Therefore it would have been within the purview of the ordinarily skilled artist before the effective filing date of the claimed invention to size Han’s BMS (150) such that its width exceeds the distance between outside edges of the cell tab columns (and thus have it cover both tab columns) for the purpose of optimizing the number of electronic components and their spacing on the circuit board without undue experimentation and with a reasonable expectation of success. Regarding 4), Irish teaches that the BMS (101) includes a wireless interface (113) for interactions with a user and to communicate battery parameters (paragraph [0022, 0030]). Irish further teaches that the wireless interface (113) may be located on a separate circuit board from the BMS (101) and the BMS’s power circuitry used to charge the battery (paragraph [0035]). Irish teaches that communications may be adversely affected by the proximity of the power circuitry of the BMS and the battery itself and thus teaches placing the circuit board with the wireless interface physically isolated from the battery and the power circuitry (paragraph [0036]). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to include a third circuit board (“yet further circuit board”) holding a wireless interface for the purpose of being able to communicate battery parameters to a remote user. Given the geometry of Han’s battery pack, it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to position the third circuit board (“yet further circuit board”) on the same side as the other two circuit boards – on the tab side of the stack. Given that Irish teaches positioning the wireless interface away from the battery and the power circuitry, it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to position the third circuit board (“yet further circuit board”) further from the stack than the BMS circuit board (“further circuit board”) (and thus also further from the circuit board (170)) in order to minimize interference from the power circuitry to the wireless interface. Regarding 5), displays for indicating a battery charge state on circuit boards in battery packs is ubiquitous in the art – see, e.g. Rejman, who teaches a display unit (108) for indicating the battery charge state located on circuit board (85) (paragraphs [0014, 0080] and figure 5). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to include a display for indicating a battery charge state for the purpose of being able to visually identify the charge state of the battery pack. Given that the third circuit board (“yet further circuit board”) in the combination of the Han and Irish is outermost and has the state of charge data, it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to position the display for indicating the battery charge state on the third circuit board (“yet further circuit board”). Regarding claim 2, Han teaches that a plane of the circuit board (170) extends parallel to the tab side of the stack (figures 1 and 11). Regarding claim 4, Han teaches that the cell tabs (121 and 122) are connected to the circuit board (170) via bus bars (160) (paragraphs [0050, 0051]). Therefore the connections are “identical”. Regarding claim 5, Han teaches that the cell tabs (121 and 122) are connected to the circuit board (170) via bus bars (160, “electrical cell connectors”) (paragraphs [0050, 0051]). The bus bars (160, “electrical connectors”) are metal pieces with preformed, fixed shapes and are not subject to bending or shaping during the course of assembly of the battery pack (paragraph [0050] and figures 4A, 5A and 6A). The ordinarily skilled artist would expect Han’s bus bars (160, “electrical connectors”) to be inflexible. Regarding claim 6, Han teaches that the cell tabs (121 and 122) are connected to the circuit board (170) via bus bars (160, “electrical cell connectors”) (paragraphs [0050, 0051]). The bus bars (160, “electrical cell connectors”) project beyond a board edge of the circuit board (170) in the direction of the end limits of the tab columns (figures 1 and 11). Regarding claim 7, Han teaches bus bars (160, “electric power connectors”) electrically connected to the cell tabs (121 and 122) (paragraphs [0050, 0051]). Han as modified by Roh and Kobayashi teaches welding (“material bonding engagement”) between the bus bars (160, “electric power connectors”) and cell tabs (121 and 122) (Roh’s paragraphs [0054, 0076, 0077] and Kobayshi’s paragraph [0003]). Regarding claim 8, Han teaches a case (110, “stack limiting structure”). The case (110, “stack limiting structure”) has an opening. The stack of battery cells (123) is disposed in the case (110, “stack limiting structure”). The cell tabs (121 and 122) are disposed in the opening. An insulation plate (130, “frame”) is disposed on the opening and supports the circuit board (170). The cell tabs (121 and 122) and the circuit board (170) are positioned in relation to each other by way of the case (110, “stack limiting structure”) and the insulation plate (130, “frame”). Regarding claim 11, Han teaches that the circuit board (170) includes through-holes (170h, “recesses”). The through-holes (170h, “recesses”) are used to couple the circuit board (170) to insulation plate (130) – thus, they are used for “positioning the circuit board”. Regarding claim 12, Han teaches that the battery pack includes ten lithium-ion cells (123) connected in series (abstract, paragraph [0042] and figures 2 and 8). It is known in the art that a lithium-ion cell has a voltage in the range 2.5 V to 4.2 V - see, e.g. Roh (paragraph [0004]). Therefore, Han’s battery pack is understood to have a nominal voltage in the range 25 V to 42 V. Regarding claim 14, Han teaches a method of producing a battery pack. The method includes a step a) of disposing a plurality of battery cells (123) in a stack. The battery cells (123) have cell tabs (121 and 122) (paragraph [0041]). The cell tabs (121 and 122) are disposed on the same side of the stack and are arranged in two columns (paragraph [0044] and figure 2). The cell tabs (121 and 122) are bent (have “averted ends”) (paragraph [0046] and figure 2). Edges of the bent portions (“averted ends”) define an intermediate zone. The method further includes a step b) of disposing a circuit board (170) between the two tab columns within the intermediate zone and a step c) of electrically connecting the circuit board (170) to the cell tabs (121 and 122) via bus bars (160) (paragraphs [0050, 0051] and figures 1 and 11). Step b) is performed after step a) and step c) is performed after step b). The cell tabs (121 and 122), bus bars (160) and circuit board (170) are interconnected through mechanical fixing members (184) (paragraph [0048]). The method further includes a step d) of disposing a battery management system (BMS) (150) on the tab side of the stack (paragraph [0039]). The BMS (150) is positioned further from the stack than the circuit board (170) (figure 1). The circuit board (170) senses voltage of the battery cells (123) (paragraph [0057]) – therefore it “holds measuring electronics configured to measure voltages of the battery cells”. The BMS (150) includes electronics for performing cell balancing (paragraph [0058]). As such it may be said to “hold power electronics for controlling the output of the driving power from the battery pack”. Han’s battery cells (123) are flat cells retained within frame cartridges (125) (paragraph [0041] and figure 2). Han provides no information on the casing of each battery cell. Han does not: 1) explicitly describe the battery cells (123) as “pouch” cells; 2) teach material-bonding engagements; 3) teach that the BMS includes a circuit board (“further circuit board”) and has a width such that it covers both tab columns; 4) teach a third circuit board (“yet further circuit board”); and 5) teach a display configured for display of a charging condition of the battery pack. Regarding 1), Roh teaches a comparable battery module (100) formed of a plurality of pouch cells (110). Each cell is a flat cell housed within a cartridge (130) (paragraphs [0037-0042] and figure 1). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to select a pouch as the casing of each of Han’s battery cells without undue experimentation and with a reasonable expectation of success. Regarding 2), the use of welding for electrical interconnection is ubiquitous in the art – see, e.g. Roh (paragraphs [0054, 0076, 0077]). It is further appreciated in the art that welding is superior to mechanical connections because it results in lower electrical resistance – see, e.g. Kobayashi (paragraph [0003]). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to implement welding (“material-bonding”) engagement to form the electrical connections among the cell tabs (121 and 122), bus bars (160) and circuit board (170) for the purpose of forming electrical connections with lower electrical resistance. Regarding 3), it is well-known in the art that BMSs may be configured as circuit boards – see, e.g. Irish. Irish teaches a BMS (101) positioned on a circuit board and including a power controller (115) configured to control the current and voltage from a battery (105) (paragraphs [0024, 0032]). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to provide Han’s BMS (150) on a circuit board (“further circuit board”) without undue experimentation and with a reasonable expectation of success. The size of a BMS circuit board is a design choice motivated by the number and type of electronic components located on the circuit board. Further, there are considerations on the spacing of components such that they don’t interfere with each other – see, e.g. Irish (paragraph [0034]). Moreover, sizing a BMS circuit board to have a footprint as large as the footprint of its corresponding battery pack is well-known in the art – see, e.g. Irish (paragraph [0108] and figure 14). Therefore it would have been within the purview of the ordinarily skilled artist before the effective filing date of the claimed invention to size Han’s BMS (150) such that its width exceeds the distance between outside edges of the cell tab columns (and thus have it cover both tab columns) for the purpose of optimizing the number of electronic components and their spacing on the circuit board without undue experimentation and with a reasonable expectation of success. Regarding 4), Irish teaches that the BMS (101) includes a wireless interface (113) for interactions with a user and to communicate battery parameters (paragraph [0022, 0030]). Irish further teaches that the wireless interface (113) may be located on a separate circuit board from the BMS (101) and BMS’s power circuitry used to charge the battery (paragraph [0035]). Irish teaches that communications may be adversely affected by the proximity of the power circuitry of the BMS and the battery itself and thus teaches placing the circuit board with the wireless interface physically isolated from the battery and the power circuitry (paragraph [0036]). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to include a third circuit board (“yet further circuit board”) holding a wireless interface for the purpose of being able to communicate battery parameters to a user. Given the geometry of Han’s battery pack, it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to position the third circuit board (“yet further circuit board”) on the same side as the other two circuit boards – on the tab side of the stack. Given that Irish teaches positioning the wireless interface away from the battery and the power circuitry, it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to position the third circuit board (“yet further circuit board”) further from the stack than the BMS circuit board (“further circuit board”) (and thus also further from the circuit board (170)) in order to minimize interference from the power circuitry to the wireless interface. Regarding 5), displays for indicating a battery charge state on circuit boards in battery packs is ubiquitous in the art – see, e.g. Rejman, who teaches a display unit (108) for indicating the battery charge state located on circuit board (85) (paragraphs [0014, 0080] and figure 5). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to include a display for indicating a battery charge state for the purpose of being able to visually identify the charge state of the battery pack. Given that the third circuit board (“yet further circuit board”) in the combination of the Han and Irish is outermost and has the state of charge data, it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to position the display for indicating the battery charge state on the third circuit board (“yet further circuit board”). Regarding claims 16 and 17, Han as modified by Irish teaches that the third circuit board (“yet further circuit board”) includes a wireless interface (113) for interactions with a user and to communicate battery parameters (Irish’s paragraphs [0022, 0030]). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pre-Grant Publication No. 2012/0328908, hereinafter Han in view of U.S. Pre-Grant Publication No. 2018/0229621, hereinafter Roh, U.S. Pre-Grant Publication No. 2018/0301913, hereinafter Irish, U.S. Pre-Grant Publication No. 2018/0361516, hereinafter Kobayashi and U.S. Pre-Grant Publication No. 2021/0288370, hereinafter Rejman as applied to claim 1 above and further in view of U.S. Pre-Grant Publication No. 2016/0141728, hereinafter Fauteux. Regarding claim 13, Han teaches a battery pack. Han does not specify an electrically driven treatment apparatus. It is well-known in the art to use battery modules including a plurality of pouch battery cells to power instruments such as power tools or garden tools (“treatment apparatus”) – see, e,g. Fauteux (paragraphs [0005, 0024]). Therefore it would have been obvious to the ordinarily skilled artist before the effective filing date of the claimed invention to use Han’s battery pack to power a garden tool or power tool (“treatment apparatus”) without undue experimentation and with a reasonable expectation of success. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim 18 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 4-6 of U.S. Patent No. 12,119,684 in view of U.S. Pre-Grant Publication No. 2012/0328908, hereinafter Han and U.S. Pre-Grant Publication No. 2012/0082881, hereinafter Tsukamoto. Claims 1 and 4-6 of U.S. Patent No. 12,119,684 include all of the claimed limitations except for requiring that the cell tabs are arranged in two tab columns defining an intermediate zone, the circuit board is disposed in the intermediate zone and the casting compound is thermally conductive. The arrangement of cells such that their cell tabs form two columns and the placement of a circuit board in the intermediate zone between the two columns is a common configuration in the art – see, e.g. Han (paragraphs [0044, 0046, 0050, 0051] and figures 1, 2 and 11). The use of a thermally conductive casting compound to enclose a circuit board and cell contacts is also well-known – see, e.g. Tsukamoto (paragraph [0107] and figure 8]). Therefore it would have been obvious to the ordinarily skilled artist to form arrange the cell tabs in two tab columns and position the circuit board in the intermediate zone for the purpose of maximizing space in the assembly and to use a thermally conductive casting compound for the purpose of allowing for heat transfer out of the assembly. Response to Arguments Applicant’s newly added limitations have been considered. However, after further search and consideration, the combination of the Han, Roh, Irish, Kobayashi and Rejman references has been provided, as recited above, to address the amended claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US PG Pub 2010/0221584. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LILIA V NEDIALKOVA whose telephone number is (571)270-1538. The examiner can normally be reached 8.30 - 5.00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Miriam Stagg can be reached at 571-270-5256. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. LILIA V. NEDIALKOVA Examiner Art Unit 1724 /MIRIAM STAGG/Supervisory Patent Examiner, Art Unit 1724
Read full office action

Prosecution Timeline

May 08, 2020
Application Filed
Mar 05, 2022
Non-Final Rejection — §102, §103, §DP
Aug 12, 2022
Response Filed
Oct 30, 2022
Final Rejection — §102, §103, §DP
Feb 10, 2023
Request for Continued Examination
Feb 13, 2023
Response after Non-Final Action
Mar 20, 2023
Non-Final Rejection — §102, §103, §DP
Jun 28, 2023
Response Filed
Oct 21, 2023
Final Rejection — §102, §103, §DP
Jan 26, 2024
Notice of Allowance
Jan 30, 2024
Applicant Interview (Telephonic)
Jan 30, 2024
Examiner Interview Summary
Apr 19, 2024
Response after Non-Final Action
Apr 26, 2024
Response after Non-Final Action
Jun 09, 2024
Response after Non-Final Action
Aug 13, 2024
Response after Non-Final Action
Aug 13, 2024
Response after Non-Final Action
Aug 22, 2024
Response after Non-Final Action
Aug 23, 2024
Response after Non-Final Action
Aug 23, 2024
Response after Non-Final Action
Mar 04, 2025
Response after Non-Final Action
Mar 04, 2025
Response after Non-Final Action
Apr 04, 2025
Response after Non-Final Action
Jun 03, 2025
Response after Non-Final Action
Jul 10, 2025
Response after Non-Final Action
Sep 08, 2025
Request for Continued Examination
Sep 09, 2025
Response after Non-Final Action
Oct 02, 2025
Response after Non-Final Action
Jan 06, 2026
Non-Final Rejection — §102, §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
55%
Grant Probability
77%
With Interview (+21.9%)
3y 4m
Median Time to Grant
High
PTA Risk
Based on 423 resolved cases by this examiner. Grant probability derived from career allow rate.

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