Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The Final rejection mailed on June 1, 2026 is withdrawn and a new ground of rejection will be issue in this office action.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 31 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The original specification never discloses the second electrode comprises a first region and a second region, wherein the first region is electrically isolated from the second region as claimed in claim 31.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4, 7 and 29 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Zhou et al.
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Regarding claim 1, Zhou et al. shows all the elements of the claimed invention in fig. 4A. It is a stiffener for an electronic package, comprising: a first layer [41], wherein the first layer is conductive; a second layer [71] over the first layer, wherein the second layer is insulative; a third layer [42] over the second layer, wherein the third layer is conductive; and a leg (see annotated fig. 4A above) attached to the third layer, wherein the leg extends towards the first layer, and wherein an entirety of the leg does not vertically overlap with the second layer, wherein the leg and the third layer are a monolithic structure (metal layer), and wherein the leg comprises a first bend and a second bend.
Regarding claim 4, Zhou et al. further discloses the leg is one leg in a plurality of legs (there are also a leg in each of a layer [43] and a layer [44]) that extend towards the first layer [41].
Regarding claim 7, Zhou et al. further discloses fourth layer [72] over the third layer [42], wherein the fourth layer [72] is an insulating material; a fifth layer [43] over the fourth layer, wherein the fifth layer is a conductive material; and a second leg (right side of layer [43]) attached to the fifth layer, wherein the second leg extends towards the first layer [41].
Regarding claim 29, Zhou et al. shows all the elements of the claimed invention in fig. 4A. It is a stiffener for an electronic package, comprising: an outer shell (M2, 82]; and
a capacitor within the outer shell, wherein the capacitor comprises: a first electrode [41]; a first dielectric layer [71] over the first electrode; a second electrode [42] over the first dielectric layer, wherein the second electrode has a leg (see annotated fig. 4A in page 4), wherein an entirety of the leg does not vertically overlap with the first dielectric layer; a second dielectric layer [72] over the second electrode; and a third electrode [43] over the second dielectric layer.
Allowable Subject Matter
Claims 10, 11, 14, 15, 17-24 and 27-28 allowed.
Claims 2, 3, 8, 9 and 30 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: None of the prior art discloses the first layer, the second layer, and the third layer are rings with an interior edge and an exterior edge as claimed in claim 2. None of the prior art discloses the first layer and the fifth layer are configured to be connected to a first voltage source, and wherein the third layer is configured to be connected to a second voltage source as claimed in claim 8. None of the prior art discloses a conductive sheet between the plurality of pins, wherein the conductive sheet has a height greater than the height of the plurality of pins as claimed in claim 10. None of the prior art discloses a first layer over the capacitor; and a second layer below the capacitor, wherein the first layer comprises a first arm that wraps around the capacitor and is coplanar with the second layer, and wherein the second layer comprises a second arm that wraps around the capacitor and is coplanar with the first layer as claimed in claim 15. None of the prior art discloses a dielectric layer over the third layer; and an electrode over the dielectric layer as claimed in claim 23. None of the prior art discloses the first layer and the fifth layer are configured to be connected to a first voltage source, and wherein the third layer is configured to be connected to a second voltage source as claimed in claim 27. None of the prior art discloses the third electrode has a second leg, and wherein bottom surfaces of the leg and the second leg are coplanar with one another as claimed in claim 30.
Conclusion
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/STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818