Prosecution Insights
Last updated: August 18, 2026
Application No. 17/133,373

SYSTEMS AND METHODS FOR PARITY-BASED FAILURE PROTECTION FOR STORAGE DEVICES

Final Rejection §103
Filed
Dec 23, 2020
Priority
Oct 30, 2020 — provisional 63/108,196
Examiner
KO, CHAE M
Art Unit
2100
Tech Center
2100 — Computer Architecture & Software
Assignee
KIOXIA Corporation
OA Round
8 (Final)
89%
Grant Probability
Favorable
9-10
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
594 granted / 667 resolved
+34.1% vs TC avg
Minimal +5% lift
Without
With
+4.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
10 currently pending
Career history
677
Total Applications
across all art units

Statute-Specific Performance

§101
8.8%
-31.2% vs TC avg
§103
43.8%
+3.8% vs TC avg
§102
18.8%
-21.2% vs TC avg
§112
12.6%
-27.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 667 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This action is in response to the amendment filed 01/16/2026. Claims 1-5, 11-20 have been amended. Claim 8 remains canceled. Claims 21 has been added. Claims 1-6 and 11-21 are rejected. Claims 7, 9 and 10 are objected to. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-4, 11-14, and 16-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamamoto et al. (PG Pub. 2003/0,061,441) [hereafter Yamamoto], Islam et al. (US Pat. 5,774,641) [hereafter Islam and further in view of Kotzur et al. (PG Pub. 2021/0,96,950 A1) [hereafter Kotzur]. As per claim 1, Yamamoto teaches: the first storage device comprising: a non-volatile storage: and (Yamamoto, Fig. 3, #4-1, ¶ [0150], "It is assumed in the above description that RAID data or parity is stored in the disk drives 4-1 to 4-3 constituting the virtual RAID 40"; and Fig. 3) a controller in the first storage device configured to: (Yamamoto, ¶ [0089], "A cluster RAID controller 13-1 to 13-3 comprises a virtual device 131-1 to 131-3, a command converter 132-1 to 132-3, a command transfer unit 133-1 to 133-3, a parity calculator 134-1 to 134-3 and a disk controller 136-1 to 136-3. The parity calculator 134-1 to 134-3 has a buffer 135-1 to 135-3") transfer new data from a second storage device of the plurality of storage devices to the first storage device; (Yamamoto, ¶ [0134], "the cluster RAID controller 13-1 in the computer 1-1 transfers the new data d2' to the cluster RAID controller 13-2 in the computer 1-2 via the network 2") determine an XOR result by performing an XOR operation of the new data from the second storage device and existing data, the existing data is stored in the non-volatile storage of the first storage device at the logical address, and (Yamamoto, ¶ [0135], "the cluster RAID controller 13-2 in the computer 1-2 reads the old data d2 from the disk drive 4-2"; ¶ [0136], "Next, as indicated by step S43, the cluster RAID controller 13-2 in the computer 1-2 calculates the exclusive-OR using the new data d2' transferred from the cluster RAID controller 13-1 in the computer 1-1 and the old data d2 read from the cluster RAID control 13-2 in the computer 1-2. Namely, the exclusive-OR operation ma=d2' XOR d2 is performed and the intermediate result ma is obtained"; and ¶ [0137], "Further, as indicated by step S 44, the cluster RAID controller 13-2 in the computer 1-2 updates the old data d2 stored in the disk drive 4-2 to new data d2"; wherein computer 1-2 is the first storage device and the computer 1-1 is the second storage device) Yamamoto does not explicitly teach: A first storage device in a system comprising a plurality of storage devices in communication with a host However, Islam in an analogous art teaches: A first storage device in a system comprising a plurality of storage devices in communication with a host (Islam, Col. 6, lines 16-19, "According to the present invention, any one of the DRAID drives 100-108 connected to a host data processing System may be placed in the "normal" mode or the "DRAID mode") It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Yamamoto by having a request sent from a host, as taught by Islam. One of ordinary skill in the art would have been motivated to use the methods of Islam because it will improve scalability in performance and cost. (Islam, Col. 3, lines 30-38). Yamamoto does not specifically teach: receive a request to update parity bits, wherein the request is separate from a request to write data associated with the parity bits and includes a logical address corresponding to the parity bits; in response to receiving the request to update parity bits, in response to receiving the request to update parity bits, transfer new data from a second storage device of the plurality of storage devices to the first storage device wherein the XOR operation comprises a single XOR operation to update old parity bits However, Kotzur in an analogous art teaches: receive a request to update parity bits, wherein the request is separate from a request to write data associated with the parity bits and includes a logical address corresponding to the parity bits; (Kotzur, ¶ [0067-0074], parity update operation; ¶ [0043], write command is from the host and RAID storage controller generate and transmit multi operation command such as NVMe WRITE WITH XOR multi-operation command, ¶ [0048], the command 604 may be a multi-operation command being able to identify data using LBA, ¶ [0067], generate a parity update command to the RAID parity data storage device, ¶ [0071]) in response to receiving the request to update parity bits, transfer new data from a second storage device of the plurality of storage devices to the first storage device (Kotzur, ¶ [0070], “perform a Direct Memory Access (DMA) operation 902 that accesses the interim parity data 812 that is stored in the second buffer subsystem 308b in the RAID primary data storage device 206b, and writes that interim parity data 812 to its first buffer subsystem 308a” wherein the XOR operation comprises a single XOR operation to update old parity bits (Kotzur, ¶ [0071], “perform an XOR operation 904 using the parity data 502 in its storage subsystem 306 and the interim parity data 812 in its first buffer subsystem 308a in order to produce parity data 908, and then perform an overwrite operation 906 to overwrite the parity data 502 with the parity data 908 in its storage subsystem 306”) It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teachings of Kotzur into the teachings of Yamamoto to provide a method to receive a request to update parity bits, wherein the request is separate from a request to write data associated with the parity bits and includes a logical address corresponding to the parity bits; and wherein the XOR operation comprises a single XOR operation to update old parity bits in response to receiving the request to update parity bits. One of ordinary skill in the art would have been motivated to use the methods of Kotzur because offloading parity update operations increases the ability of the RAID storage controller device to scale with high performance RAID storage devices (Kotzur, ¶ [0076]). As per claim 2, the rejection of claim 1 is incorporated and Yamamoto/Islam/Kotzur combination further teaches: wherein the request to update parity bits is received from a host in communication with the first storage device (Islam, Col 9, lines 19-22, "As illustrated, data drive 170 receives a request to write data from the host data processing system, as illustrated at block 172") As per claim 3, the rejection of claim 1 is incorporated and Yamamoto/Islam/Kotzur combination further teaches: wherein the request is received from the second storage device (Yamamoto, ¶ [0133], 'the task 11-1 in the computer 1-1 generates a global command to specify rewriting the old RAID data d2 stored in the disk drive 4-2 connected to the computer 1-2 to new RAID data d2") As per claim 4, the rejection of claim 1 is incorporated and Yamamoto/Isam/Kotzur combination further teaches : wherein the request to update parity bits comprises a reference to a buffer of the second storage device (Kotzur, Fig. 3, ¶ [0070]) Claims 11-14 are method claims corresponding to the storage device claims 1-4 respectively and are rejected for the same reasons set forth in connection of the rejections of claims 1-4 above. Claims 16-19 are computer-readable media claims corresponding to the storage device claims 1-4 respectively and are rejected for the same reasons set forth in connection of the rejections of claims 1-4 above. In addition, Islam in an analogous art teaches: a non-transitory computer-readable media comprising computer-readable instructions, such that, when executed, causes a processor of a first storage device in a system with a plurality of storage devices in communication with a host (Islam, Col. 6, lines 16-19, instructions to operate the data processing system in different modes). It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Yamamoto by having a request sent from a host, as taught by Islam. One of ordinary skill in the art would have been motivated to use the methods of Islam because it will improve scalability in performance and cost. (Islam, Col. 3, lines 30-38). Claim(s) 5, 6, 15, 20 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamamoto, Islam, Kotzur, and further in view of Subbarao et al. (US Pat. 10,409,511) [hereafter Subbarao]. As per claim 5, the rejection of claim 4 is incorporated and Yamamoto/Isam/Kotzur combination further teaches: the controller performs a read operation to read the existing data from the non-volatile storage into the existing data drive buffer (Islam, Col. 3, lines 42-49, "When a selected storage unit receives a write command, the selected storage unit reads old data from the logical address specified in the write command, and temporarily stores such old data in a buffer. Next, the selected storage unit writes new data from the host data processing system to a location specified in the write command. Thereafter, an XOR operation is performed in the selected storage unit between the new data and the old data to produce intermediate data") The combination does not specifically teach: an existing data drive buffer and a new data drive buffer, wherein in response to receiving the request to update parity bits, the controller transfers the new data from the buffer of the second storage device to the new data drive buffer using a transfer mechanism based on the reference of the buffer of the second storage device However, Subbarao in an analogous art teaches: an existing data drive buffer and a new data drive buffer, wherein in response to receiving the request to update parity bits, the controller transfers the new data from the buffer of the second storage device to the new data drive buffer using a transfer mechanism based on the reference of the buffer of the second storage device (Subbarao, Col. 20, lines 47-58, "Buffer-to-buffer transfer 332.1 may allow the parity storage device to pull data from the buffer of the destination storage device for a write request and write it to local buffers 306. For example, buffer-to-buffer transfer 332.1 in the parity storage device may use an RDMA command to access a buffer in the other storage device as identified by parity host FTL updater 322.2. Buffer-to-buffer transfer 332.1 may allocate a XOR buffer using buffer access module 326 and/or as identified by a remote buffer manager. Buffer-to-buffer transfer 332.1 may transfer the host write data in the buffers of write data storage device to the XOR buffer") It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Yamamoto/Islam/Kotzur combination by having the transfer of new data from a buffer to a new data buffer, as taught by Subbarao. One of ordinary skill in the art would have been motivated to make this modification because the modification will improve reliability and increase scalability. (Subbarao, Col. 4, lines 20-34). As per claim 6, the rejection of claim 4 is incorporated: The combination does not specifically teach: an XOR result drive buffer, wherein the controller is further configured to: store the XOR result in the XOR result drive buffer after being determined; and write the XOR result to the non-volatile storage However, Subbarao in an analogous art teaches: an XOR result drive buffer, wherein the controller is further configured to: store the XOR result in the XOR result drive buffer after being determined (Subbarao, Col. 20, lines 47-67 and Col. 21, lines 1-4, "Buffer-to-buffer transfer 332.1 may allow the parity storage device to pull data from the buffer of the destination storage device for a write request and write it to local buffers 306. For example, buffer-to-buffer transfer 332.1 in the parity storage device may use an RDMA command to access a buffer in the other storage device as identified by parity host FTL updater 322.2. Buffer-to-buffer transfer 332.1 may allocate a XOR buffer using buffer access module 326 and/or as identified by a remote buffer manager. Buffer- to-buffer transfer 332.1 may transfer the host write data in the buffers of write data storage device to the XOR buffer. Parity device XOR 332.2 may read local parity stripe data from NVM devices 140.1 using NVM manager 324, use XOR module 314 to XOR the contents of the XOR buffer with the local parity stripe data, and write the resulting data back to the XOR buffer. The contents of the XOR buffer may then be written to NVM devices 140.1 for parity storage. In some embodiments, the contents of the XOR buffer may be written to NVM devices 140.1 when a separate command is received from a remote buffer manager, such as SVC 110. For example, XOR buffer may be allowed to accumulate a full stripe of information and then receive a buffer flush command to write the full parity stripe data to NVM devices 140.1") write the XOR result to the non-volatile storage (Subbarao, Col. 20, lines 47-67 and Col. 21, lines 1-4, "Buffer-to-buffer transfer 332.1 may allow the parity storage device to pull data from the buffer of the destination storage device for a write request and write it to local buffers 306. For example, buffer-to-buffer transfer 332.1 in the parity storage device may use an RDMA command to access a buffer in the other storage device as identified by parity host FTL updater 322.2. Buffer-to-buffer transfer 332.1 may allocate a XOR buffer using buffer access module 326 and/or as identified by a remote buffer manager. Buffer-to-buffer transfer 332.1 may transfer the host write data in the buffers of write data storage device to the XOR buffer. Parity device XOR 332.2 may read local parity stripe data from NVM devices 140.1 using NVM manager 324, use XOR module 314 to XOR the contents of the XOR buffer with the local parity stripe data, and write the resulting data back to the XOR buffer. The contents of the XOR buffer may then be written to NVM devices 140.1 for parity storage. In some embodiments, the contents of the XOR buffer may be written to NVM devices 140.1 when a separate command is received from a remote buffer manager, such as SVC 110. For example, XOR buffer may be allowed to accumulate a full stripe of information and then receive a buffer flush command to write the full parity stripe data to NVM devices 140.1") It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by the Yamamoto/Islam/Clark/Shibata combination by having XOR result being stored in a XOR result drive buffer and then writing it into a non-volatile storage, as taught by Subbarao. One of ordinary skill in the art would have been motivated to make this modification because the modification will improve reliability and increase scalability. (Subbarao, Col. 4, lines 20-34). Claim 15 is a method claim corresponding to the storage device claim 5 and is rejected for the same reasons set forth in connection of the rejection of claim 5 above. Claim 20 is a computer-readable media claim corresponding to the storage device claim 5 and is rejected for the same reasons set forth in connection of the rejection of claim 5 above. Claim 21 is a device claim corresponding to the storage device claims 5 and 6 combined and is rejected for the same reasons set forth in connection of the rejections of the claims 5 and 6 above. Allowable Subject Matter Claims 7, 9 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The reasons as to why the claims 7, 9 and 10 are allowable are provided in the OFFICE ACTION mailed 10/14/2025 and remain same pas provide as the amendment submitted did not affect the scope of the objected claims. Response to Arguments Applicant’s arguments, see pages 7-8, filed 01/16/2026, with respect to the rejection(s) of claim(s) 1-6, 11-21 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of newly introduced elements through the Applicants’ amendments. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. PG Pub. 2018/0,341,616 A1 discloses a data storage system wherein a data management functions are offloaded from a main controller to individual storage devices in a multi-device storage environment. Selected drives operate in parallel to generate parity in accordance with a parity offload arrangement. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHAE M KO whose telephone number is (571)270-3886. The examiner can normally be reached M-F 9 am - 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ashish Thomas can be reached at 571-272-0631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHAE M KO/Primary Examiner, Art Unit 2114
Read full office action

Prosecution Timeline

Show 34 earlier events
Sep 11, 2025
Request for Continued Examination
Sep 24, 2025
Response after Non-Final Action
Oct 14, 2025
Non-Final Rejection mailed — §103
Dec 31, 2025
Interview Requested
Jan 12, 2026
Applicant Interview (Telephonic)
Jan 12, 2026
Examiner Interview Summary
Jan 16, 2026
Response Filed
Aug 03, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

9-10
Expected OA Rounds
89%
Grant Probability
94%
With Interview (+4.8%)
2y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 667 resolved cases by this examiner. Grant probability derived from career allowance rate.

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