CTNF 17/134,335 CTNF 82161 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claims 1-9, 11-13, 16-20 are presented for examination. Continued Examination Under 37 CFR 1.114 07-42-04 AIA A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/23/26 has been entered. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim 1-5, 7, 12-13, 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Clifton, US Patent Application Publication 2019/0311129 (hereinafter Clifton) in view of Yanamadala et al., US Patent Application Publication 2021/0334415 (hereinafter Yanamadala), further in view of Schuttenberg et al., US Patent Application Publication 2021/0303303 (hereinafter Schuttenberg) . Regarding claim 1, Clifton teaches: An apparatus comprising: a plurality of microarchitectural structures (see e.g. fig. 2); speculation vulnerability mitigation hardware to implement one or more of a plurality of speculation vulnerability mitigation mechanisms (see e.g. para. [0054-8], speculation denial instruction or memory barrier); and speculation vulnerability detection hardware to detect vulnerability to a speculative execution attack and to provide to software an indication of speculative execution attack vulnerability (see e.g. para. [0014], [0019], [0059-65], vulnerabilities are detected and reported by a scanner). Clifton fails to explicitly teach the speculation vulnerability mitigation mechanisms including hardening one or more of the plurality of microarchitectural structures. Yanamadala teaches hardening one or more of a plurality of microarchitectural structures in response to an attack against a computer system (see e.g. para. [0105]). Before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to combine the teachings of Clifton and Yanamadala to have the speculation vulnerability mitigation mechanisms include hardening one or more of the plurality of microarchitectural structures. This would have provided improved security by providing a resilient defense against attacks such as discussed by Yanamadala (see para. [0092]). Clifton in view of Yanamadala fails to explicitly teach an instruction decoder to decode an instruction to configure the at least one of the one or more of the plurality of speculation vulnerability mitigation mechanisms, the instruction to indicate which of the one or more microarchitectural structures to harden. Schuttenberg teaches an instruction decoder to decode an instruction (see e.g. para. [0076-80]) that indicates which security state to be used and thereby which structures to be hardened (see e.g. para. [0084]). Before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to combine the teachings of Clifton, Yanamadala and Schuttenberg to include an instruction decoder to decode an instruction to configure the at least one of the one or more of the plurality of speculation vulnerability mitigation mechanisms, the instruction to indicate which of the one or more microarchitectural structures to harden. This would have provided an advantage of increased flexibility of the system to adapt to changing security requirements to ensure security of the system. Regarding claim 2, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 1, wherein detection is based on conditions indicative of a speculative execution attack (see e.g. para. [0017], the detection is to locate vulnerabilities to a speculative execution attack). Regarding claim 3, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 1, wherein the indication includes a prediction (see e.g. para. [0021], potential vulnerability). Regarding claim 4, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 3, wherein the indication includes a confidence level for the prediction (see e.g. Yanamadala para. [0102]). Regarding claim 5, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 1, wherein the indication includes a category of speculative execution attack (see e.g. para. [0065-6], a potential Spectre vulnerability). Regarding claim 7, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 1, wherein at least one of the one or more of the plurality of speculation vulnerability mitigation mechanisms is configurable by the software (see e.g. para. [0021]). Claims 12-13 are rejected for reasons corresponding to those given above for claim 1 (see also Clifton para. [0051]). Claims 19-20 are rejected for reasons corresponding to those given above for claim 1 (see also Yanamadala para. [0058], interface for communicating between systems on chip or off chip) . 07-21-aia AIA Claim s 6, 8, 11, 16 are rejected under 35 U.S.C. 103 as being unpatentable over Clifton in view of Yanamadala and Schuttenberg, further in view of Conti et al., US Patent Application Publication 2007/0226795 (hereinafter Conti) . Regarding claim 6, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 1. Clifton in view of Yanamadala and Schuttenberg fails to explicitly teach further comprising one or more registers to provide the indication to software. Conti teaches using registers to log and report access errors for security violation handling (see e.g. para. [0178-9]). Before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to combine the teachings of Clifton, Yanamadala, Schuttenberg and Conti to include one or more registers to provide the indication to software. This would have provided a simple and well-known storage element to retain information for quick access. Regarding claim 8, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 7. Clifton in view of Yanamadala and Schuttenberg fails to explicitly teach further comprising one or more registers to provide for the software to configure the at least one of the one or more of the plurality of speculation vulnerability mitigation mechanisms. Conti teaches using registers to provide configuration information for security violation strategies (see e.g. para. [0187]). Before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to combine the teachings of Clifton, Yanamadala, Schuttenberg and Conti to include one or more registers to provide for the software to configure the at least one of the one or more of the plurality of speculation vulnerability mitigation mechanisms. This would have provided a simple and well-known storage element to retain information for quick configurability to improve mitigation adaptability. Regarding claim 11, Clifton in view of Yanamadala and Schuttenberg teaches or suggests: The apparatus of claim 1. Clifton in view of Yanamadala and Schuttenberg fails to explicitly teach wherein the plurality of speculation vulnerability mitigation mechanisms includes a restricted speculative execution mode. Conti teaches a restricted mode for security violation mitigation (see e.g. para. [0187], [0193], [0389]). Before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to combine the teachings of Clifton Yanamadala, Schuttenberg and Conti such that the plurality of speculation vulnerability mitigation mechanisms includes a restricted speculative execution mode. This would have provided an advantage of increasing the security of the system by restricting the access of potentially malicious code. Claim 16 is rejected for reasons corresponding to those given above for claim 6 . 07-21-aia AIA Claim s 9, 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Clifton in view of Yanamadala, Schuttenberg, and Conti, further in view of Patne et al., US Patent Application Publication 2015/0373035 (hereinafter Patne) . Regarding claim 9, Clifton in view of Yanamadala, Schuttenberg, and Conti teaches or suggests: The apparatus of claim 8. Clifton in view of Yanamadala, Schuttenberg, and Conti fails to explicitly teach wherein at least one of the one or more registers is to store a weights vector including a plurality of elements, each element to indicate one of a plurality of weights to apply to a corresponding one of the plurality speculation vulnerability mitigation mechanisms. Patne teaches using a series of weight values to apply to side-channel mitigation mechanisms (see e.g. para. [0092], [0107], [0129]). Before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to combine the teachings of Clifton, Yanamadala, Schuttenberg, Conti, and Patne such that at least one of the one or more registers is to store a weights vector including a plurality of elements, each element to indicate one of a plurality of weights to apply to a corresponding one of the plurality speculation vulnerability mitigation mechanisms. This would have provided an advantage such as discussed by Patne to “allow the computing device to focus its monitoring operations on a small number of features that are most important for determining whether to perform obfuscation operations”, which “improves the performance and power consumption characteristics of the computing device” (see para. [0114]). Claims 17-18 are rejected for reasons corresponding to those given above for claim 9 . Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-35 AIA Claim s 1-9, 11-13, 16-20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 1-20 of copending Application No. 17/134347 (reference application) in view of Clifton . Although the claims at issue are not identical, they are not patentably distinct from each other because the claims in the instant application are substantially similar to the claims in the reference application. Before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to combine the teachings of the reference application and Clifton to implement speculation vulnerability mitigation mechanisms in order to improve the security of the system . This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Response to Arguments Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN M LINDLOF whose telephone number is (571)270-1024. The examiner can normally be reached Mon-Tue 8:30-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached at 5712703995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN M LINDLOF/Primary Examiner, Art Unit 2183 Application/Control Number: 17/134,335 Page 2 Art Unit: 2183 Application/Control Number: 17/134,335 Page 3 Art Unit: 2183 Application/Control Number: 17/134,335 Page 4 Art Unit: 2183 Application/Control Number: 17/134,335 Page 5 Art Unit: 2183 Application/Control Number: 17/134,335 Page 6 Art Unit: 2183 Application/Control Number: 17/134,335 Page 7 Art Unit: 2183 Application/Control Number: 17/134,335 Page 8 Art Unit: 2183 Application/Control Number: 17/134,335 Page 9 Art Unit: 2183 Application/Control Number: 17/134,335 Page 10 Art Unit: 2183 Application/Control Number: 17/134,335 Page 11 Art Unit: 2183 Application/Control Number: 17/134,335 Page 12 Art Unit: 2183 Application/Control Number: 17/134,335 Page 13 Art Unit: 2183
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