DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/25/2026 has been entered.
Response to Amendment
This office action is responsive to amendment filed on 02/25/2026. Claims 1-20 are pending.
Response to Arguments
In response to applicant’s argument regarding rejection under 35 U.S.C. 101 on page 12, “As an initial point of disagreement with the original rejection, the Office Action (top of page 4) implies that technological/performance improvements that result from mathematical operations/concepts are not considered in the patent eligibility analysis. This would be directly counter to the Federal Circuit decisions in at least Enfish v. Microsoft and McRO v. Bandi. In both of those cases, mathematical concepts (e.g., self-referential table) led directly to the performance improvements which merited the finding of patent eligibility.”
Examiner respectfully disagrees because the claims of Enfish is specifically directed to a self-referential table for a computer database that functioned differently than conventional database structures according to the specification at issue, such that claims of Enfish recites a means for configuring a memory according to logical table including logical rows and logical columns that reflects the improvement, rather than the mathematical concept. Furthermore, the case of McRO, the claim is directed to a process automatically animated characters using particular information and techniques - an improvement over manual three-dimensional animation techniques that was not directed to an abstract idea. Unlike these two cases, any arguably improvements such as saving more buffer space, avoid suspension, or speed up reading data by compressing the data and speed up the convolution operation, are a direct sequence of performing the abstract idea of pre-processing the data before storing, such as dividing each data block into a plurality of non-overlapping areas and performing a two level compression comprising a first level and a second level compression on each of the input data blocks, wherein the compressed data includes non-zero data elements in the matrix. Thus, by performing the step of preprocessing the data to result in having a compressed data and resulting in the arguably improvement above. MPEP 2106.05(a) “It is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements.” In other words, any arguably improvements are the result of performing the preprocessing data [i.e., abstract idea] to save space for storing. Thus, improvement provided by the judicial exception is not a technological improvement under 101 analyses. Accordingly, the instant claim is different from the claims of Enfish and McRO.
Applicant further asserted on page 13-14, “Claim 1 is directed to a specific technological improvement in CNN accelerator memory management and cache utilization, not an abstract idea …and specifies a detailed sequence of hardware-oriented data handling operations … wherein these operation reduce redundant memory access and cache contention during CNN execution”
Examiner respectfully disagree because as explained above, any arguably improvement is a direct consequence of performing the abstract idea of pre-processing data, such as dividing input data blocks into a plurality of non-overlapping areas, performing two-level compression, and two level decompression, and the step of storing non-overlapping areas into a cache is recited at a high level of generality and is merely considered as insignificant extra solution activity under step 2A prong two and determined to be well-understood, routing and conventional under step 2B. MPEP 2106.05(a) “It is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements.”, and the operations of dividing data, performing two level compression and decompression are characterized as the judicial exception. thus, such operations alone cannot provide the improvement.
Applicant further asserted on page 14, “The specification makes clear that the invention is rooted in improving hardware efficiency of CNN accelerators”, and pointed to recitation of [0076, 0087, 0091, 00107].
Examiner respectfully disagrees because the claim merely recites the step of storing data [i.e., the non-overlapping areas] in a cache, such step of storing is recited at a high level of generality and almost considered as insignificant extra solution activity under step 2A prong two and determined to be well-understood, routine, and conventional under step 2B. Furthermore, the claim merely recites a step of dividing each of the input data blocks, but does not recite the parallelism processing as described in [0087]. Moreover, the abstract idea limitations are characterized as mathematical concepts, rather than mental processes, thus applicant’s argument related to the process being impossible by the human brain is irrelevant.
Applicant further pointed to [0006] and [00154] and asserted that the claims provide an improvement to computer or accelerator performance on page 15.
Examiner respectfully disagrees because as explained above, any arguably improvement is a direct consequence of performing the abstract idea of pre-processing data, such as dividing input data blocks into a plurality of non-overlapping areas, performing two-level compression, and two level decompression. MPEP 2106.05(a) “It is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements.” In other words, any arguably improvements are the result of performing the preprocessing data [i.e., abstract idea] to save space for storing. For example, performing compression, such as first level compression eliminates zero value elements in matrix, which results the system to perform less computation in convolution operation because multiplying zero values are unnecessary (see at least [0038]).
Applicant further asserted on page 15-16 describing the concept of parallel processing resulting from dividing input feature maps and performing first and second level compression to reduce storage size to provide the improvement and yielding a concrete technological benefit.
Examiner respectfully disagrees because the claim does not recite the concept of parallel processing. Furthermore, the step of performing compression is abstract idea that reduces storage size. Thus, any arguably improvement is a direct consequence of performing the abstract idea as explained above.
Applicant further asserted on page 16, “nothing in the Office Action identifies this specific multi-stage compression plus selective cache architecture as routine or conventional. Under Berkheimer, whether such an arrangement is conventional is a factual issue, and the Office Action provides no evidentiary support in this regard.”
Examiner respectfully disagrees because the multi-stage compression is characterized as judicial exception under step 2A prong one, thus Examiner is not required to provide support to show such limitation is routine or conventional (see MPEP 2106.04(I) “The Supreme Court’s decisions make it clear that judicial exceptions need not be old or long-prevalent, and that even newly discovered or novel judicial exceptions are still exceptions” and MPEP 2106.05(I) “a claim for a new abstract idea is still an abstract idea”). Furthermore, for the step of storing data in a cache, Examiner has pointed to MPEP 2106.05(d)(II)(iv) to show evidence that the court has decided that mere storing data in am memory is routine and conventional, when recited at a high level of generality (see OA 01/08/2026 page 7-8).
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Claim Objections
Claims 1-20 are objected to because of the following informalities:
Claim 1 line 23-24; claim 11 line 24-25; “wherein the two-level compression, … , and reconstruction of the input data blocks is structured” should be “wherein the two-level compression, … , and reconstruction of the input data blocks are structured”.
Claim 2 line 3-4 recites “by the data processing module”, such module was deleted in claim set filed on 11/21/2025. Thus, there is lack of antecedent for such limitation. Examiner suggests removing such limitation from claim 2.
Dependent claims are also objected for inheriting the same deficiencies in which claims they depend on.
Appropriate correction is required.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 line 24-25 recites “during execution of the convolution operation by the CNN accelerator”. It is unclear whether “the convolution operation” is referring to the convolution operation recited in claim 1 line 1-2 or claim 1 line 20. For examination purposes, Examiner interprets such convolution operation is referring to the convolution operation recited in claim 1 line 20.
Claim 11 line 25-26 recites “during execution of the convolution operation by the CNN accelerator”. It is unclear whether “the convolution operation” is referring to the convolution operation recited in claim 11 line 1-2, line 7 or claim 11 line 21. For examination purposes, Examiner interprets such convolution operation is referring to the convolution operation recited in claim 1 line 21. Examiner suggests amending to remove the step of “perform the convolution operation on each of the input data blocks” recited in claim 11 line 7, and amending line 21 to recites “perform the convolution operation on the plurality of generated input data blocks”.
Claim 11 line 7 recites “perform the convolution operation on each of the input data blocks” and claim 11 line 21 recites “perform a convolution operation on the plurality of generated input data blocks”. It is unclear whether the input data blocks and the generated input data blocks are the same input data blocks or different input data blocks. Figure 5 illustrates a calculator 536 to perform convolution operation on the input data blocks and figure 6D step S609D illustrates step to perform convolution operations on the generated input data blocks and [00108] describes S609D, such that the computing device 500 sends the input data block to the calculator 536 for convolution operation to generate an output data block. Accordingly, input data blocks and generated input data blocks are the same. Thus, the claim limitations seems to be redundant. For examination purposes, Examiner interprets the two limitations of performing convolution operation are the same. (examiner suggests removing the limitation at claim 11 line 7)
Claim 19 line 2 recites “the CNN accelerator is further configured to the at least one sub-area”. it is not clear what operation does the CNN accelerator is further configured to do. For examination purposes, Examiner interprets the CNN accelerator is further configured to read the at least one sub-area as recited in claim 9 line 3.
Dependent claims are also rejected for inheriting the same deficiencies in which claims they depend on.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract idea without significantly more.
Claims 1 recites a convolution operation method.
Under Prong One of Step 2A of the USPTO current eligibility guidance (MPEP 2106), the claim recites a convolution operation method, for performing a convolution operation on an input feature map to generate a corresponding output feature map, wherein the input feature map is divided into a plurality of input data blocks, the input feature map is an input of a current convolutional layer and the convolution operation method comprises: divide each of the input data blocks into a plurality of non-overlapping areas, wherein each of the non-overlapping areas of each of the input data blocks does not overlap with any adjacent input data block, wherein there is an overlapping area between any two adjacent input data blocks; perform a two-level compression comprising a first-level compression and a second level compression on each of the input data blocks and perform a second-level decompression; generate each input data block according to the area corresponding to each input data block, which has undergone the first-level compression and perform a convolution operation on the plurality of generated input data blocks to generate the output feature map, wherein the output feature map is an output of the current convolutional layer and is taken as an input of a next convolutional layer; wherein the second-level compression is a Huffman algorithm or a Lempel-Ziv & Welch (LZW) algorithm; wherein data that has undergone the first-level compression comprises a Length field, a Mask field, and a DesData field; wherein the DesData field contains all non-zero elements in matrix; wherein the Mask field indicates a number of elements in the matrix and marks the position of non-zero elements in the matrix; wherein the Length field indicates the length of the DesData field; wherein the second-level compression is performed after the first -level compression. Such limitations cover mathematical calculations, relationship, and/or formula (such as dividing input data, performing two level compression using Huffman algorithm or LZW algorithm on each of the divided input data, and a first level compression having Length field, a Mask field, and a DesData field, generating the divided input data, wherein fig 6F-1 describes step S613F to generate divided input data by performing depression algorithm and [00129] describes merging data to generate input data block, and performing convolution operation on the divided input data to generate output data, wherein a convolutional layer is merely described as a layer for performing convolution operation, and having output of one layer as input to the next layer is also considered as a mathematical calculations for a mathematical model as described in figure 2 [0063]). Thus, such steps cover mathematical calculations, relationship, and/or formula by dividing data, performing compression and decompression algorithms, and performing multiply and accumulate for convolution operation. Therefore, the claim includes limitations that fall within the “Mathematical Concepts” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
Under Prong Two of Step 2A, this judicial exception is not integrated into a practical application. The claim additionally recites the convolution operation method executed by convolution operation device, wherein the convolution operation device comprises a cache and the method using a CNN accelerator to store each of the input data blocks that has undergone two level compression into a storage, read each of the input data blocks that has undergone the two level compression from the storage, store the non-overlapping areas of each input data block that has undergone the second level decompression into a respective non-overlapping storage space in a cache. However, the additional elements are recited at a high level of generality, i.e., as computer components performing computer functions of executing, processing, storing and retrieving data. Furthermore, storing data and retrieving data are at most considered as insignificant extra solution activities (e.g., mere data gathering). Such element fails to provide a meaningful limitation on the judicial exception, and amount to no more than mere instructions to apply the exception using computer elements. Thus, the claim is directed to an abstract idea.
Under Step 2B, as discussed with respect to Prong Two of Step 2A, the additional elements in the claim amount no more than mere instructions to apply the exception using a computer component. The same conclusion is reached in step 2B, i.e., mere instruction to apply an exception on computer components cannot integrate a judicial exception into a practical application at step 2A or provide an inventive concept that is furnished by an element or combination of elements that is recited in the claim in addition to (beyond) the judicial exception. The steps of storing data and retrieving data are considered to be insignificant extra-solution activities in step 2A, and are determined to be well-understood, routine, conventional activities in the field. Court decisions cited in MPEP 2106.05(d)(II) section (iv), indicate that mere storing and retrieving information in memory, is well-understood, routing, conventional function when it is claimed in a merely generic manner. Furthermore, the claim additionally recites the two-level compression, selective cache storage of non-overlapping areas, and reconstruction of the input data blocks is structured to reduce redundant memory access and cache contention during execution of the convolution by the CNN accelerator, however, such limitation is merely recited at a high level of generality and at most considered as merely reciting a result of performing the abstract idea. Thus, the additional element fails to ensure the claim as a whole amount to significantly more than the judicial exception itself. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 2 further recites each of the input data blocks is divided into a main area and at least one sub-area; wherein the main area includes a non-overlapping area and at least one overlapping area, wherein the non-overlapping area included in the main area does not overlap with any adjacent input data block, and each overlapping area included in the main area only overlaps with one adjacent input data block. Such limitations cover mathematical calculations, relationship, and/or formula (such as dividing each input data into multiple areas for convolution operation). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 3 further recites wherein areas included in the at least one sub-area all overlap with at least one adjacent input data block. Such limitations cover mathematical calculations, relationship, and/or formula (such as further describing the division of each input data into areas where data are overlapped). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 4 further recites the at least one sub-area includes at least one overlapping sub-area, wherein the number of input data blocks adjacent to the at least one overlapping sub-area is greater than the number of input data blocks adjacent to the at least one overlapping area of the main area. Such limitations cover mathematical calculations, relationship, and/or formula (such as further describing the division of each input data into areas where data are overlapped). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 5 further recite for each of the input data blocks: storing a main area of the input data block in a main cache segment of the cache; and storing at least one sub-area of the input data block in a secondary cache segment of the cache; wherein the main cache segment and the secondary cache segment do not overlap. Such limitation recites additional elements at a high level of generality and the step of storing data in a cache having different non-overlapping segments is at most considered as insignificant extra solution activity under step 2A prong two and determined to be well-understood, routine and conventional under step 2B (see at least Hennessy, John L., et al. Computer Architecture : A Quantitative Approach, Elsevier Science & Technology, page 398 figure 5.4 discloses a cache having different blocks (i.e., segments) to store data and each segment is non-overlapping. Thus, the claim recites additional element that fail to integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 6 further for each of the input data blocks: splicing the non-overlapping area and at least one overlapping area corresponding to the main area of the input data block, and the overlapping area corresponding to the at least one sub-area of the input data block to generate the input data block. Such limitations cover mathematical calculations, relationship, and/or formula (such as generating input data blocks by merging the areas). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claims 7-8 further recites the division of input data blocks having overlapping sub-area. Such limitations cover mathematical calculations, relationship, and/or formula (such as further describing the division of each input data into areas where data are overlapped). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claims 9-10 further recites generating the input data block according to the main area and the at least one sub-area of the input data block. Such limitations cover mathematical calculations, relationship, and/or formula (such as generating input data blocks, such as splicing the data, for performing convolution operation). Moreover, the claim recites reading the at least one sub-area of the input data block according to the main area. However, such limitation is at most considered as insignificant extra solution activity under step 2A prong two and determined to be well-understood, routine, conventional activity in the field. Court decisions cited in MPEP 2106.05(d)(II) section (iv), indicate that mere storing and retrieving information in memory is well-understood, routing, conventional function when it is claimed in a merely generic manner. Thus, the additional element fails to ensure the claim as a whole amount to significantly more than the judicial exception itself. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claims 11-20 recite apparatus claims that would practice the method claims 1-10. Thus, they are rejected for the same reasons.
Conclusion
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/HUY DUONG/Examiner, Art Unit 2182 (571)272-2764