DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendments filed 2/17/2026 have been accepted. Claims 1, 4, 7, 8, 11, 14, 15, and 18 are still pending.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 4, 7, 8, 11, 14, 15, and 18 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claims contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The claims contain the limitation “the electronic apparatus is to send to the neighbor storage device, or receive from the neighbor storage device, code which is to be executed with an accelerator circuit” which constitute new matter as there is no recitation in the specification of dedicated accelerator circuits in the storage devices that are used to run the accelerator code that is provided to the devices. There are accelerators (genus) mentioned near the mentions of accelerator code, but nothing stating what exactly these are. While the applicant has pointed out that there are ASIC accelerators present, these accelerators are merely mentioned and their purpose or function in the system are never provided. There is nothing in the specification that relates those identified ASIC accelerators to the ones that are using the code.
The storage devices themselves are also never stated as having dedicated accelerator circuits as part of their hardware. The figures also never show anything that is part of the memory that is given the designation of accelerator circuits. Given that the term “accelerator circuit” is never used in conjunction with the storage devices and code it can be concluded that this constitutes new matter as no specialty hardware such as accelerator circuits is disclosed as being part of the storage devices or associated with the accelerator code that the storage devices received and then run.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 4, 7, 8, 1, 14, 15, and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claims contain the term “accelerator circuit” which renders the claims indefinite as it is unclear as to what is being referred to. As stated in the 112(a) rejection, there is no use of the term in the specification or originally filed claims that could clarify what is meant by “accelerator circuit”. Accelerator circuits typically refer to specialized hardware designed to take on specific tasks, usually of a computational manner, so as to lessen the computational burden on a particular processor.
However, as the applicant stated in their arguments, ASIC accelerators can be present in the system, but they are only mentioned and, as stated in the 112(a) rejection, their purpose in the system is never mentioned. There is accelerator code that is received by the storage devices and accelerators (general/genus) that are implemented, but from the context of the specification the accelerators are just the storage device executing the accelerator code. There is no statement of a specific accelerator circuit that is part of the storage devices making it unclear as to what is meant by the term. There is nothing stating that the accelerators are 1) hardware, or 2) that the ASIC accelerators even interact with the memory devices in any way (again, their purpose and function in the system are never stated. They are merely present and that is all that is stated about them).
For examination purposes, “accelerator circuit” will be construed to be whatever hardware is executing the accelerator code.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 4, 8, 10-12, 14, 15, 17, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Tarango et al. (US PGPub 2019/0042129, hereafter referred to as Tarango) in view of Healy (US PGPub 2002/0147823) in view of Dillenberger et al. (US PGPub 2011/0161972, hereafter referred to as Dillenberger) in view of Grochowski et al. (US PGPub 2005/0223199, hereafter referred to as Grochowski) in view of Pierce et al. (US PGPub 2015/0094093, hereafter referred to as Pierce).
Regarding claim 1, Tarango teaches an electronic apparatus, comprising: one or more substrates, and a controller coupled to the one or more substrates (Fig. 1 and 3 and Paragraphs [0026]-[0027], shows the data storage device which include a controller. Since device can be a system-on-a-chip the controller would be coupled to a substrate. It should be noted that this would hold true for all controllers in memory), the controller including logic to: control access to a NAND-based storage media, and communicate with a host device and a neighbor storage device (Fig. 3 and Paragraph [0026]-[0027], as stated previously the controller in question is a memory controller that controls the operations for the data storage device. Paragraph [0028], describes the host interface which allows for communication with a host device as well as a service (a workload). Fig. 1 and Paragraph [0014], shows the device is connected to other devices, such as the manufacturer compute device, via a network and therefore can communicate with them), participate in one or more communications, wherein the communications are to take place while a virtual service is provided with a host device and with each of multiple heterogeneous storage devices (Abstract and Paragraphs [0014] and [0040]-[0042], describe the process of monitoring the performance of the storage devices as they performs the operations associated with a particular workload (virtual service) and that performance data is then sent to the manufacturer compute device (host). Paragraphs [0014], [0023], and [0044], show that the storage devices can be different (with regards to architecture, configuration, etc.)), wherein: a first storage device of the multiple heterogeneous storage devices is to comprise the electronic apparatus (Fig. 1 and 3 and Paragraphs [0026]-[0027], as stated previously, the controller can be a memory controller and shows that is part of the storage device), the one or more of the multiple communications are each with a respective one of the host device or a neighbor storage device of the multiple heterogeneous storage devices, the multiple communications are to provide to the host device capability notifications each from a different respective one of the multiple storage devices (Abstract and Paragraphs [0014] and [0040]-[0042], states that telemetry data (capability notifications) can be collected meaning that notifications/requests for that information will have to be sent and responses will have to be made), the presence of accelerator code which is to be executed with an accelerator circuit (Paragraph [0014]-[0015], states that the compute devices will execute workloads on behalf of clients and that the executable code can be modified to accelerate operations meaning that code exists to implement the acceleration and corresponding circuitry exists to run the code), and sharing data between devices (Paragraph [0033], states that the data storage device can obtain a configuration form an external source), the host device is to automatically determine a reconfiguration of the first storage device based on each of the capability notifications and further based on the requirements of the virtual service (Fig. 8-10 and Paragraphs [0042]-[0045], describe the process of the manufacturer compute device receiving the telemetry data and determining an appropriate configuration based on the telemetry data it received), receive from the host device an assignment of the reconfiguration, and execute the native commands to provide the reconfiguration of the first storage device in response to the assignment (Paragraph [0047], states that the manufacturer compute device can send the new configuration information back to the storage device. Paragraph [0033], states the device can load/implement a new configuration that it can obtain from an external source. One of ordinary skill would recognize that this is done in native commands as the controller and memory are part of the same device). Tarango does not explicitly teach receive an administrative command which is to enable asynchronous communications, through a translation language set, with a host device and multiple heterogeneous storage devices: access a shared register space, based on the administrative command, to participate in one or more of the asynchronous communications through the translation language set, with the one or more of the asynchronous communications, the electronic apparatus is send to the neighbor storage device or receive from the neighbor storage device, code which is to be executed, the host identifying a goal of the virtual service, and convert the translation language set to native commands, and execute the native commands.
Healy teaches the controller participate in one or more communications through a translation language set, convert the assignment from the translation language set to native commands, and execute the native commands (Paragraph [0078]-[0082], states that a particular language can be used for messaging between hosts and clients and that the message can be converted into the native command format of the host so that it can understand it and then respond back, the response then being converted into the message language before being sent out. Paragraph [0055], states that the hubs can be part of hosts. Paragraph [0007], shows the requests can be to send/acquire data). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Tarango to incorporate the hubs of Healy into the devices present in the network so that the network is not dependent upon the operation of a single hub (Healy, Abstract). Tarango and Healy do not explicitly teach receiving an administrative command which is to enable asynchronous communications, through a translation language set, with a host device and multiple heterogeneous storage devices: access a shared register space, with the one or more of the asynchronous communications, the electronic apparatus is to share accelerator code with the host device or the neighbor storage device, the host identifying a goal of the virtual service.
Dillenberger teaches identifying a goal of the virtual service (Paragraphs [0021] and [0023], states that an assignment manager can determine allocation of resources based on the goal of a service and whether or not that goal has been met). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Tarango and Healy to take into account the virtual services goal as taught in Dillenberger so as to effectively and efficiently utilize available accelerator resources assigned across multiple systems (Dillenberger, Paragraph [0003]). Tarango, Healy, and Dillenberger do not teach receiving an administrative command which is to enable asynchronous communications, through a translation language set, with a host device and multiple heterogeneous storage devices: access a shared register space, with the one or more of the asynchronous communications, the electronic apparatus is to send to the neighbor storage device or receive from the neighbor storage device, code which is to be executed.
Grochowski teaches receive an administrative command which is to enable asynchronous communications, wherein the logic is to asynchronously communicate with other devices (Paragraph [0181], describes the synchronous mov instruction which acts similar to the asynchronous counterpart, meaning that asynchronous communication between devices is also present. As an asynchronous counterpart exists, it means that it enables asynchronous communications. It should be noted there is nothing explicitly stating what constitutes as an administrative command), access a shared register space, based on the administrative command (Paragraph [0181], a shared register is used to facilitate both the synchronous mov and its asynchronous counterpart meaning it is accessed based on the administrative command to perform asynchronous communications). Since both Tarango/Healy/Dillenberger and Grotowski teach communication between devices in a system it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the prior art elements according to known methods by modifying the teachings of Tarango, Healy, and Dillenberger to use asynchronous communication as taught in Grotowski to obtain the predictable result of receive an administrative command which is to enable asynchronous communications, through a translation language set, with a host device and multiple heterogeneous storage devices: access a shared register space. Tarango, Healy, Dillenberger, and Grotowski do not teach sending to the neighbor storage device or receiving from the neighbor storage device, code which is to be executed.
Pierce teaches sending to the neighbor device or receiving from the neighbor storage device, code which is to be executed (Paragraph [0035] and [0053], states that configuration settings can be transferred between neighboring devices. Paragraph [0047], states the transferrable configuration settings can include methods for operating the device). Since both Tarango/Healy/Dillenberger/Grotowski and Pierce teach sharing resources it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the prior art elements according to known methods by modifying the teachings of Tarango, Healy, Dillenberger, and Grotowski to send code amongst its entities as taught in Pierce to obtain the predictable result of sending to the neighbor storage device or receiving from the neighbor storage device, code which is to be executed (as Tarango does teach the use of accelerator code that is utilized by the storage devices as well as sharing data (in general) and all this does is specify how the devices acquire the code).
Regarding claim 4, Tarango, Healy, Dillenberger, Grotowski, and Pierce teach all the limitations to claim 1. Tarango further teaches wherein the logic is further to: lock a configuration of the controller and the NAND-based storage media in response to a communication from one or more of the host device and the neighbor storage device (Paragraph [0032]-[0033], states that the storage device can determine whether or not to enter into dynamic performance adjustments in response to commands from a host (can be locked into a configuration or change it)). Healy further teaches another translation language communication (Paragraph [0078]-[0082], as stated in the rejection to claim 1). The combination of and reason for combining are the same as those given in claim 1.
Regarding claims 8, 10, and 11, claims 8, 10, and 11 are the system claims associated with claims 1, 3, and 4. Since Tarango, Healy, Dillenberger, Grotowski, and Pierce teach all the limitations of claims 1, 3, and 4 and Tarango further teaches an electronic storage system, comprising: NAND-based storage media, and a controller communicatively coupled to the NAND-based storage media (Fig. 3 and Paragraphs [0026]-[0027] and [0030], shows the data storage device which includes a controller and non-volatile medium that can be NAND flash), they also teach all the limitations of claims 8, 10, and 11; therefore the rejections to claims 1, 3, and 4 also apply to claims 8, 10, and 11.
Regarding claim 12, Tarango, Healy, Dillenberger, Grotowski, and Pierce teach all the limitations to claim 8. Tarango further teaches a host and neighboring storage devices (Fig. 1 and Paragraph [0014], as stated in the rejection to claim 1). Grotowski further teaches wherein the logic is to asynchronously communicate with other devices (Paragraph [0181], as stated in the rejection to claim 1). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 14, Tarango, Healy, Dillenberger, Grotowski, and Pierce teach all the limitations of claim 8. Tarango further teaches wherein the controller and the NAND-based storage media are incorporated in a solid-state drive (Paragraph [0023], states the data storage subsystem can be a solid-state drive). The combination of and reason for combining are the same as those given in claim 1.
Regarding claims 15, 17, and 18, claims 15, 17, and 18 are the method claims associated with claims 1, 3, and 4. Since Tarango, Healy, Dillenberger, Grotowski, and Pierce teach all the limitations of claims 1, 3, and 4, they also teach all the limitations of claims 15, 17, and 18; therefore the rejections to claims 1, 3, and 4 also apply to claims 15, 17, and 18.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Tarango, Healy, Dillenberger, Grotowski, and Pierce as applied to claims 1 above, and further in view of Khan et al. (US PGPub 2015/0149695, hereafter referred to as Khan).
Regarding claim 7, Tarango, Healy, Dillenberger, Grotowski, and Pierce teach all the limitations to claim 1. Tarango, Healy, Dillenberger, Grotowski, and Pierce do not teach wherein the logic is further to: offload computation from one or more of the host device and the neighbor storage device in response to a translation language set communication.
Khan teaches wherein the logic is further to offload computation from one or more of the host device and the neighbor storage device in response to a translation language set communication (Paragraph [0008] and [0011], states that computations can be offloaded from the host to several drives in a storage subsystem). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Tarango, Healy, Dillenberger, Grotowski, and Pierce to offload computations from the host to storage devices as taught in Khan so as to mitigate latencies since the data is fed in parallel to a dedicated HW acceleration engine (Khan, Paragraph [0011]).
Response to Arguments
Applicant's arguments filed 2/17/2026 have been fully considered but they are not persuasive. The applicant argues that Tarango does not teach an accelerator circuit. The examiner respectfully disagrees. As the claims are using a genus (accelerator circuit) that is also not a term used in the specification, the plain and ordinary meaning of the term is used as stated in the 112(b) rejection. Even in the specification, there is only mention of the accelerators (even broader genus) interacting with the memory devices or using the accelerator code. There is nothing explicitly defining or mentioning specific species being the ones to use the code. Because of this, Tarango can still apply as it has hardware running the specific code that is used to perform the acceleration mentioned. Therefore, the rejections still hold.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/NICHOLAS A. PAPERNO/Examiner, Art Unit 2132
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