NON-FINAL OFFICE ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/17/2024 has been entered.
Claims 1-135 were pending in this reissue of U.S. Patent No. 10,214,414 (hereinafter “the '414 patent” issued from application no. 15/206,935 (hereinafter “the '935 application”). Upon entry of amendment filed 12/17/2024, claims 1, 17, 30, 70, 73, 90, 101, and 116 have been amended; and claims 136-176 are newly added. Claims 1-176 are currently pending.
Prior or Concurrent Proceedings
Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceed-ing in which the’414 patent is or was involved. These proceedings would include interferences, reissues, reexaminations, and litigation.
Information Material to Patentability
Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is mate-rial to patentability of the claims under consideration in this reissue appli-cation. These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04.
Non-Compliance with 37 C.F.R. 1.173
CFR 1.173 states:
(d) Changes shown by markings. Any changes relative to the patent being reissued which are made to the specification, including the claims, upon filing, or by an amendment paper in the reissue application, must include the following markings:
(1) The matter to be omitted by reissue must be enclosed in brackets; and
(2) The matter to be added by reissue must be underlined, except for amendments submitted on compact discs (§§ 1.96 and 1.821(c)).
(g) Amendments made relative to the patent. All amendments must be made relative to the patent specification, including the claims, and drawings, which are in effect as of the date of filing of the reissue application.
Amendment filed 11/3/2023 appears to show markings relative to the previous amendment rather than relative to the patent claim. While one of the markings with respect to the processor limitation is correctly marked relative to the patent claim, improper markings have been made including sections having both brackets and underline. Based on Applicant’s submitted amendment which appears to be mostly marked up with respect to the previous amendment, as best understood by the Examiner, claim 1 should be submitted with the following markings relative to the patent claim:
1. An integrated micro-electro-mechanical (MEMS) system comprising:
at least one MEMS chip comprising:
a first cap layer including a first set and a second set of first cap MEMS electrical contacts;
a second cap layer comprising second cap MEMS electrical contacts;
a central MEMS layer located between the first cap layer and the second cap layer;
at least one transducer formed in the first cap layer, the central MEMS layer and the second cap layer, the at least one transducer producing motion or sensing at least one parameter;
first insulated conducting pathways connecting said at least one transducer to the first set of first cap MEMS electrical contacts, the first insulated conducting pathways conducting electrical MEMS signals between said at least one transducer and the first set of the first cap MEMS electrical contacts; and
second insulated conducting pathways connecting the second set of first cap MEMS electrical contacts to at least one of the second cap MEMS electrical contacts, the second insulated conducting pathways extending through the first cap layer, the central MEMS layer, and the second cap layer, for conducting further signals through the MEMS chip; and
at least one signal processing integrated circuit (IC) chip comprising:
a first set and a second set of IC electrical contacts, the first set of IC electrical contacts being bonded to the first set of first cap MEMS electrical contacts and the second set of IC electrical contacts being bonded to the second set of first cap MEMS electrical contacts;
MEMS signal processing circuitry for processing analog signals, operatively connected to at least one of the first set of IC electrical contacts and the second set of IC electrical contacts, the MEMS signal processing circuitry including an analog to digital converter that converts analog input MEMS signals from the MEMS chip to digital signals [configured to process the electrical MEMS signals]; and
[second] digital signal processing circuitry, operatively connected to a controller [the second set of IC electrical contacts], the [second] digital signal processing circuitry configured to process IC chip [the further] signals in response to control signals from the controller.
Appropriate correction is required with respect to any of the amended patent claims 1-24, ensuring that amendments are made relative to the patent claims as shown above with respect to patent claim 1. New claims 25-176 appear to be marked correctly as all underlined.
Response to Arguments
The claims have been amended to overcome the rejections under 112 2nd paragraph by removing the unsupported terminology “MEMS [analog] signal processing circuitry”. The claims additionally overcome the 112 1st paragraph rejection by reciting the necessary component of an auxiliary/digital signal processing circuitry. Accordingly, the rejections are withdrawn, with the exception of claims 50 and 136 which still recite a MEMS analog signal processing circuitry. Claims 50 additionally omits the necessary component auxiliary/digital signal processing circuitry. Accordingly, claims 50 and 136 remain rejected under 112 1st and 2nd paragraph.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
Claim 1: MEMS signal processing circuitry for processing analog signals, operatively connected to at least one of the first set of IC electrical contacts and the second set of IC electrical contacts, the MEMS signal processing circuitry including an analog to digital converter that converts analog input MEMS signals from the MEMS chip to digital signals [configured to process the electrical MEMS signals]; and
[second] digital signal processing circuitry, operatively connected to a controller [the second set of IC electrical contacts], the [second] digital signal processing circuitry configured to process IC chip [the further] signals in response to control signals from the controller.
Claims 30: wherein the processing circuitry includes MEMS signal processing circuitry, operatively connected to at least one of the first set of circuit electrical contacts and the second set of circuit electrical contacts, to input the electrical MEMS analog signals: and
wherein the processing circuitry includes an analog to digital converter that converts the MEMS analog signals to digital signals and digital signal processing circuitry for processing the digital signals.
Regarding claim 50: wherein the processing circuitry includes MEMS analog signal processing circuitry, operatively connected to at least one of the first set of circuit electrical contacts and the second set of circuit electrical contacts, for processing the electrical MEMS analog signals; an analog to digital converter that converts the processed MEMS analog signals to digital signals; and wherein the processing circuitry includes digital signal processing circuitry for processing the digital signals.
Claim 70: MEMS signal processing circuitry, operatively connected to the first set of processing circuit electrical contacts and the gyroscope, the MEMS signal processing circuitry configured to process the electrical MEMS signals and the gyroscope signals including the gyroscope signals; and auxiliary signal processing circuitry that generates MEMS drive signals that drive movement of the gyroscope proof mass.
Claim 90: processing the MEMS signals with MEMS signal processing circuitry wherein first and second sets of circuit electrical contacts are respectively connected to the first and second sets of first wafer MEMS electrical contacts; and processing auxiliary signals with auxiliary signal processing circuitry that is connected to a drive electrode in the MEMS inertial sensor chip to generate gyroscope drive signals that drive a movement of the gyroscope proof mass.
Claim 101: wherein the processing circuitry includes MEMS signal processing circuitry, operatively connected to the circuit electrical contacts, for processing the electrical MEMS analog signals; the MEMS signal processing circuitry including; an analog to digital converter that converts the processed MEMS analog signals to digital signals; and digital CMOS processing circuitry that processes the digital signals to generate an output signal of digital transducer data.
Claim 116: MEMS signal processing circuitry connected to the first and second electrical contacts to process analog MEMS electrical signals including sensing electrode signals to measure movement of the transducer; and auxiliary signal processing circuitry connected to second electrical contacts to process drive signals that drive a movement of transducer.
Claims 136: MEMS analog signal processing circuitry connected to the first and second electrical contacts to interface output analog MEMS electrical signals with the transducer including sensing electrode signals to measure movement of the transducer mass within the cavity.
Claim 157: wherein the MEMS wafer stack comprises a MEMS chip including an interposer circuit connected to the first and second electrical contacts; and MEMS signal processing circuitry connected to the interposer circuit to connect to the second electrical contact to the MEMS signal processing circuitry, the interposer circuit interfacing output analog MEMS electrical signals from the sensing electrode to the MEMS signal processing circuit, and auxiliary signal processing circuitry connected to the interposer circuit to connect the third electrical contact to the drive electrode to drive a movement of the transducer mass with drive signals.
The independent claims 1, 30, 50, 101, 116, 136, and 157 recite “a MEMS signal processing circuitry” and “digital/auxiliary signal processing circuitry” which impart insufficient structure by themselves in the claims for performing all the claimed processing functions. Accordingly, the claims are interpreted under 112 (f).
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
The corresponding structure of the claimed MEMS signal processing circuitry and digital/auxiliary signal processing circuitry is illustrated in Figures 1a, 1b, 2a, 3, 4a and 4b (and the corresponding description in the specification of the ‘414 patent), and the algorithms illustrated in Figs. 6A and 6B.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. It is noted that Applicant’s prior responses have not contested this interpretation.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 50-69 and 136-156 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Independent claims 50 and 136 recite “a MEMS analog signal processing circuitry”, which invoke 112(f) interpretation. However, the specification of the ‘414 patent does not use the terminology MEMS analog signal processing circuitry. Instead, the following terms are utilized:
FIG. 3 is a block diagram representing a possible embodiment of an integrated MEMS system, in this case a 10-DOF IMU system 3000. The system 3000 includes a 10-DOF single MEMS chip 3100, and a single IC chip 3200, the MEMS chip and the IC chip having architecture similar to that described for the system 2000 of FIG. 2A. The MEMS chip 3100 comprises top cap, central MEMS and bottom cap layers, with transducers patterned in the layers. The transducers can include a three-axis accelerometer, gyroscope and magnetometer, as well as a pressure sensor. First and second insulated conducting pathways 3130, 3150 are formed within the MEMS layers to transmit MEMS-signals and auxiliary signals. The insulated conducting pathways 3130, 3150 connect to MEMS-electrical contacts on the first and/or second cap layers. A single IC chip 3200 is bump bonded to the first layer of the MEMS chip, and includes MEMS-signal processing circuitry 3240, and auxiliary-processing circuitry 3260. The MEMS-signal processing circuitry processes the transducers' I/O signals, i.e. signals generated by the transducers and/or signals for controlling the transducers. The auxiliary-processing circuitry 3260 processes auxiliary signals, i.e. signals transiting through the second insulating pathways of the MEMS chip 3100, such as signals for powering the transducers and/or digital signals for controlling the transducers.
In the present embodiment, the MEMS-signal processing circuitry 3240 includes specialized digital CMOS circuitry modules such as digital data analysis circuitry 3242, digital input/output circuitry 3244, memory 3246, a system controller 3248 and calibration/compensation circuitry 3250. The auxiliary signal processing circuitry 3260 includes power management circuitry 3262, and high speed CMOS circuitry 3264 which may include wireless and/or GPS I/O modules. The digital components in the MEMS-signal processing circuitry 3240 and in the auxiliary signal processing circuitry 3260 communicate over a digital bus 3272.
Since the transducers operate using analog signals, the IC chip 3200 includes mixed-signal CMOS circuitry 3270 to allow the IC chip 3200 to interface with the input and output of the MEMS sensor 3100. The mixed-signal CMOS circuitry 3270 includes an ADC to convert analog signals generated by the MEMS chip 3100 into digital signals for processing by the MEMS signal processing circuitry 3240. The mixed-signal CMOS circuitry 3270 also includes a DAC for converting digital signals received from the MEMS-signal processing circuitry 3240 and/or auxiliary signal processing circuitry 3260 into analog signals for controlling the MEMS chip 3100. The mixed-signal CMOS circuitry 3270 communicates with the other digital components of the IC chip 3200 over the digital bus 3272.
The specification of the ‘414 patent refers to a MEMS-signal processing circuitry 3240 which is shown to include an analog/digital converter as well as other components that are not limited to analog signal processing as now claimed (See MEMS signal processing circuitry 3240 and all the components within at Fig. 3). Thus, the claims now recite terminology that is inconsistent (“MEMS analog signal processing circuitry) and does not map to the terminology of the ‘414 specification.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 50-69 and 136-156 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
The independent claims 50 and 136 are amended to recite “a MEMS analog signal processing circuitry”. This terminology is not used in the ‘414 patent specification and is therefore not supported.
Regarding new claim 136, this claim recites a MEMS analog signal processing circuitry and omits the auxiliary signal processing circuitry for processing auxiliary signals. However, Applicant’s explanation of support in the previous response merely pointed to Col. 7: 45- col. 8:30; col. 10:24 – col. 11:16. The embodiment described in these sections relies on auxiliary signal processing circuitry and does not support the omission of this limitation. Applicant is requested to provide an explanation as to how only an analog signal processing circuit is capable of performing the claimed functions by itself with no other circuity components. The specification of the ‘414 patent does not support such an embodiment that relies solely on an analog signal processor.
Allowable Subject Matter
Claims 1-49, 70-135, and 157-176 are allowed (claims 1-24 must be amended to comply with 37 C.F.R. 1.173). Claims 50-69 and 136-156 would be allowable upon overcoming the rejections under 112 1st and 2nd paragraph. The following is a statement of reasons for the indication of allowable subject matter. The prior art of record fails to disclose, teach, or suggest the corresponding structure of the claimed mean-plus-function limitations indicated above.
CONCLUSION
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Cameron Saadat whose telephone number is (571)272-4443. The examiner can normally be reached M-F 7:30-4:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hetul Patel can be reached on (571) 272-4184. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Cameron Saadat/Patent Reexam Specialist, Art Unit 3992
Conferees:
/Woo H Choi/
Primary Examiner, AU 3992
/ALEXANDER J KOSOWSKI/Supervisory Patent Examiner, Art Unit 3992
Prosecution Insights