DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendments
This is a final office action in response to applicant's arguments and remarks filed on 10/21/2025.
Status of Rejections
All previous rejections are withdrawn in view of applicant’s amendments.
New grounds of rejection are necessitated by applicant’s amendments.
Claims 1-4, 6-7 and 19 are pending and under consideration for this Office Action.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-3 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Soundarrajan et al. (U.S. 2005/0244811) in view of Spitzer et al. (U.S. Patent No. 5,258,325), and further in view of Heller et al. (U.S. Patent No. 5,605,662).
Regarding claim 1, Soundarrajan teaches an array (see e.g. Fig. 12, 3x3 matrix array; Paragraph 0079, lines 11-12) comprising:
bit lines (see e.g. Fig. 12, column, i.e. bit, lines C1-C4; Paragraph 0079, line 14-17);
a column address selector configured to drive the bit lines (see e.g. Fig. 14, column driver 1402; Paragraph 0079, lines 14-16, Paragraph 0080, lines 8-10, and Paragraph 0082, lines 23-25);
word lines (see e.g. Fig. 12, row, i.e. word, lines R1-R4; Paragraph 0079, line 14-17);
a row address selector to drive the word lines (see e.g. Fig. 14, row driver 1401; Paragraph 0079, lines 14-16, Paragraph 0080, lines 8-10, and Paragraph 0082, lines 23-25); and
electrode cells (see e.g. Fig. 12, each cell of the 3x3 matrix array comprising working electrodes; Paragraph 0079, lines 12-13), wherein each of the bit lines is connected respectively to a column of the electrode cells and each of the word lines is connected respectively to a row of the electrode cells (see e.g. Fig. 12, working electrode driven by a respective row and column line; Paragraph 0079, lines 14-17), the electrode cells each comprising:
a wire having a first end and a second end (see e.g. Fig. 12, wire connection between each working electrode W and active element AC; Paragraph 0079, lines 17-21);
a nanoelectrode that is coupled to the second end of the wire (see e.g. Fig. 12, nanoscale working electrode W at an end of the wire connection; Paragraph 0025, lines 1-6), the word lines and the bit lines being configured to independently control reaction conditions of each electrode of the electrode cells (see e.g. Fig. 12, each working electrode Wxy individually addressable and activatable with a respective row Rx and column Cy, and may comprise a unique reaction; Paragraph 0079, lines 14-21 and 46-49, and Paragraph 0050); and
an access transistor comprising a drain, source, and gate, wherein the drain is connected to the electrode, the gate is connected to one of the word lines, and the source is connected to one of the bit lines (see e.g. Fig. 13c, active element AC comprising transistor shown with gate connected to row Rx, drain connected to electrode Wxy and source connected to column Cy; Paragraph 0079, lines 38-49).
Soundarrajan does not explicitly teach a storage circuit coupled to the first end of the wire, the drain also being connected to the storage circuit, and the access transistor being configured to charge the storage circuit with current flowing through the bit line in response to the access transistor being enabled via the word line. Soundarrajan does however teach that the active element for connecting the rows and columns to the respective working electrodes may extend to any “active” electronic circuit that can address the row-column operation for the array, with an alternate example including a capacitor, i.e. storage circuit (see e.g. Fig. 13 and Paragraph 0079, lines 38-46), the array being an analogue to the active matrix in liquid crystal displays (see e.g. Paragraph 0072).
Spitzer teaches circuit modules for active-matrix displays (see e.g. Abstract) comprising rows and columns connected to pixel electrodes via a transistor and a capacitor (see e.g. Fig. 3, rows 59 and columns 53 connected to pixel electrode 19 with transistor 51 and capacitor 56; Col. 4, lines 58-66), wherein the capacitor and pixel electrode are resistively coupled via a wire (see e.g. Fig. 3, wire with respective ends connected to capacitor 56 and pixel electrode 19), the transistor has its gate connected to a respective row, source connected to a respective column and drain connected to both the pixel electrode and the capacitor (see e.g. Fig. 3, transistor 51 shown with respective gate G, source S and drain D connections), and the capacitor is charged by the transistor with current flowing through the column connection when enabled by the row connection (see e.g. Fig. 3, current flows through transistor 51 from source through column bus 53 when energized by row bus 59 to charge capacitor 56; Col. 4, lines 53-64).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the electrode cells of Soundarrajan to comprise a capacitor as a storage circuit connected to the nanoelectrode and transistor and configured to be charged by the transistor as taught by Spitzer as an alternate suitable “active” electronic circuit that can address row-column operation for the array. MPEP § 2143(I)(B) states that “simple substitution of one known element for another to obtain predictable results” may be obvious.
Modified Soundarrajan does not explicitly teach the column address selector being configured to set the nanoelectrode to an active state in which the nanoelectrode has a first potential suitable for facilitating a first chemical reaction, a counteractive state in which the nanoelectrode has a second potential suitable for facilitating a second chemical reaction that is the first chemical reaction reverse, and a neutral state that is unsuitable for facilitating the first chemical reaction or the second chemical reaction. Soundarrajan does however teach each of the nanoelectrodes being individually addressed, and voltage thereby applied, via the column address selector, such voltages ranging for example from -1V to +1V (see e.g. Soundarrajan Paragraphs 0050-0051, Paragraph 0079, lines 30-35, and Paragraph 0082, lines 23-25), as well as the array being used as a matrix biosensor in which specific electrochemical reactions are detected (see e.g. Soundarrajan Paragraphs 0025, 0037 and 0050).
Heller teaches a self-addressable microelectronic device for carrying out biological reactions and detecting analytes (see e.g. Abstract and Col. 5, lines 44-61) comprising an array of electronically self-addressable microscopic locations each comprising an electrode (see e.g. Col. 6, lines 44-48), wherein each electrode may be supplied with a first potential for attachment and reaction of charged molecules and analytes (see e.g. Figs. 7b and 8b-8d, Col. 6, lines 57-65, Col. 7, lines 7-17, and Col. 15, line 57-Col. 6, line 5), a second potential of opposite polarity for removal and/or detachment of molecules and analytes (see e.g. Figs. 12a-12d, Col. 7, lines 23-25, Col. 18, lines 32-35, and Col. 19, lines 31-38), and may be in a neutral state with no reaction occurring (see e.g. Fig. 7a, addressable micro-locations in neutral condition, i.e. without any charge; Col. 8, lines 16-20), this operation enabling accelerated reaction rates and improved analysis of analytes (see e.g. Col. 7, lines 19-22 and 30-32).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the array of modified Soundarrajan to have the column selector configured to apply a first voltage/potential for attachment and reaction of charged molecules and analytes and a second potential of opposite polarity for removal and/or detachment of molecules and analytes, as well as maintain a neutral state in which no reactions occur, as taught by Heller as a suitable operative configuration for a biosensor comprising an array of individually addressable electrodes at which reactions take place that enables accelerated reaction rates and improved analysis of analytes. MPEP § 2143(I)(A) states that “combining prior art elements according to known methods to yield predictable results” may be obvious. The claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would yield nothing more than predictable results.
Regarding claim 2, Soundarrajan as modified by Spitzer teaches the storage circuit comprising a capacitor (see e.g. Spitzer Fig. 3, capacitor 56; Col. 4, line 63).
Regarding claim 3, Soundarrajan as modified by Spitzer teaches the capacitor having a terminal resistively coupled to both the drain of the access transistor and to the nanoelectrode (see e.g. Spitzer Fig. 3, top terminal of capacitor 56 shown connected to drain D of transistor 51 and to pixel electrode 19).
Regarding claim 19, Soundarrajan as modified by Heller teaches the column address selector being configured to set a first nanoelectrode of a first electrode cell of the electrode cells to the active state and one or more second electrodes of one or more second electrode cells of the electrode cells to the counteractive state, wherein the one or more second electrode cells are immediately adjacent to the first electrode cell within the array (see e.g. Heller Figs. 7b, 8a-8c and 14b-14e, positively biased micro-locations adjacent negatively biased micro-locations; Col. 15, lines 57-61, and Col. 21, lines 11-18).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Soundarrajan, Spitzer, and Heller, as applied to claim 3 above, and further in view of Genoe et al. (U.S. 2015/0162913).
Regarding claim 4, modified Soundarrajan teaches all the elements of the array of claim 3 as stated above. Modified Soundarrajan does not explicitly teach the access transistor being a back end of line (BEOL) transistor.
Genoe teaches a programmable array (see e.g. Abstract) comprising interconnected transistors and capacitors (see e.g. Paragraphs 0007 and 0015), wherein the components such as the transistors are preferably implemented in the BEOL part of the production process, thereby drastically reducing the overall area consumed on the semiconductor surface (see e.g. Paragraph 0014, lines 1-3, and Paragraph 0023, lines 5-14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the access transistor of modified Soundarrajan to be a BEOL transistor as taught by Genoe to drastically reduce the overall area consumed on the semiconductor chip surface.
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Soundarrajan, Spitzer, and Heller, as applied to claim 1 above, and further in view of Kovacs (U.S. 2002/0029971).
Regarding claim 6, modified Soundarrajan teaches all the elements of the array of claim 1 as stated above. Modified Soundarrajan dos not teach a cover layer having cavities that are aligned with the nanoelectrode of each electrode cell of the array.
Kovacs teaches a biologic electrode array (see e.g. Abstract) wherein electrodes are disposed atop active circuitry and then protected with an overlapping passivation layer with openings fabricated to expose the active regions of the electrodes (see e.g. Fig. 4c, biologic electrodes 30 exposed via openings in passivation layer 44; Paragraph 0044, lines 8-13).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the array of Soundarrajan to comprise a covering passivation layer with openings aligned to expose active regions of each nanoelectrode as taught by Kovacs to protect the nanoelectrodes.
Regarding claim 7, Soundarrajan as modified by Kovacs teaches the cover layer being configured to isolate reaction conditions of the nanoelectrode of each electrode cell from the reaction conditions of other nanoelectrodes (see e.g. Kovacs Paragraph 0044, lines 8-12, the passivation layer protects the electrodes, only exposing their individual active regions, thereby isolating them, via the passivating material, from the conditions of other electrodes).
Response to Arguments
Applicant’s arguments, see pages 7-8, filed 10/21/2025, with respect to the rejection(s) of amended claim(s) 1 under 35 USC 103 over Soundarrajan in view of Spitzer, particular regarding the claimed features for facilitating a reversible electrochemical reaction, have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Soundarrajan, Spitzer and Heller.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/M.S.J./Examiner, Art Unit 1795
/LUAN V VAN/Supervisory Patent Examiner, Art Unit 1795