DETAILED ACTION
This Action is responsive to Claims filed 11/21/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Claims 1, 4-5, 7, 11-12, 15-16, 18, and 22 have been amended. Claims 1-22 are currently pending.
Response to Arguments
Applicant's arguments, see Pages 8-9, filed 11/21/2025, regarding the 35 U.S.C. 101 Rejection of Claims 1-22 have been fully considered but they are not persuasive.
As presently drafted, the steps of the independent claims are a series of data manipulation steps interpretable as abstract idea mental process steps. There is no specific structure or implementation, beyond the generic recitation of generic computing components or neural networks, precluding the steps of “decomposing…”, “performing…”, “composing…”, and “setting…” from being practically performed by the human mind or with the aid of pen and paper. There is no verbiage or limitations in the claim indicating this is some specific or technical step taken during the training of a model, mere input and output is referenced highly generically, and training or inferencing is not referenced whatsoever. The Examiner contends that a specific improvement derived from the claims as presently drafted is necessarily rooted in a series of algorithmic mental process data manipulation steps without reciting significant structure or implementation. Per MPEP 2106.05(a), a specific improvement must come from an additional element, and not interpretable abstract idea mental process(es). See the updated 35 U.S.C. 101 Rejection below.
Applicant’s arguments with respect to the prior art rejection(s) of claim(s) 1-22 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 101
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-22 rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more; and because the claims as a whole, considering all claim elements both individually and in combination, do not amount to significantly more than the abstract idea, see Alice Corporation Pty. Ltd. v. CLS Bank International, et al, 573 U.S. (2014). In determining whether the claims are subject matter eligible, the Examiner applies the 2019 USPTO Patent Eligibility Guidelines. (2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed. Reg. 50, Jan. 7, 2019.)
Step 1:
Claims 1-6 and claims 7-11 recite methods for pooling data by a neural network in a computing device which falls under the statutory category of a process. Claims 12-17 and claims 18-22 recite an apparatus implementing a neural network and configured for pooling data, which falls under the statutory category of a machine.
Step 2A – Prong 1:
Claim 1 recites an abstract idea, law of nature, or natural phenomenon. The limitations “decomposing an M-dimensional input array into 1-dimensional (1D) input arrays in the ith dimension,”, “performing 1D MaxPool on each of the 1D input arrays in the ith dimension to generate 1D output arrays in the ith dimension,”, “composing an intermediate array based on the 1D output arrays in the ith dimension;”, and “setting the M-dimensional input array to be the intermediate array;” under the broadest reasonable interpretation, cover a mental process including an observation, evaluation, judgment or opinion that could be performed in the human mind or with the aid of pencil and paper. These limitations therefore fall within the mental process group.
Step 2A – Prong 2:
The additional elements of claim 1 do not integrate the abstract idea into a judicial exception. The claim recites the additional element “a computing device” is recognized as a generic computer components recited at a high level of generality. Although it has and executes instructions to perform the abstract idea itself, this also does not serve to integrate the abstract idea into a practical application as it merely amounts to instructions to "apply it." (See MPEP 2106.04(d)(2) indicating mere instructions to apply an abstract idea does not amount to integrating the abstract idea into a practical application).
The additional elements recited in the limitations “pooling data”, “a neural network”, “M-dimensional input array”, “1D input arrays”, “1D output arrays”, and “M-dimensional output array” are recognized as non-generic computer components, however, they are found to generally link the abstract idea to a particular technological field (See MPEP 2106.05(h)).
The additional elements recited in the limitation “…pooling data by a neural network…” is found to mere instructions to apply the abstract idea presented in the subsequent mental process steps (See MPEP 2106.05(f)).
The additional elements recited in the limitation “outputting the M-dimensional input array as an M-dimensional output array” is found to be merely insignificant extra-solution activity (See MPEP 2106.05(g)(3)(iii)). These limitations are found to be recited at a high level of generality that does not impose a meaningful limit on the abstract idea.
Step 2B:
The only limitation on the performance of the described method is a limitation reciting “a computing device” These elements are insufficient to transform a judicial exception to a patentable invention because the recited elements are considered insignificant extra-solution activity (generic computer system, processing resources, links the judicial exception to a particular, respective, technological environment). The claim thus recites computing components only at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using generic computer components; mere instructions to apply an exception using a generic computer component cannot provide an inventive concept (see MPEP 2106.05(f)).
The additional elements recited in the limitations “pooling data”, “a neural network”, “M-dimensional input array”, “1D input arrays”, “1D output arrays”, and “M-dimensional output array” are recognized as non-generic computer components, however, they are found to generally link the abstract idea to a particular technological field (See MPEP 2106.05(h)).
The additional elements recited in the limitation “…pooling data by a neural network…” is found to mere instructions to apply the abstract idea presented in the subsequent mental process steps (See MPEP 2106.05(f)).
In addition, the claimed extra-solution activity (outputting the M-dimensional input array) is acknowledged to be well-understood, routine, conventional activity (see, e.g., court recognized WURC examples in MPEP 2106.05(d)(II), third list (iv)).
Taken alone or in ordered combination, these additional elements do not amount to significantly more than the above-identified abstract idea. There is no indication that the combination of elements improves the functioning of a computer or improves any other technology. Their collective functions merely provide conventional computer implementation.
For the reasons above, claim 1 is rejected as being directed to non-patentable subject matter under §101. This rejection applies equally to independent claims 7, 12, and 18.
Claim 7 recites similar limitations to claim 1, with the exception of the use of a different algorithm (AvgPool versus MaxPool) in the performance of the evaluated mental process steps. The limitations of claim 7 have been evaluated under step 2A Prong 2 and reevaluated under step 2B and found to be recited at high levels of generality.
Claim 12 recites similar limitations to claim 1, with the exception of generic computer component additional element “circuitry.” The limitations and additional elements of claim 12 have been evaluated under step 2A Prong 2 and reevaluated under step 2B and found to be recited at high levels of generality.
Claim 18 recites similar limitations to claims 1 and 7 with the exception of generic computer component additional element “circuitry.” The limitations and additional elements of claim 12 have been evaluated under step 2A Prong 2 and reevaluated under step 2B and found to be recited at high levels of generality.
Dependent Claims:
Claim 2 (claims 8, 13, and 19): “…wherein the 1D output array for each of the 1D input arrays in the ith dimension is calculated with respect to a kernel size.” merely refines the mental process steps. The additional element “a kernel size,” while recognized as not being a generic computer component, serve to generally link the abstract idea to a specific field of use or technological environment (See MPEP 2106.05(h)). Claims 8, 13, and 19 recite similar limitations and additional elements, and are therefore similarly rejected.
Claim 3 (claims 9, 14, and 20): Merely refines the additional element recited in claim 2. Claims 9, 14, and 20 recite similar limitations and additional elements, and are therefore similarly rejected.
Claim 4 (claim 15): Includes a mental process step “…tracking a highest valued element of the 1D input array in a stack of pointers to elements of the 1D input array.” The additional element “a stack of pointers” while recognized as not being a generic computer component, serve to generally link the abstract idea to a specific field of use or technological environment (See MPEP 2106.05(h)). Claim 15 recites similar limitations and additional elements, and is therefore similarly rejected.
Claim 5 (claim 16): Includes a mental process step “…tracking the highest valued element of a 1D input array by links associated with each element of the 1D input array.” The additional element “links” while recognized as not being a generic computer component, serve to generally link the abstract idea to a specific field of use or technological environment (See MPEP 2106.05(h)). Claim 16 recites similar limitations and additional elements, and is therefore similarly rejected.
Claim 6 (claim 17): Merely refines the mental process steps of claims 4 and 5 “…tracking the highest valued element by following each of the links until reaching a link pointing to its own element.” Claim 17 recites similar limitations and additional elements, and is therefore similarly rejected.
Claim 10 (claim 21): Recites a mental process step “…accumulating a sum of elements of each of the 1D input arrays in a corresponding sum array.” The additional element “sum array” while recognized as not being a generic computer component, serve to generally link the abstract idea to a specific field of use or technological environment (See MPEP 2106.05(h)). Claim 21 recites similar limitations and additional elements, and is therefore similarly rejected.
Claim 11 (claim 22): Recites a mental process step “…generating the 1D output array comprises subtracting a value of an element of the sum array from a value of a different element of the sum array.” Claim 22 recites similar limitations and additional elements, and is therefore similarly rejected.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-2, 7-8, 12-13, and 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tong et al. (Hybrid pooling for enhancement of generalization ability in deep convolutional neural networks, 2018), hereinafter Tong and Hou et al. (Coordinate Attention for Efficient Mobile Network Design, Published 03/04/2021), hereinafter Hou.
In regards to claim 1: The present invention claims: “A method for pooling data by a neural network implemented in a computing device,” Tong teaches “a hybrid pooling method which stochastically chooses the max pooling or the average pooling in each pooling layer.” (Abstract). Also “The generalized pool-ing method [19] also combines the max and average pooling, but the proportion between them, optimized by a learning method, is deterministic.” (Page 77, 3rd Paragraph).
“the method comprising: for each of N dimensions, where N is not less than M, in order from highest to lowest dimension i: decomposing an M-dimensional input array into 1-dimensional (1D) input arrays in the ith dimension,” While Tong teaches “In the training stage, for each feature map in the convolutional layer, we use the average pooling with probability p and the max pooling with probability 1 −p for all the pooling regions.” (Pages 78-79, Fig. 2 for the feature map being broken into multiple regions, the pooling regions being of unspecified dimensionality could be interpretable as a similar decomposition without further specificity), Tong fails to explicitly teach “decomposing the M-dimensional input array into 1-dimensional (1D) input arrays,” over multiple dimensions; however, Hou, in a similar field of endeavor, teaches “To encourage attention blocks to capture long-range interactions spatially with precise positional information, we factorize the global pooling as formulated in Eqn. (1) into a pair of 1D feature encoding operations. Specifically, given the input X, we use two spatial extents of pooling kernels (H; 1) or (1;W) to encode each channel along the horizontal coordinate and the vertical coordinate, respectively”(Pages 3-4)
“performing 1D MaxPool on each of the 1D input arrays in the ith dimension to generate 1D output arrays in the ith dimension,” See above how Tong teaches the pooling regions each have max pooling performed on them (Pages 78-79, Fig. 2). Hou’s method is for global pooling, Figure 2 of Hou shows AvgPooling. It would have been obvious to one of ordinary skill in the art combining the selection methods of Tong with the algorithm of Hou to make a determination of which pooling method to use.
“composing an intermediate array based on the 1D output arrays in the ith dimension;” Hou teaches “Specifically, given the aggregated feature maps produced by Eqn. 4 and Eqn. 5, we first concatenate them and then send them to a shared 1 x 1 convolutional transformation function… where [_; _] denotes the concatenation operation along the spatial dimension, _ is a non-linear activation function and f 2 RC=r_(H+W) is the intermediate feature map that encodes spatial information in both the horizontal direction and the vertical direction.” (Page 4)
“and setting the M-dimensional input array to be the intermediate array;” Tong teaches “The pooling method is commonly used to extract a feature in a convolutional feature map given as a set of activations. The convolutional feature map is divided into multiple pooling regions and for each pooling region an output is obtained with the pooling operation. By collecting the outputs for all the pooling regions, a pooling feature map is constructed in the subsequent pooling layer.” (Page 77, second paragraph). Hou also teaches the intermediate array being used to calculate input tensors (Equations 7 and 8) and reformed together into an output (Equation 9).
“and outputting the M-dimensional input array as an M-dimensional output array.” Tong teaches “…By collecting the outputs for all the pooling regions, a pooling feature map is constructed in the subsequent pooling layer.” (Page 77, second paragraph). Hou also teaches the intermediate array being used to calculate input tensors (Equations 7 and 8) and reformed together into an output (Equation 9).
Hou teaches “In this paper, beyond the first works, we propose a novel and efficient attention mechanism by embedding positional information into channel attention to enable mobile networks to attend over large regions while avoiding incurring significant computation overhead.” (Introduction). It would have been obvious to one of ordinary skill in the art at the time of the Applicant’s filing to combine the algorithm selection methods of Tong with the methods of Hou to further leverage Hou’s efficiency benefits.
In regards to claim 2: The present invention claims: “The method of claim 1, wherein the 1D output array for each of the 1D input arrays in the ith dimension is calculated with respect to a kernel size.” Tong teaches “The size of the convolutional kernel is 5 × 5 and the stride is 1 for all the convolutional operations. The size of the pooling region is 3 × 3 and the stride is 2 for all the pooling operations.” (Page 79, 2.4 Simulation methods).
In regards to claim 7: The present invention claims similar limitations to claim 1, with the exceptions of “…AvgPool…” and “…and dividing each of element of the updated M-dimensional input array by a kernel size to form an M-dimensional output array;” Tong teaches the use of AvgPool “a hybrid pooling method which stochastically chooses the max pooling or the average pooling in each pooling layer.” (Abstract). Also “The generalized pool- ing method [19] also combines the max and average pooling, but the proportion between them, optimized by a learning method, is deterministic.” (Page 77, 3rd Paragraph). Hou Figure 2 also utilizes AvgPool in its global pooling.
In regards to claims 8, 12-13, and 18-19: Claims 8, 12-13, and 18-19 recite similar limitations to claims 1, 2, and 7, with the exception of an apparatus and circuitry configured to perform the limitations recited in claims 12-13 and 18-19; therefore, both sets of claims are similarly rejected.
Claims 3, 9, 14, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Tong and Hou, as applied to claims 1, 7, 12, and 18 above, and further in view of Nguyen, Linh (Tensor Decomposition in Multiple Kernel Learning, 2017), hereinafter Nguyen.
In regards to claim 3: The present invention claims: “The method of claim 2, wherein the kernel sizes of at least two of the i dimensions are different.” While Tong does teach a kernel size, and pooling regions, it fails to explicitly teach “at least two of the i dimensions are different.” However, Nguyen teaches a tensor (matrix) being broken down into dimensionality with multiple kernels forming the tensor (“The second objective is applying the tensor perspective in Multiple Kernel Learning problems, where the stacking of kernels can be seen as a tensor.”, Page 2 of the reference) See Figure 6 and 7, page 7 and mode-k unfolding. Hou’s methods (particularly Equations 4, 5, and 9, are dimension-size-agnostic).
Nguyen highlights the computational complexity of analyzing high-dimensional data tensors or matrices, and how the proposed algorithm increases the predictive power of decomposing tensors of kernels (Page 2 of the reference). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s filing to combine the hybrid pooling CNN of Tong with aspects of the algorithm proposed in Nguyen to achieve a system with more predictive power and computational efficiency.
In regards to claims 9, 14, and 20: Claims 9, 14, and 20 recite similar limitations to claim 3, with the exception of an apparatus and circuitry configured to perform the limitations recited therefore of claims 14 and 20; therefore, the claims are similarly rejected.
Claim(s) 4-6, 10, 15-17, and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tong and Hou, as applied to claims 1, 7, 12, and 18 above, and further in view of Reed et al. (NEURAL PROGRAMMER-INTERPRETERS, 2016), hereinafter Reed.
In regards to claim 4: The present invention claims: “wherein generating the 1D output array comprises tracking a highest valued element of the 1D input array in a stack of pointers to elements of the 1D input array.” While Tong teaches the claimed maxpooling and Hou the 1D input and output arrays, it fails to explicitly teach “…a stack of pointers to elements of the 1D input array.” However, Reed teaches a neural network architecture with access to stacks of pointers for its calculations “NPI can also harness the environment (e.g. a scratch pad with read-write pointers)…” (Abstract), and “…a 1-D array with read-only pointers…” (Page 4, Section 3 Model).
Reed teaches a neural network system with access to pointers of its computing environment to cache results as it performs computation. This lessens the overall long-term memory load of on the network as it performs computations (Abstract). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s filing to combine the hybrid pooling CNN of Tong with elements of Reed’s neural network architecture to allow the system to perform computations such as maxpooling and avgpooling while lessening the memory burden of such computations.
In regards to claim 5: The present invention claims: “wherein generating the 1D output array comprises tracking the highest valued element of a 1D input array by links associated with each element of the 1D input array.” See above where a combination of Tong, Hou, and Reed would yield a hybrid pooling system with access to environmental resources such as arrays, pointers, etc. for computation. (mapping non-specific “links” to underlying data structures accessible by a system such as Reed’s).
In regards to claim 6: The present invention claims: “The method of claim 5, further comprising tracking the highest valued element by following each of the links until reaching a link pointing to its own element.” See above where a combination of Tong, Hou, and Reed would yield a hybrid pooling system with access to environmental resources such as arrays, pointers, etc. for computation. (mapping the finding of maximum (maxpooling) within an array with the use of pointers and/or generic “links” from the computing environment would inevitably reach the end of a list (pointing to oneself)).
In regards to claim 10: The present invention claims: “further comprising accumulating a sum of elements of each of the 1D input arrays in a corresponding sum array.” See above where a combination of Tong, Hou, and Reed would yield a hybrid pooling system with access to environmental resources such as arrays, pointers, etc. for computation.
In regards to claims 15-17 and 21: Claims 15-17 and 21 recite similar limitations to claims 4-6 and 10, with the exceptions of an apparatus and circuitry configured to perform the limitations recited; therefore, both sets of claims are similarly rejected.
Allowable Subject Matter
Claims 11 and 22 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. These claims are also rejected under 35 USC 101; therefore, the claims would also need to be amended to overcome the 35 USC 101 rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GRIFFIN T BEAN whose telephone number is (703)756-1473. The examiner can normally be reached M - F 7:30 - 4:30.
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/GRIFFIN TANNER BEAN/Examiner, Art Unit 2121
/Li B. Zhen/Supervisory Patent Examiner, Art Unit 2121