DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Regarding claims 1 and 10 the limitations “ a single-layered substrate..” is not clearly described in the specifications. Para 0022/0041 of the applicants’ specifications teaches the substrates comprises two layers. There is appears to be no teaching in the specifications that discloses the substrate is designed to be a single layered substrate. Where specifically in the specifications clearly points out the substrates can be a single layered substrate? Claims 2-9 and 11- 20 are rejected under the same premises as claims 1 and 10.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 and 10 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1 and 10, the limitations “…a single-layered substrate..” is vague and indefinite. Para 0022/0041 of the applicants’ specifications teaches how a winding is located in two layers of a substrate. The examiner is unclear on how the substrate is consider a single-layered substrate when there are multiple layers in the substrate? Typically, when making a substrate with that has a plurality of windings inside of the substate, multiple winding layers are stacked and then combined to form the substrate. Where in the specifications clearly points out how the substate the applicant is claiming is designed to be a single layered substrate? Claims 2-9 and 11- 20 are rejected under the same premises as claims 1 and 10.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
1 Claims 1-6 and 10-15 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2020/0357564) in view of Eaton et al. (US 7,298,238).
Regarding claim 1, Kim et al. (figures 5-9 and para 0065-0078) discloses a substrate (210/220) with a central hole (see figures 5-6); a first winding (200) disposed in the substrate (see figures 5-7); the first winding comprising two layers (211/221) of coil each comprising a plurality of turns wound around a central hole in the substrate and connected in serial (see figures 8-9 and para 0077-0078); wherein, the first winding is connected to an external circuit or device at a first terminal (211a/211c) and a second terminal (see para 0045-0047/0075), wherein the first terminal is configured at a first end of a first layer of coil close to the central hole (see figure 9) and the second terminal (221a/221c) is configured at a second end of a second layer of coil close to the central hole (see figures 5-9).
Figures 5-9 of Kim et al. discloses wherein the windings layers are combined to form a substate (see figure 5/7), but does not expressly disclose a teaching wherein the substrate is a single layered substrate.
Eaton et al. (Col 4, lines 1-9) discloses a teaching wherein a substrate is a single layered substrate.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a substrate is a single layered substrate as taught by Eaton et al. to the inductive device of Kim et al. so as to save in production cost in regards to time and materials needed to make the inductive device while also making a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board.
Also, it would have been obvious to one having ordinary skill in the art at the time the invention was made to design a single layered substrate, since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. Howard v. Detroit Stove Works, 150 U.S. 164 (1993). Such has to have a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board. Please note that in the instant application, applicant has not disclosed any criticality for the claimed limitations.
Regarding claim 2, Kim et al. (para 0076-0078) discloses a second end of the first layer of coil away from the central hole and a first end of the second layer of coil away from the central hole are connected through a via hole (see para 0076).
Regarding claim 3, Kim et al. (figures 5-9 and see para 0045-0047/0075) discloses wherein, the first end of the first layer of coil close to the central hole and the second end of the second layer of coil close to the central hale are connected to an external circuit or device.
Regarding claim 4, Kim et al. (figure 9) discloses the first laver of coil and the second layer of coil are formed by winding a wire.
Regarding claim 5, Kim et al. (figures 5-9) discloses wherein each tum of the first layer of coil of the first winding is disposed in a first plane of the substrate, and each turn of the second layer of coil of the first winding is disposed in a second plane parallel to the first plane in the substrate.
Regarding claim 6, Kim et al. (figure 7) discloses wherein each turn of the first layer of coil of the first winding is partially disposed overlapping with each turn of the second layer of coil of the first winding.
Regarding claim 10, Kim et al. (figures 5-9 and para 0065-0078) discloses a winding assembly and a magnetic core (see para 0039), the winding assembly being
sleeved on a magnetic leg of the magnetic core (see para 0039), wherein the winding assembly comprises: a substrate (210/220) with a central hole (see para 0039);
a first winding (200) disposed in the substrate (see figures 5-7), the first winding comprising two layers of coil (211/221) each comprising a plurality of turns wound around a central hole in the substrate and connected in serial (see figures 8-9 and para 0077-0078); wherein, the first winding is connected to an external circuit or device at a first terminal and a second terminal (see para 0045-0047/0075), wherein the first terminal (211a/211c) is configured at a first end of a first layer of coil close to the central hole and the second terminal (221a/221c) is configured at a second end of a second layer of coil close to the central hole (see figures 5-9).
Figures 5-9 of Kim et al. discloses wherein the windings layers are combined to form a substate (see figure 5/7), but does not expressly disclose a teaching wherein the substrate is a single layered substrate.
Eaton et al. (Col 4, lines 1-9) discloses a teaching wherein a substrate is a single layered substrate.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a substrate is a single layered substrate as taught by Eaton et al. to the inductive device of Kim et al. so as to save in production cost in regards to time and materials needed to make the inductive device while also making a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board.
Also, it would have been obvious to one having ordinary skill in the art at the time the invention was made to design a single layered substrate, since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. Howard v. Detroit Stove Works, 150 U.S. 164 (1993). Such has to have a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board. Please note that in the instant application, applicant has not disclosed any criticality for the claimed limitations.
Regarding claim 11, Kim et al. (para 0076-0078) discloses a second end of the first layer of coil away from the central hole and a first end of the second layer of coil away from the central hole are connected through a via hole (see para 0076).
Regarding claim 12, Kim et al. (figures 5-9 and see para 0045-0047/0075) discloses wherein, the first end of the first layer of coil close to the central hole and the second end of the second layer of coil close to the central hale are connected to an external circuit or device.
Regarding claim 13, Kim et al. (figure 9) discloses the first laver of coil and the second layer of coil are formed by winding a wire.
Regarding claim 14, Kim et al. (figures 5-9) discloses wherein each tum of the first layer of coil of the first winding is disposed in a first plane of the substrate, and each turn of the second layer of coil of the first winding is disposed in a second plane parallel to the first plane in the substrate.
Regarding claim 15, Kim et al. (figure 7) discloses wherein each turn of the first layer of coil of the first winding is partially disposed overlapping with each turn of the second layer of coil of the first winding.
2. Claims 7-9, 16-17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2020/0357564) and Eaton et al. (US 7,298,238) in further view of Rowley et al. (US 6,124,778).
Regarding claim 7, Kim et al. (figures 5-9 and para 0065-0078) discloses a second winding comprises at least one layer of coil, and the first winding is insulated from the second winding (see figure 7), but does not expressly disclose a second winding disposed in the substrate.
Rowley et al. (embodiment figures 5-6 and Col 6, lines 58-68 – Col 7, lines 1-40) discloses a teaching of a second winding disposed in the substrate (see figure 6); wherein, the second winding comprises at least one layer of coil, and the first winding is insulated from the second winding. (see Col 7, Ines 33-36)
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a second winding comprises at least one layer of coil, and the first winding is insulated from the second winding as taught by Rowley et al. embodiment figures 5-6 to the inductive device of Kim et al. so as to allow for an higher inductance to be obtained while also having the capability of stepping up or stepping down the input voltage.
Regarding claim 8, Rowley et al. (embodiment figures 5-6 and Col 7, lines 1-6) discloses wherein, the second winding comprises two layers of coil located in a first layer and a last laver in the substrate respectively; and the first winding are located in a middle layer of the substrate. See also Kim et al. (figures 5-9)
Regarding claim 9, Rowley et al. (embodiment figures 5-6) discloses wherein, the two layers of coil of the second winding are connected through a via hole (B1-2).
Regarding claim 16, Kim et al. (figures 5-9 and para 0065-0078) discloses a second winding comprises at least one layer of coil, and the first winding is insulated from the second winding(see figure 7),but does not expressly disclose a second winding disposed in the substrate.
Rowley et al. (embodiment figures 5-6 and Col 6, lines 58-68 – Col 7, lines 1-40) discloses a teaching a second winding disposed in the substrate (see figure 6); wherein, the second winding comprises at least one layer of coil, and the first winding is insulated from the second winding. (see Col 7, Ines 33-36)
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a second winding comprises at least one layer of coil, and the first winding is insulated from the second winding as taught by Rowley et al. embodiment figures 5-6 to the inductive device of Kim et al. so as to allow for an higher inductance to be obtained while also having the capability of stepping up or stepping down the input voltage.
Regarding claim 17, Rowley et al. (embodiment figures 5-6 and Col 6, lines 58-68 – Col 7, lines 1-40) discloses wherein the magnetic element is a transformer, the first winding is a primary winding of the transformer, and the second winding is a secondary winding of the transformer; or the first winding is the secondary winding of the transformer and the second winding is the primary winding of the transformer. See also Kim et al. (figures 5-9)
Regarding claim 19, Rowley et al. (embodiment figures 5-6 and Col 7, lines 1-6) discloses wherein, the second winding comprises two layers of coil located in a first layer and a last laver in the substrate respectively; and the first winding are located in a middle layer of the substrate. See also Kim et al. (figures 5-9)
Regarding claim 20, Rowley et al. (embodiment figures 5-6) discloses wherein, the two layers of coil of the second winding are connected through a via hole (B1-2).
3. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2020/0357564) and Eaton et al. (US 7,298,238) in further view of Cheng et al. (US 2016/0217913) and Song et al. (US 2018/0174737).
Regarding claim 18, the modified inductive of Kim et al. (figures 5-9 and para 0065-0078) discloses all the limitations as noted above but does not expressly disclose a primary switch is disposed on the substrate and connected with the primary winding; and a secondary switch disposed on the substrate and connected with the secondary winding.
Cheng et al. (para 0027-0029) discloses wherein, a primary switch is disposed on the substrate and connected with the primary winding (see para 0027-0029): Cheng et al does not expressly discloses a secondary switch is disposed on the substrate and connected with the secondary winding.
Songet al. (figure 5/6e/6g and para 0025-0026) discloses a secondary switch is disposed on the substrate and connected with the secondary winding.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design a primary switch is disposed on the substrate and connected with the primary winding as taught by Cheng et al. to the modified inductive device of Kim et al. so as to minimize a power supply's energy dissipation, resulting in a higher efficiency with less heat produced.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design a secondary switch is disposed on the substrate and connected with the secondary winding as taught by Song et al. to the modified inductive device of Kim et al. so as to reduce the secondary loop thereby reducing the leakage inductance.
4. Claims 1 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Boone et al. (US 2014/0277223) in view of Kim et al. (US 2020/0357564) and Eaton et al. (US 7,298,238)
Regarding claim 1, Boone et al. (figures 3a-3b and para 0028-0031) discloses a substrate (50) with a central hole (see figures 3a-3b), a first winding disposed in the substrate (see figures 3a-3b), the first winding comprising two layers of coil each comprising a plurality of turns wound around a central hole in the substrate (see the two identical windings in the second and third layers of the substrate).
Boone et al does not expressly discloses the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole.
Kim et al. (figures 5-9 and para 0065-0078) discloses wherein the first winding (200) is connected to an external circuit or device at a first terminal and a second terminal (see para 0045-0047/0075-0079); wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole. (see para 0045-0047/0075-0078)
Boone et al. (figures 3a-3b and para 0028-0031) discloses the winding layers are formed in a substrate (50) but does not expressly disclose a teaching wherein the substrate is a single layered substrate.
Eaton et al. (Col 4, lines 1-9) discloses a teaching wherein a substrate is a single layered substrate.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole as taught by Kim et al. to the inductive device of Boone et al. so as to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and unwanted component heating while also minimizing leakage inductance. Also, it would be obvious to have the first winding end (starting point of winding) connected to an external circuit or device at a first end to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and to make sure the inductive device is not a floating circuit if the end is not connected to anything.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a substrate is a single layered substrate as taught by Eaton et al. to the inductive device of Boone et al. so as to save in production cost in regards to time and materials needed to make the inductive device while also making a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board.
Also, it would have been obvious to one having ordinary skill in the art at the time the invention was made to design a single layered substrate, since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. Howard v. Detroit Stove Works, 150 U.S. 164 (1993). Such has to have a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board. Please note that in the instant application, applicant has not disclosed any criticality for the claimed limitations.
Regarding claim 10, Boone et al. (figures 3a-3b and para 0028-0031) discloses a winding assembly and a magnetic core (see figures 3a-3b), the winding assembly being sleeved on a magnetic leg of the magnetic core (see figure 3a), wherein the winding assembly comprises: a substrate (50) with a central hole (see figure 3a); a first winding disposed in the substrate, the first winding comprising two layers of coil each comprising a plurality of turns wound around a central hole in the substrate and connected (see the two identical windings in second and third layer of the substrate).
Boone et al does not expressly discloses wherein the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole.
Kim et al. (figures 5-9 and para 0065-0078) discloses wherein the first winding (200) is connected to an external circuit or device at a first terminal and a second terminal (see para 0045-0047/0075-0079); wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole. (see para 0045-0047/0075-0078)
Boone et al. (figures 3a-3b and para 0028-0031) discloses the winding layers are formed in a substrate (50) but does not expressly disclose a teaching wherein the substrate is a single layered substrate.
Eaton et al. (Col 4, lines 1-9) discloses a teaching wherein a substrate is a single layered substrate.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole as taught by Kim et al. to the inductive device of Boone et al. so as to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and unwanted component heating while also minimizing leakage inductance. Also, it would be obvious to have the first winding end (starting point of winding) connected to an external circuit or device at a first end to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and to make sure the inductive device is not a floating circuit if the end is not connected to anything.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a substrate is a single layered substrate as taught by Eaton et al.to the inductive device of Boone et al. so as to save in production cost in regards to time and materials needed to make the inductive device while also making a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board.
Also, it would have been obvious to one having ordinary skill in the art at the time the invention was made to design a single layered substrate, since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. Howard v. Detroit Stove Works, 150 U.S. 164 (1993). Such has to have a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board. Please note that in the instant application, applicant has not disclosed any criticality for the claimed limitations.
5. Claims 1-17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Nishikawa (JP 2010/178439)(English translation) in view of Kim et al. (US 2020/0357564) and Eaton et al. (US 7,298238).
Regarding claim 1, Nishikawa (figure 1b and page 3 para 0001-0003) discloses
a substrate (1) with a central hole (see figure 1b); a first winding (3b/3b) disposed in the substrate (see figure 1b), the first winding comprising two layers of coil each comprising a plurality of turns wound around a central hole in the substrate and connected in serial (see figure 1b and page 3 para 0003).
Nishikawa et al does not expressly discloses wherein the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole.
Kim et al. (figures 5-9 and para 0065-0078) discloses wherein the first winding (200) is connected to an external circuit or device at a first terminal and a second terminal (see para 0045-0047/0075-0079); wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole. (see para 0045-0047/0075-0078)
Nishikawa (figure 1b and page 3 para 0001-0003) discloses a plurality of winding layers are formed in a substrate (1) but does not expressly disclose a teaching wherein the substrate is a single layered substrate.
Eaton et al. (Col 4, lines 1-9) discloses a teaching wherein a substrate is a single layered substrate.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole as taught by Kim et al. to the inductive device of Nishikawa so as to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and unwanted component heating while also minimizing leakage inductance. Also, it would be obvious to have the first winding end (starting point of winding) connected to an external circuit or device at a first end to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and to make sure the inductive device is not a floating circuit if the end is not connected to anything.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a substrate is a single layered substrate as taught by Eaton et al.to the inductive device of Nishikawa so as to save in production cost in regards to time and materials needed to make the inductive device while also making a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board.
Also, it would have been obvious to one having ordinary skill in the art at the time the invention was made to design a single layered substrate, since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. Howard v. Detroit Stove Works, 150 U.S. 164 (1993). Such has to have a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board. Please note that in the instant application, applicant has not disclosed any criticality for the claimed limitations.
Regarding claim 2, Kim et al. (para 0076-0078) discloses a second end of the first layer of coil away from the central hole and a first end of the second layer of coil away from the central hole are connected through a via hole (see para 0076).
Regarding claim 3, Kim et al. (figures 5-9 and see para 0045-0047/0075) discloses wherein, the first end of the first layer of coil close to the central hole and the second end of the second layer of coil close to the central hale are connected to an external circuit or device.
Regarding claim 4, Kim et al. (figure 9) discloses the first laver of coil and the second layer of coil are formed by winding a wire.
Regarding claim 5, Kim et al. (figures 5-9) discloses wherein each tum of the first layer of coil of the first winding is disposed in a first plane of the substrate, and each turn of the second layer of coil of the first winding is disposed in a second plane parallel to the first plane in the substrate.
Regarding claim 6, Kim et al. (figure 7) discloses wherein each turn of the first layer of coil of the first winding is partially disposed overlapping with each turn of the second layer of coil of the first winding.
Regarding claim 7, Nishikawa (figure 1b) discloses a second winding (3a) disposed in the substrate (1); wherein, the second winding comprises at least one layer of coil, and the first winding is insulated from the second winding.
Regarding claim 8, Nishikawa (figure 1b) discloses the second winding (3a/3a) comprises two layers of coil located in a first layer and a last layer in the substrate respectively; and the first winding are located in a middle layer of the substrate. (see figure 1b).
Regarding claim 9, Nishikawa (page 3 para 0001-0003) discloses wherein, the two layers of coil of the second winding are connected through a via hole.
Regarding claim 10, Nishikawa (figure 1b and page 3 para 0001-0003) discloses a winding assembly and a magnetic core (see figure 1b), the winding assembly being sleeved on a magnetic leg of the magnetic core (see figure 1b), wherein the winding assembly comprises: a substrate (1) with a central hole (see figure 1b); a first winding (3b/3b) disposed in the substrate, the first winding comprising two layers of coil each comprising a plurality of turns wound around a central hole in the substrate and connected in serial (see page 3 para 0002 and the two windings in second and third layer of the substrate).
Nishikawa does not expressly disclose wherein the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole.
Kim et al. (figures 5-9 and para 0065-0078) discloses wherein the first winding (200) is connected to an external circuit or device at a first terminal and a second terminal (see para 0045-0047/0075-0079); wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole. (see para 0045-0047/0075-0078)
Nishikawa (figure 1b and page 3 para 0001-0003) discloses a plurality of winding layers are formed in a substrate (1) but does not expressly disclose a teaching wherein the substrate is a single layered substrate.
Eaton et al. (Col 4, lines 1-9) discloses a teaching wherein a substrate is a single layered substrate.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design the first winding is connected to an external circuit or device at a first terminal and a second terminal, wherein the first terminal is configured at a first end of a first layer of coil close to the central hole and the second terminal is configured at a second end of a second layer of coil close to the central hole as taught by Kim et al. to the inductive device of Boone et al. so as to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and unwanted component heating while also minimizing leakage inductance. Also, it would be obvious to have the first winding end (starting point of winding) connected to an external circuit or device at a first end to allow for the electrical resistance of the winding to be reduced, thereby reducing parasitic current loss and to make sure the inductive device is not a floating circuit if the end is not connected to anything.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design wherein a substrate is a single layered substrate as taught by Eaton et al.to the inductive device of Nishikawa so as to save in production cost in regards to time and materials needed to make the inductive device while also making a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board.
Also, it would have been obvious to one having ordinary skill in the art at the time the invention was made to design a single layered substrate, since it has been held that forming in one piece an article which has formerly been formed in two pieces and put together involves only routine skill in the art. Howard v. Detroit Stove Works, 150 U.S. 164 (1993). Such has to have a more compact inductive device thereby creating more space for other electronic components to be placed on the printed circuit board. Please note that in the instant application, applicant has not disclosed any criticality for the claimed limitations.
Regarding claim 11, Kim et al. (para 0076-0078) discloses a second end of the first layer of coil away from the central hole and a first end of the second layer of coil away from the central hole are connected through a via hole (see para 0076).
Regarding claim 12, Kim et al. (figures 5-9 and see para 0045-0047/0075) discloses wherein, the first end of the first layer of coil close to the central hole and the second end of the second layer of coil close to the central hale are connected to an external circuit or device.
Regarding claim 13, Kim et al. (figure 9) discloses the first laver of coil and the second layer of coil are formed by winding a wire.
Regarding claim 14, Kim et al. (figures 5-9) discloses wherein each tum of the first layer of coil of the first winding is disposed in a first plane of the substrate, and each turn of the second layer of coil of the first winding is disposed in a second plane parallel to the first plane in the substrate.
Regarding claim 15, Kim et al. (figure 7) discloses wherein each turn of the first layer of coil of the first winding is partially disposed overlapping with each turn of the second layer of coil of the first winding.
Regarding claim 16, Nishikawa (figure 1b) discloses a second winding (3a) disposed in the substrate (1); wherein, the second winding comprises at least one layer of coil, and the first winding is insulated from the second winding.
Regarding claim 17, Nishikawa (figure 1b and page 3 para 0001-0003) discloses wherein, the magnetic element is a transformer, the first winding is a primary winding of the transformer, and the second winding is a secondary winding of the transformer; or the first winding is the secondary winding of the transformer and the second winding is the primary winding of the transformer.
Regarding claim 19, Nishikawa (figure 1b and page 3 para 0001-0003) discloses wherein, the second winding comprises two layers of coil located in a first layer and a last laver in the substrate respectively; and the first winding are located in a middle layer of the substrate. See also Kim et al. (figures 5-9)
Regarding claim 20, Nishikawa (figure 1b and page 3 para 0001-0003) discloses wherein, the two layers of coil of the second winding are connected through a via hole.
6. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Nishikawa (JP 2010/178439)(English translation) in view of Kim et al. (US 2020/0357564).and Eaton et al. (US 7,298,238) in view further view of Cheng et al. (US 2016/0217913) and Song et al. (US 2018/0174737).
Regarding claim 18, the modified inductive device of Nishikawa (figure 1b and page 3 para 0001-0003) discloses all the limitations as noted above but does not expressly disclose a primary switch is disposed on the substrate and connected with the primary winding; and a secondary switch disposed on the substrate and connected with the secondary winding.
Cheng et al. (para 0027-0029) discloses wherein, a primary switch is disposed on the substrate and connected with the primary winding (see para 0027-0029): Cheng et al does not expressly discloses a secondary switch is disposed on the substrate and connected with the secondary winding.
Songet al. (figure 5/6e/6g and para 0025-0026) discloses a secondary switch is disposed on the substrate and connected with the secondary winding.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design a primary switch is disposed on the substrate and connected with the primary winding as taught by Cheng et al. modified inductive device of Nishikawa so as to minimize a power supply's energy dissipation, resulting in a higher efficiency with less heat produced.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the applicant claimed invention to design a secondary switch is disposed on the substrate and connected with the secondary winding as taught by Song et al. to the modified inductive device of Nishikawa so as to reduce the secondary loop thereby reducing the leakage inductance.
Response to Arguments
Applicant’s arguments with respect to claims have been considered but are moot in ground of the new rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RONALD HINSON whose telephone number is (571)270-7915. The examiner can normally be reached M to F; 8 -5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shawki Ismail can be reached at 571-272-3985. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/RONALD HINSON/Primary Examiner, Art Unit 2837