DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/21/2026 has been entered.
Response to Amendment
Acknowledgment is made to the amendment received 12/11/2025 and 1/21/2026.
Response to Arguments
Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Previously, claim 1 was rejected under 35 U.S.C. 103 as being unpatentable over Harle in view of Woloszko. Now, based on amendments to the claim language, claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Polak in view of Choi.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Polak et al., US 20210022234, herein referred to as “Polak”, in view of Choi et al., KR 101873689, herein referred to as “Choi”.
Regarding claim 1, Polak discloses an electrode arrangement for a dielectric barrier discharge plasma treatment of a tissue to be treated of a patient (Figure 1 and Abstract), a treatment surface of which is used as a counter electrode ([0004] and [0403]: “In the embodiment shown, the electrotechnical core 50 only comprises one electrode structure 10 and, when the plasma applicator is applied at or on a human or animal or technical surface, the counter electrode is realized by the human or animal body or the technical surface itself.”), the electrode arrangement having: a plasma generating electrode (Figure 1: electrode structure 10) to be coupled to a high voltage source via a first lead (Figure 1: cable 80 and [0402]); a dielectric (Figure 1: insulation layer 20 and [0407]: “Furthermore, the insulation layer 20 has a dielectric strength of at least 5 kV per mm thickness.”) that, during operation of the electrode arrangement, shields the plasma generating electrode from the treatment surface of the tissue to be treated ([0400]); and a spacer (Figure 1: adhesion layer 40) that, during operation of the electrode arrangement, defines a structured surface on a side of said arrangement facing the surface of the tissue to be treated ([0412]: “In the embodiment shown, an adhesion layer 40 has been applied along the edge of the enclosure 45 on the side facing the surface to be treated.”), wherein said plasma generating electrode is fitted to the patient having the tissue to be treated by operation of the electrode arrangement ([0412]: “The adhesion layer 40 allows the plasma applicator 100 to be affixed to a human or animal or technical surface to be treated.”), wherein, during operation of the electrode arrangement, the plasma generating electrode is brought in contact with the dielectric (Figure 1: electrode structure 10 is in contact with insulation layer 20), wherein the electrode arrangement further comprises a high voltage (HV) driver circuit for driving the generation of plasma coupled to said plasma generating electrode ([0402] and [0403]: “The electrode structure 10 of the electrotechnical core shown has the function of an electrode structure driven by the voltage signal and preferably has a flexible embodiment.”), wherein the driver circuit drives the generation of plasma in first periods wherein a first voltage is applied to the plasma generating electrode ([0402]), wherein both the first voltage and the second voltage do not exceed a range of 3-8kV ([0175] and [0353]: “In alternative variants, provision can be made for a voltage signal of a few 100 V to 5 kV peak-to-peak to be used.” And [0423]), wherein the first voltage in the first periods creates a dielectric barrier discharge plasma ([0413]). Polak does not explicitly disclose an electrode arrangement wherein the driver circuit is further arranged to drive the generation of plasma in second periods wherein a second non-zero voltage is applied to the plasma generating electrode; and wherein the second voltage in the second periods does not create a plasma.
However, Choi teaches an electrode arrangement (Figure 8) wherein the driver circuit is further arranged to drive the generation of plasma in second periods wherein a second non-zero voltage is applied to the plasma generating electrode (Figure 13, the waveform on the right); and wherein the second voltage in the second periods does not create a plasma (Page 6, last paragraph that continues onto page 7).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the electrode arrangement disclosed by Polak so that the driver circuit is further arranged to drive the generation of plasma in second periods wherein a second non-zero voltage is applied to the plasma generating electrode; and wherein the second voltage in the second periods does not create a plasma as taught by Choi in order to regulate the temperature of the plasma source while an electric field is continuously formed (Choi: page 6, last two paragraphs including paragraph that continues onto page 7).
Regarding claim 2, Polak in view of Choi discloses the electrode arrangement according to claim 1, and Choi further discloses an electrode arrangement wherein the driver circuit is arranged to provide in respective periods of the first periods and the second periods, a first HV pulse having a first duration differing from a second duration of the second HV pulse (Figure 13: the second HV pulse is longer than the first HV pulse in the waveform on the right).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the electrode arrangement disclosed by Polak so that the driver circuit is arranged to provide in respective periods of the first periods and the second periods, a first HV pulse having a first duration differing from a second duration of the second HV pulse as taught by Choi in order to regulate the temperature of the plasma source while an electric field is continuously formed (Choi: page 6, last two paragraphs including paragraph that continues onto page 7).
Regarding claim 3, Polak in view of Choi discloses the electrode arrangement according to claim 2, and Polak further discloses an electrode arrangement wherein the driver circuit is arranged to provide in the first periods and the second periods a HV pulse duration in a range of 0.1 nanoseconds - 10 milliseconds ([0352]).
Regarding claim 4, Polak in view of Choi discloses the electrode arrangement according to claim 1, and Polak further discloses an electrode arrangement wherein the driver circuit is equipped with pulse width modulated sources arranged to provide the second voltage at a second repetition rate and/or a second PWM pulse duration that differs from a first repetition rate and/or a first PWM pulse duration of the first voltage ([0352], in combination with Choi, the 180 μs off of Polak is when the second voltage of Choi is delivered the waveform on the right of Figure 13 of Choi).
Regarding claim 5, Polak in view of Choi discloses the electrode arrangement according to claim 4, and Polak further discloses an electrode arrangement wherein the driver circuit is arranged to provide the first voltage with: a first repetition rate in a range of 1-100 Hz ([0352]: “5× per second (5 Hz)”), and a first PWM pulse duration in a range of 50 - 150 microseconds ([0352]).
Regarding claim 6, Polak in view of Choi discloses the electrode arrangement according to claim 5, and Choi further discloses an electrode arrangement wherein the driver circuit is arranged to provide the second voltage in the second periods at a second pulsed frequency, and wherein the second periods of the second voltage do not overlap the first periods of the first voltage (Figure 13, the waveform on the right).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the electrode arrangement disclosed by Polak so that the driver circuit is arranged to provide the second voltage in the second periods at a second pulsed frequency, and wherein the second periods of the second voltage do not overlap the first periods of the first voltage as taught by Choi in order to regulate the temperature of the plasma source while an electric field is continuously formed (Choi: page 6, last two paragraphs including paragraph that continues onto page 7).
Regarding claim 8, Polak in view of Choi discloses the electrode arrangement according to claim 1, and Choi further discloses an electrode arrangement wherein the driver circuit is arranged to provide an off-period where neither the first voltage nor the second voltage is supplied, and wherein the off-period is alternating with the first period or the second period (Figure 13, the waveform on the right).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the electrode arrangement disclosed by Polak so that the driver circuit is arranged to provide an off-period where neither the first voltage nor the second voltage is supplied, and wherein the off-period is alternating with the first period or the second period as taught by Choi in order to regulate the temperature of the plasma source while an electric field is continuously formed (Choi: page 6, last two paragraphs including paragraph that continues onto page 7).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Polak in view of Choi, further in view of Kalghatgi et al., US 20160121134, herein referred to as “Kalghatgi”.
Regarding claim 7, Polak in view of Choi discloses the electrode arrangement according to claim 6, and Polak further discloses an electrode arrangement wherein the driver circuit is arranged to provide the second voltage with: a PWM pulse duration in a range of 50 - 150 microseconds ([0352]). Polak in view of Choi does not explicitly disclose an electrode arrangement wherein the driver circuit is configured to pulse the second voltage at: a frequency in a frequency range of 0.5-1.5 kHz.
However, Kalghatgi discloses an electrode arrangement wherein the driver circuit ([0020]: “The voltage source may be the same voltage source 118 connected to the high-voltage electrode 114 and may include circuitry necessary to convert the high voltage to a low-voltage AC or DC source.”) is configured to pulse the second voltage at: a frequency in a frequency range of 0.5-1.5 kHz range ([0018]: “Amplitude of applied voltage may range from 1 kV to 30 kV, frequency of the sinusoidal voltage waveforms from 2 Hz to 1 MHz, repetition rate of the pulsed waveform from 2 Hz to 30 kHz, pulse duration from picosecond to millisecond and a duty cycle from 1%-100%.”), and a PWM pulse duration in a range of 5-100 microseconds ([0018]: “Amplitude of applied voltage may range from 1 kV to 30 kV, frequency of the sinusoidal voltage waveforms from 2 Hz to 1 MHz, repetition rate of the pulsed waveform from 2 Hz to 30 kHz, pulse duration from picosecond to millisecond and a duty cycle from 1%-100%.”).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the electrode arrangement disclosed by Polak so that the second voltage is pulses at a frequency in the range of 0.5-1.5 kHz as taught by Kalghatgi so that a high voltage can be applied to the electrode so that there is no need for a dedicated external gas supply to generate plasma, and no foreign gasses are introduced into the body during plasma generation (Kalghatgi [0019]).
Conclusion
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/N.W.R./Examiner, Art Unit 3794 /SEAN W COLLINS/Primary Examiner, Art Unit 3794
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