CTFR 17/350,164 CTFR 79606 DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Response to Amendment Claims 1-20 remain pending in the application. Claims 11-15 are withdrawn from further consideration. Specification 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 1-5, 7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Zhu et al. (CN 112151535 and hereinafter Zhu ‘535; see translation) in view of Takeuchi (WO 2017217342 and hereinafter Takeuchi ‘342; see translation) . In regards to claim 1 , Zhu ‘535 discloses a capacitor comprising: a glass substrate (200 – FIG. 21; [0044]) having a first side (upward side of layer 200 as seen in FIG. 21) and a second side opposite the first side (seen in FIG. 21); a trench in the first side of the substrate (seen in FIG. 21), the trench extending from the first side of the substrate toward the second side of the substrate (seen in FIG. 21); and a continuous layer of material (205-208 – FIG. 21; [0049]) on a portion of the first side of the glass substrate (seen in FIG. 21), the continuous layer of material layer extending from a first location (leftward location as seen in FIG. 21) of the first side of the glass substrate outside of the trench and into the trench and to a second location (rightward location as seen in FIG. 21) of the first side of the glass substrate outside of the trench (seen in FIG. 21), the first location and the second location on opposite sides of the trench (seen in FIG. 21), wherein the first location and the second location are above a bottom of the trench and correspond to a first terminal end and a second terminal end of the continuous layer of material, respectively (seen in FIG. 21). Zhu ‘535 fails to expressly disclose a dielectric build-up material over the continuous layer of material, wherein a portion of the dielectric build-up material is in the trench. Takeuchi ‘342 teaches the capacitor (upward capacitor with layers 302-304 – FIG. 2; lines 192-193) comprising: a trench (100A – FIG. 2; lines 170) in the first side (upward side of layer 301 as seen in FIG. 2) of the substrate layer (301 – FIG. 2; line 160) (seen in FIG. 2), the trench extending from the first side of the substrate layer toward the second side of the substrate layer (seen in FIG. 2); a continuous layer of material (302-304 – FIG. 2; page 5, lines 227-233) on a portion of the first side of the substrate layer (seen in FIG. 2), the continuous layer of material extending from a first location (leftward location as seen in FIG. 2) of the first side of the substrate layer outside of the trench and into the trench and to a second location (rightward location as seen in FIG. 2) of the first side of the substrate layer outside of the trench (seen in FIG. 2), the first location and the second location on opposite sides of the trench, wherein the first location and the second location are above a bottom of the trench and correspond to a first terminal end and a second terminal end of the continuous layer of material, respectively (seen in FIG. 2), and a dielectric build-up material (305 – FIG. 2) over the continuous layer of material (FIG. 2), wherein a portion of the dielectric build-up material is in the trench (FIG. 2). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Takeuchi ‘342 with Zhu ‘535 to incorporate the dielectric build-up material in the trench as taught by Takeuchi ‘342 in the structure taught by Zhu ‘535, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification is a well-known alternative in the art of trench capacitors (see Takeuchi ‘342, lines 227-233 describing the well-known alternative arrangements). In regards to claim 2 , Zhu ‘535 further discloses wherein the trench is a plurality of trenches in substantially parallel planes (seen in FIG. 21). In regards to claim 3 , Zhu ‘535 further discloses a distance between each of the plurality of trenches in FIG. 21, but Zhu ‘535 fails to expressly disclose wherein a distance between each of the plurality of trenches is less than 2 nm. However, where the only difference between the prior art and the claim is a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device is not patentably distinct from the prior art device. See MPEP 2144.04 citing In Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984). Accordingly, as a device having the claimed relative dimensions of “the distance between each of the plurality of trenches is less than 2 nm” would not perform differently than the cited prior art device, such a change to Zhu ‘535 would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention as a common practice which normally requires only ordinary skill in the art and hence is considered a routine expedient. Additionally, Applicant has not demonstrated the criticality of the specific limitation (see MPEP 2144.04). In regards to claim 4 , Zhu ‘535 further discloses wherein a bottom of the trench is substantially parallel to the first side of the glass substrate (seen in FIG. 21). In regards to claim 5 , Zhu ‘535 further discloses wherein a side of the trench is substantially perpendicular to the first side of the glass substrate (seen in FIG. 21). In regards to claim 7 , Zhu ‘535 further discloses wherein the continuous layer of material includes a plurality of capacitor layers interleaved with a plurality of electrode layers (described in [0051]). In regards to claim 9 , Zhu ‘535 further discloses a first electrical contact (212 – FIG. 21; [0070]) at the first location of the first side of the glass substrate electrically coupled with a bottom electrode layer of the plurality of electrode layers (seen in FIG. 21); and a second electrical contact (211 – FIG. 21; [0070]) at the second location of the first side of the glass substrate electrically coupled with a top electrode layer of the plurality of electrode layers (seen in FIG. 21) . 07-21-aia AIA Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Zhu ‘535 in view of Takeuchi ‘342 and further in view of Matsubara et al (WO2019026771 and hereinafter Matsubara ‘771; see translation) . In regards to claim 6 , Zhu ‘535 as modified fails to expressly disclose wherein a first side of the trench and a second side of the trench opposite the first side of the trench form a V shape. Matsubara ‘771 teaches wherein a first side of the trench and a second side of the trench opposite the first side of the trench form a V shape (seen in FIG. 12). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Matsubara ‘771 with Zhu ‘535 as modified to incorporate a first side of the trench and a second side of the trench opposite the first side of the trench form a V shape as taught by Matsubara ‘771 in the structure taught by Zhu ‘535 as modified, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for the stress in the upper electrode and the lower electrode 3 to be reduced and to increase the surface area of the capacitively coupled lower electrode, thereby increasing the capacitance value of the capacitor (Matsubara ‘771: [0048], [0057]) . 07-21-aia AIA Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Zhu ‘535 in view of Takeuchi ‘342 and further in view of Ma et al. (US 20110147055 and hereinafter Ma ‘055) . In regards to claim 10 , Zhu ‘535 as modified fails to expressly disclose wherein the glass substrate is a glass core. Ma ‘055 teaches wherein the glass substrate is a glass core ([0091]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Ma ‘055 with Zhu ‘535 as modified to incorporate the glass substrate is a glass core as taught by Ma ‘055 in the structure taught by Zhu ‘535 as modified, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for a lower mismatch in CTE between the die and underlying substrate, an increase in modulus and a corresponding decrease in substrate warpage (Ma ‘055: [0091]) . 07-21-aia AIA Claim s 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al. (US 20210020556 and hereinafter Wu ‘556) in view of Takeuchi ‘342 and in further view of Ma ‘055 . In regards to claim 16 , Wu ‘556 discloses a package comprising: a substrate (130, 220 – FIG. 14; [0024], [0028]) that includes a redistribution layer (RDL) (220 – FIG. 14; [0028]) coupled with a first side of a substrate layer (130 – FIG. 14; [0024]), the substrate layer having the first side (upward and downward sides of layer 130 as seen in FIG. 14) and a second side opposite the first side (upward and downward sides of layer 130 as seen in FIG. 14); a capacitor (120 – FIG. 14; [0022]) at the first side of the substrate layer (FIG. 14), wherein the capacitor is electrically coupled with the RDL (seen in FIG. 14); and a die (300 – FIG. 14; [0036]) coupled with the RDL and electrically coupled with the capacitor (seen in FIG. 14). Wu ‘556 fails to expressly disclose the capacitor comprising: a trench in the first side of the glass core, the trench extending from the first side of the glass core toward the second side of the glass core; a continuous layer of material on a portion of the first side of the glass core, the continuous layer of material extending from a first location of the first side of the glass core outside of the trench and into the trench and to a second location of the first side of the glass core outside of the trench, the first location and the second location on opposite sides of the trench, wherein the first location and the second location are above a bottom of the trench and correspond to a first terminal end and a second terminal end of the continuous layer of material, respectively, and a dielectric build-up material over the continuous layer of material, wherein a portion of the dielectric build-up material is in the trench. Takeuchi ‘342 teaches the capacitor (upward capacitor with layers 302-304 – FIG. 2; lines 192-193) comprising: a trench (100A – FIG. 2; lines 170) in the first side (upward side of layer 301 as seen in FIG. 2) of the substrate layer (301 – FIG. 2; line 160) (seen in FIG. 2), the trench extending from the first side of the substrate layer toward the second side of the substrate layer (seen in FIG. 2); a continuous layer of material (302-304 – FIG. 2; page 5, lines 227-233) on a portion of the first side of the substrate layer (seen in FIG. 2), the continuous layer of material extending from a first location (leftward location as seen in FIG. 2) of the first side of the substrate layer outside of the trench and into the trench and to a second location (rightward location as seen in FIG. 2) of the first side of the substrate layer outside of the trench (seen in FIG. 2), the first location and the second location on opposite sides of the trench, wherein the first location and the second location are above a bottom of the trench and correspond to a first terminal end and a second terminal end of the continuous layer of material, respectively (seen in FIG. 2), and a dielectric build-up material (305 – FIG. 2) over the continuous layer of material (FIG. 2), wherein a portion of the dielectric build-up material is in the trench (FIG. 2). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Takeuchi ‘342 with Wu ‘556 to incorporate the capacitor comprising: a trench in the first side of the substrate layer, the trench extending from the first side of the substrate layer toward the second side of the substrate layer; a continuous layer of material on a portion of the first side of the substrate layer, the continuous layer of material extending from a first location of the first side of the substrate layer outside of the trench and into the trench and to a second location of the first side of the substrate layer outside of the trench, the first location and the second location on opposite sides of the trench, wherein the first location and the second location are above a bottom of the trench and correspond to a first terminal end and a second terminal end of the continuous layer of material, respectively, as taught by Takeuchi ‘342 in the structure taught by Wu ‘556, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for significant increase in capacitance density and shorter length of the interconnection lines between two capacitors. Ma ‘055 teaches the substrate layer (150 – FIG. 1B; [0033]) being a glass core ([0035]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Ma ‘055 with Wu ‘556 as modified by Zhu ‘535 to incorporate the substrate layer being a glass core as taught by Ma ‘055 in the structure taught by Wu ‘556 as modified by Zhu ‘535, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for a lower mismatch in CTE between the die and underlying substrate, an increase in modulus and a corresponding decrease in substrate warpage (Ma ‘055: [0091]). In regards to claim 17 , modified Wu ‘556 further teaches wherein the layer of material further includes three discrete layers: a bottom electrode layer, a center capacitor layer, and a top electrode layer (Takeuchi ‘342: 302, 303, 304, respectively – FIG. 2). In regards to claim 18 , modified Wu ‘556 further teaches wherein the RDL is a first RDL and the capacitor is a first capacitor; and further comprising: a second RDL (Wu ‘556: 108 – FIG. 14; [0017]) coupled with the second side of the glass core (Wu ‘556: 108 – FIG. 14; Ma ‘055: [0035]); a second capacitor (Takeuchi ‘342: trench capacitor with bottom layers 302-305 – FIG. 2) at the second side of the glass core (Takeuchi ‘342: FIG. 2; Ma ‘055: [0035]), the second capacitor comprising: a trench in the second side of the glass core, the trench extending from the second side of the glass core toward the first side of the glass core (Takeuchi ‘342: FIG. 2; Ma ‘055: [0035]); a continuous layer of material (Takeuchi ‘342: 302-305 – FIG. 2) coupled with a portion of the second side of the glass core at a first location (leftward location as seen in Takeuchi ‘342: FIG. 2), the continuous layer of material extending from the first location onto a surface of the trench and to a second location (rightward location as seen in Takeuchi ‘342) of the second side of the glass core, the first location and the second location on opposite sides of the trench (Takeuchi ‘342: FIG. 2; Ma ‘055: [0035]); and wherein the second capacitor is electrically coupled with the second RDL (seen in Wu ‘556: FIG. 14; see also Takeuchi ‘342 FIG. 2). In regards to claim 19 , modified Wu ‘556 further teaches wherein the glass core further includes a plane (Wu ‘556: 112 - FIG. 9; [0021]; see also Takeuchi ‘342– FIG. 2) substantially perpendicular to the first side of the glass core that electrically couples the first RDL and the second RDL (see Wu ‘556: FIGs. 9 and 14; and Takeuchi ‘342: FIG. 2). In regards to claim 20 , modified Wu ‘556 further teaches (in Takeuchi ‘342: FIG. 2) a width of the trench and a depth of the trench being, for example, about 0.1 µm or more and 200 µm or less. Wu ‘556 as modified by Takeuchi ‘342 as further modified by Ma ‘055 fails to expressly disclose wherein a width of the trench is 10 µm or a depth of the trench is at least 250 µm. However, where the only difference between the prior art and the claim is a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device is not patentably distinct from the prior art device. See MPEP 2144.04 citing In Gardner v. TEC Syst., Inc ., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984). Accordingly, as a device having the claimed relative dimensions of “a depth of the trench is at least 250 µm” would not perform differently than the cited prior art device, such a change to Wu ‘556 as modified by Takeuchi ‘342 as further modified by Ma ‘055 would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention as a common practice which normally requires only ordinary skill in the art and hence is considered a routine expedient. Additionally, Applicant has not demonstrated the criticality of the specific limitation (see MPEP 2144.04). Response to Arguments Applicant’s arguments with respect to claim(s) 1-10 and 16-20 have been considered but are moot because the new ground of rejection does not rely on the same references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Timothy J Dole whose telephone number is (571)272-2229. The examiner can normally be reached M-F 6:30am-2:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Wellington can be reached at (571)272-4483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847 Application/Control Number: 17/350,164 Page 2 Art Unit: 2847 Application/Control Number: 17/350,164 Page 3 Art Unit: 2847 Application/Control Number: 17/350,164 Page 4 Art Unit: 2847 Application/Control Number: 17/350,164 Page 5 Art Unit: 2847 Application/Control Number: 17/350,164 Page 6 Art Unit: 2847 Application/Control Number: 17/350,164 Page 7 Art Unit: 2847 Application/Control Number: 17/350,164 Page 8 Art Unit: 2847 Application/Control Number: 17/350,164 Page 9 Art Unit: 2847 Application/Control Number: 17/350,164 Page 10 Art Unit: 2847 Application/Control Number: 17/350,164 Page 11 Art Unit: 2847 Application/Control Number: 17/350,164 Page 12 Art Unit: 2847 Application/Control Number: 17/350,164 Page 13 Art Unit: 2847 Application/Control Number: 17/350,164 Page 14 Art Unit: 2847
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