DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Joint Inventors
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Response to Amendments
Applicant’s amendment filed 01/23/2026 has been considered and entered.
Response to Arguments
The applicant’s arguments received 01/23/2026 have been fully considered but are moot due to modified grounds of rejection.
With regards to claim 1, applicant has argued that Leising does not disclose “…the conductive vias 10 and 12 as extending through an entirety of the layer 3 from an uppermost surface of the layer 3 to a bottommost surface of the layer 3, let alone disclosing the conductive vias 10 and 12 as being laterally spaced apart from the component 4 along a same horizontal axis…” (Page 9 of the remarks received 01/23/2026). Examiner agrees that Leising does not disclose the aforementioned limitations independently. However, in the office action received 10/28/2025, claim 1 was rejected as being unpatentable over Leising in view of Koizumi. The amended limitations of claim 1 are taught by Koizumi (See the 35 USC 103 section of this office action). Thus, claim 1 as presented in the claims received 01/23/2026 is unpatentable over Leising in view of Koizumi.
Claims 9, 16, and 23 are rejected as being unpatentable over the same references as those relied upon in the office action received 10/28/2025 for reasons similar to those of claim 1 as discussed above.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “…a die coupled to the package substrate, wherein the die has an optical transceiver portion, and wherein the optical transceiver portion is optically coupled to the optical waveguide…” must be shown or the features canceled from the claims. No new matter should be added.
Per examiner’s interpretation of claim 9 as presented in the claims filed 04/28/2025, the “…die…” of claim 9 was directed to element 352 of the specification. However, the amended limitations clearly suggest the newly added “…photonics die…” of amended claim 9 as being directed to element 352 of the specification. The “…die…” of claim 9 as presented in the claims filed 04/28/2025 is still present in amended claim 9 presented 01/23/2026. None of the figures appear to disclose both dies of amended claim 9 in a way which adheres to the limitations of amended claim 9.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3-9, 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Leising (US 20080044127 A1) in view of Koizumi (US 8111954 B2).
With regards to claim 1, Leising discloses a package substrate (Leising/Fig10/Package substrate defined by layers 3, 8, 8', 9, and 9'), comprising:
a core (Leising/Fig10/Core 3 [Optical layer]);
a photonics die in the core (Leising/Fig10/Photonics die 4); and
an optical waveguide (Leising/Fig10/Waveguide 6 [Waveguide]) embedded in the core.
Leising does not disclose the optical waveguide as optically coupling the photonics die to an edge of the core in the embodiment portrayed in figure 10. However, Leising does disclose an embodiment wherein the waveguide is configured to couple a photonics die to an edge of the core (Leising/Fig14/Photonics die 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the edge-coupling waveguide referenced in figure 14 of Leising into the package substrate referenced in figure 10 of Leising since doing so would allow the package substrate to optically couple with another package, in a horizontal direction.
Leising discloses electrical vias, but is silent regarding the presence of electrical vias which extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core. Leising also does not disclose the core as not extending over a top surface of the photonics die. However, the practices of - within a package -
orienting a core with respect to a photonics die such that the core does not extend over the photonics die and
incorporating electrical vias extending through an entirety of a core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical vias laterally spaced apart from a photonics die along a same horizontal axis
both exist in the art as exemplified by Koizumi.
Leising and Koizumi are considered to be analogous in the field of electronic packages. Koizumi teaches a package comprising a photonics die (Koizumi/Fig1/Photonics die 22) wherein a core (Koizumi/Fig1/Core 30) does not extend over the photonics die and electrical vias extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical are vias laterally spaced apart from the photonics die along a same horizontal axis (Koizumi/Fig1/Vias 26). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to orient the core of Leising about the photonics die of Leising and to include electrical vias extending fully through the core as suggested Koizumi since doing so would reduce the necessary length of direct electrical connections between the photonics die and components disposed above the core while simultaneously allowing components disposed above the core to electrically communicate with components below the core without electrically communicating the photonics die.
With regards to claim 3, Leising and Koizumi together disclose the package substrate of claim 1, wherein the optical waveguide has a circular or elliptical cross-section (Leising/Paragraph 13/Lines 20-23).
With regards to claim 4, Leising and Koizumi together disclose the package substrate of claim 1, further comprising: buildup layers over a top surface and a bottom surface of the core (Leising/Fig10/Buildup layers 8 and 9 [Resin layer 8 and conductive external layer 9]).
With regards to claim 5, Leising and Koizumi together disclose the package substrate of claim 1, wherein the optical waveguide runs substantially parallel to a top surface of the core along an entire length of the optical waveguide (Leising/Fig10/Waveguide 6 [Waveguide]).
With regards to claim 6, Leising and Koizumi together disclose the package substrate of claim 1, wherein the optical waveguide is the same material as the core, and wherein a crystal structure of the optical waveguide is different than a crystal structure of the core (Leising/Fig10/Waveguide 6 [Waveguide]; Paragraph 43/Lines 21-25).
With regards to claim 7, Leising and Koizumi together disclose the package substrate of claim 6, wherein the core is glass (Leising/Fig10/Core 3 [Optical layer]; Paragraph 35/Lines 12-18), and wherein the crystal structure of the optical waveguide is crystalline (Leising/Fig10/Waveguide 6 [Waveguide]; Paragraph 43/Lines 21-25) and wherein the crystal structure of the core is amorphous (Leising/Fig10/Core 3 [Optical layer]; Paragraph 43/Lines 21-25), or wherein the crystal structure of the optical waveguide is amorphous and wherein the crystal structure of the core is crystalline.
With regards to claim 8, Leising and Koizumi together disclose the package substrate of claim 1 as previously discussed, wherein a refractive index of the optical waveguide is higher than a refractive index of the core (Leising/Paragraph 43/Lines 21-25).
With regards to claim 9, Leising discloses an electronic package (Leising/Fig10), comprising:
a package substrate (Leising/Fig10/Package substrate defined by layers 3, 8, 8', 9, and 9'), wherein the package substrate comprises:
a core (Leising/Fig10/Core 3 [Optical layer]);
a photonics die (Leising/Fig10/Photonics die 4) in the core;
an optical waveguide (Leising/Fig10/Waveguide 6 [Waveguide]) embedded in the core;
and a buildup layer (Leising/Fig10/Buildup layer 8 [Resin layer 8]) over the core; and
a die (Leising/Fig10/Die 5 [Optoelectronic component]) coupled to the package substrate, wherein the die has an optical transceiver portion (Leising/Fig10/Left side of element 5), and wherein the optical transceiver portion is optically coupled to the optical waveguide (Leising/Fig10).
Leising does not teach the optical waveguide as optically coupling the photonics die to an edge of the core in the embodiment portrayed in figure 10. However, Leising does disclose an embodiment wherein the waveguide is configured to couple a photonics die (Leising/Fig14/Photonics die 4) to an edge of the core. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the edge-coupling waveguide referenced in figure 14 of Leising into the package substrate referenced in figure 10 of Leising since doing so would allow the package substrate to optically couple with another package, in a horizontal direction.
Leising discloses electrical vias, but is silent regarding the presence of electrical vias which extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core. Leising also does not disclose the core as not extending over a top surface of the photonics die. However, the practices of - within a package -
orienting a core with respect to a photonics die such that the core does not extend over the photonics die and
incorporating electrical vias extending through an entirety of a core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical vias laterally spaced apart from a photonics die along a same horizontal axis
both exist in the art as exemplified by Koizumi.
Leising and Koizumi are considered to be analogous in the field of electronic packages. Koizumi teaches a package comprising a photonics die (Koizumi/Fig1/Photonics die 22) wherein a core does not extend over the photonics die and electrical vias extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical vias are laterally spaced apart from the photonics die along a same horizontal axis (Koizumi/Fig1/Vias 26). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to orient the core of Leising about the photonics die of Leising and to include electrical vias extending fully through the core of Leising as suggested Koizumi since doing so would reduce the necessary length of direct electrical connections between the photonics die and components disposed above the core while also allowing components disposed above the core to electrically communicate with components below the core.
With regards to claim 16, Leising discloses a package substrate (Leising/Fig10/Package substrate defined by layers 3, 8, 8', 9, and 9'), comprising:
a glass core (Leising/Fig10/Core 3 [Optical layer]; Paragraph 35/Lines 12-18);
a photonics die (Leising/Fig10/Photonics die 4) in the glass core; and
a plurality of optical waveguides (Leising/Paragraph 20/Lines 1-3 [Specifically discloses multiple waveguides]) embedded in the glass core, wherein the plurality of optical waveguides comprise glass with a different crystal structure than the glass core (Leising/Fig10/Core 3 [Optical layer]; Paragraph 43/Lines 21-25).
Leising does not teach the optical waveguide as optically coupling the photonics die to an edge of the core in the embodiment portrayed in figure 10. However, Leising does disclose an embodiment wherein the waveguide is configured to couple a photonics die (Leising/Fig14/Photonics die 4) to an edge of the core. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the edge-coupling waveguide referenced in figure 14 of Leising into the package substrate referenced in figure 10 of Leising since doing so would allow the package substrate to optically couple with another package, in a horizontal direction.
Leising discloses electrical vias, but is silent regarding the presence of electrical vias which extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core. Leising also does not disclose the core as not extending over a top surface of the photonics die. However, the practices of - within a package -
orienting a core with respect to a photonics die such that the core does not extend over the photonics die and
incorporating electrical vias extending through an entirety of a core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical vias laterally spaced apart from a photonics die along a same horizontal axis
both exist in the art as exemplified by Koizumi.
Leising and Koizumi are considered to be analogous in the field of electronic packages. Koizumi teaches a package comprising a photonics die (Koizumi/Fig1/Photonics die 22) wherein a core does not extend over the photonics die and electrical vias extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical vias are laterally spaced apart from the photonics die along a same horizontal axis (Koizumi/Fig1/Vias 26). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to orient the core of Leising about the photonics die of Leising and to include electrical vias extending fully through the core of Leising as suggested Koizumi since doing so would reduce the necessary length of direct electrical connections between the photonics die and components disposed above the core while also allowing components disposed above the core to electrically communicate directly with components below the core.
With regards to claim 18, Leising and Koizumi together disclose the package substrate of claim 16, wherein the plurality of optical waveguides are all at a single depth within the glass core (Leising/Fig10).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Leising (US 20080044127 A1) and Koizumi (US 8111954 B2) as applied to claim 1 above, in further view of Inagaki (US 9263784 B2).
With regards to claim 2, Leising and Koizumi together disclose the package substrate of claim 1, but do not specifically teach the electrical vias as having an hourglass shaped cross-section. However, the practice of selecting an hourglass shape for the cross-section of an electrical via is well known in the art, as exemplified by Inagaki. Leising and Inagaki are considered to be analogous in the field of electronic packages.
Inagaki discloses electrical vias having an hourglass cross-section (Inagaki/Fig3B/Vias 31 [Conductive through holes]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the vias in the package taught by Leising such that the vias had an hourglass shaped cross-section as exemplified by Inagaki since doing so would reduce the likelihood of defects (such as voids) forming within the vias during fabrication.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Leising (US 20080044127 A1) in view of Koizumi (US 8111954 B2) as applied to claim 16 above, in further view of Zhao (US 20180321451 A1).
With regards to claim 21, Leising and Koizumi together disclose the package substrate of claim 16, but do not specifically disclose a plurality of slots in an edge of the glass core, wherein individual ones of the plurality of optical waveguides are aligned with individual ones of the plurality of slots. However, the practice of providing slots within a core layer of a package is well known in the art as exemplified by Zhao.
Leising, Koizumi, and Zhao are considered to be analogous in the field of electronic packages. Zhao teaches a slot in an edge of a glass substrate, wherein an optical waveguide is aligned with the slot (Zhao/Fig13a-d/Paragraph 68/Lines 6-12). Furthermore, Leising discloses an embodiment wherein waveguides are configured to couple a photonics die (Leising/Fig14/Photonics die 4) to an edge of the core. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the slot-waveguide alignment disclosed by Zhao to waveguide interfaces at an edge of a core as suggested by Leising, within the package taught by Leising and Koizumi since doing so would provide a mechanism by which the package disclosed by Leising and Koizumi could be securely coupled with another package.
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Leising (US 20080044127 A1) in view of Koizumi (US 8111954 B2) in further view of Zhao (US 20180321451 A1) as applied to claim 21 above, and in further view of Ishikawa (US 11480732 B2).
With regards to claim 22, Leising, Koizumi, and Zhao together disclose the package substrate of claim 21 as previously discussed, but do not specifically teach a portion of the glass core as separating an end of the plurality of slots from ends of the optical waveguides. However, the practice of configuring a package-fiber coupling such that fibers are not in direct contact with the coupled optical guiding features is known in the art as exemplified by Ishikawa.
Leising, Koizumi, Zhao, and Ishikawa are considered to be analogous in the field of optical connection structures. Ishikawa teaches a portion of a core separating an end of a slot from the end of an optical waveguides (Ishikawa/Fig10a-b/Core 509, Waveguide 505, slot 506; See rectangle in image below).
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It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the package taught by Leising, Koizumi, and Zhao such that a portion of the glass core disclosed by Leising, Koizumi, and Zhao separates an end of the plurality of slots from ends of the optical waveguides as exemplified by Ishikawa since doing so would allow for the slots to be etched without damaging the optical waveguide.
Claims 23 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Leising (US 20080044127 A1) in view of Koizumi (US 8111954 B2) in further view of Brusberg (US 20210271037 A1).
With regards to claim 23, Leising teaches an electronic system (Leising/Fig10), comprising:
a package substrate (Leising/Fig10/Package substrate defined by layers 3, 8, 8', 9, and 9'), wherein the package substrate comprises:
a glass core (Leising/Fig10/Core 3 [Optical layer]; Paragraph 35/Lines 12-18);
a photonics die in the glass core (Leising/Fig10/Photonics die 4);
optical waveguides (Leising/Fig10/Waveguide 6 [Waveguide]) embedded in the glass core; and
a photonics transceiver coupled to the package substrate, wherein the photonics transceiver is optically coupled to the optical waveguides (Leising/Fig10/Transceiver 4 and 5 [Optoelectronic components]).
Leising does not teach the optical waveguide as optically coupling the photonics die to an edge of the core in the embodiment portrayed in figure 10. However, Leising does disclose an embodiment wherein the waveguide is configured to couple a photonics die (Leising/Fig14/Photonics die 4) to an edge of the core. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the edge-coupling waveguide referenced in figure 14 of Leising into the package substrate referenced in figure 10 of Leising since doing so would allow the package substrate to optically couple with another package, in a horizontal direction. Additionally, Leising does not specifically teach the package substrate as being coupled to a board in the manner claimed, nor do they teach specifically teach a connector optically coupled to the optical waveguides. However, the practices of coupling a package substrate to a board and coupling a connector to optical waveguides within a package are both well known in the art as exemplified by Brusberg. Leising and Brusberg are considered to be analogous in the field of electronic packages.
Brusberg discloses a board (Brusberg/Fig17/Board 650 [Substrate]) to which electronic packages are coupled as well as connectors coupled to waveguides of an electronic package (Brusberg/Fig6b/Connectors 410 [Optical connectors]). Furthermore, Leising discloses an embodiment wherein waveguides are configured to couple a photonics die (Leising/Fig14/Photonics die 4) to an edge of the core. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to attach the package taught by Leising to a board as exemplified by Brusberg since doing so would provide an avenue of physically integrating the package taught by Leising into a wider optoelectronic system. Similarly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to attach a connector to the package taught by Leising as exemplified by Brusberg since doing so would provide a mechanism by which the package taught by Leising could be securely coupled with another package.
Leising discloses electrical vias, but Leising and Brusberg are silent regarding the presence of electrical vias which extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core. Leising and Brusberg also do not disclose the core as not extending over a top surface of the photonics die. However, the practices of - within a package -
orienting a core with respect to a photonics die such that the core does not extend over the photonics die and
incorporating electrical vias extending through an entirety of a core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical vias laterally spaced apart from a photonics die along a same horizontal axis
both exist in the art as exemplified by Koizumi.
Leising, Brusberg, and Koizumi are considered to be analogous in the field of electronic packages. Koizumi teaches a package comprising a photonics die (Koizumi/Fig1/Photonics die 22) wherein a core does not extend over the photonics die and electrical vias extend through an entirety of the core from an uppermost surface of the core to a bottommost surface of the core wherein the electrical vias are laterally spaced apart from the photonics die along a same horizontal axis (Koizumi/Fig1/Vias 26). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to orient the core of Leising and Brusberg about the photonics die of Leising and Brusberg, and to include electrical vias extending fully through the core of Leising and Brusberg as suggested Koizumi since doing so would reduce the necessary length of direct electrical connections between the photonics die and components disposed above the core while also allowing components disposed above the core to electrically communicate directly with components below the core.
With regards to claim 25, Leising, Brusberg, and Koizumi together disclose the electronic system of claim 23 as previously discussed, wherein the connector is attached to an edge of the glass core (Brusberg/Fig6b/Connectors 410 [Optical connectors]).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Leising (US 20080044127 A1) in view of Brusberg (US 20210271037 A1) in further view of Koizumi (US 8111954 B2) as applied to claim 23 above, and in further view of Winzer (US 12029004 B2).
With regards to claim 24, Leising, Brusberg, and Koizumi together disclose the electronic system of claim 23, but do not specifically teach the connector passes through a hole in the board. However, the practice of configuring a connector attached to a package such that it extends through a board is known in the art as exemplified by Winzer. Leising, Brusberg, Koizumi, and Winzer are considered to be analogous in the field of electronic packages.
Winzer discloses a package with an attached connector passing through a hole in the board to which the aforementioned package is secured (Winzer/Fig4/Connector part 1 and 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the electronic system taught by Leising, Brusberg, and Koizumi such that the connector extends through a hole in the board as exemplified by Winzer since doing so would provide an avenue by which the package taught by Leising, Brusberg, and Koizumi could be securely coupled with another package disposed on the opposite side of the board within the electronic system taught by Leising, Brusberg, and Koizumi.
Conclusion
This prior art, made of record, but not relied upon, is considered pertinent to applicant’s disclosure since the following references have similar structure and/or use similar structure and/or similar optical elements to what is disclosed and/or claimed in the instant application:
Kodaira (US 20050190808 A1) [Fig5]
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marc E Manheim whose telephone number is (703)756-1873. The examiner can normally be reached 6:30am - 5pm E.T., Monday - Tuesday and Thursday - Friday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas A Hollweg can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MARC E MANHEIM/Examiner, Art Unit 2874
/THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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