Prosecution Insights
Last updated: April 19, 2026
Application No. 17/358,931

LIGHT SOURCE SYSTEM

Final Rejection §103
Filed
Jun 25, 2021
Examiner
HAGAN, SEAN P
Art Unit
2828
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Analog Devices International Unlimited Company
OA Round
4 (Final)
38%
Grant Probability
At Risk
5-6
OA Rounds
3y 4m
To Grant
69%
With Interview

Examiner Intelligence

Grants only 38% of cases
38%
Career Allow Rate
232 granted / 603 resolved
-29.5% vs TC avg
Strong +31% interview lift
Without
With
+30.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
46 currently pending
Career history
649
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
67.7%
+27.7% vs TC avg
§102
13.0%
-27.0% vs TC avg
§112
18.5%
-21.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 603 resolved cases

Office Action

§103
DETAILED ACTION Claims 1 through 20 originally filed 25 June 2021. By amendment received 5 August 2024; claims 1, 16, and 19 are amended and claim 3 is cancelled. By amendment received 5 February 2025; claims 4 and 19 are amended. By amendment received 2 April 2025; claims 1, 4, and 19 are amended, claims 3, 8 through 12, and 16 through 18 are cancelled, and claims 21 through 26 are added. By amendment received 5 November 2025; claims 1, 4, 19, and 22 are amended. Claims 1, 2, 4 through 7, 13 through 15, and 19 through 26 are addressed by this action. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments have been fully considered; they are addressed below. The Officially Noticed facts set forth in the previous action are: "It was known in the art to employ an electrical interconnect to connect a circuit substrate to the top of an electrical device so as to provide necessary electrical connections to top electrodes of that device" "It was known in the art to align the heights of adjacent components that must be connected so as to reduce the distance necessary to make that connection and thereby reduce the inductance inherent to that connection" "It was known in the art to employ a bulk conductive layer beneath an element so as to adjust the height of that element" "It was known in the art to alter the orientation and location of electrical components as well as alter the physical connections between those components in a manner that preserves circuit configuration so as to adjust the distances between elements, simplify connections, and otherwise take advantage of differing types of connections" These facts are taken to be admitted prior art in the Office Action dated 5 November 2024 (MPEP §2144.03C). Applicant argues that the combined teachings of Chojnacki et al. (Chojnacki, US Pub. 2018/0045882) and Iguchi et al. (I807a, US Pub. 2021/0265807) do not teach or render obvious the limitation "A vertical capacitor arranged substantially adjacent to the light source". Applicant's argument is persuasive. However, upon further search and consideration, Godfrey (US Pub. 2020/0136611) has been located which, in combination with the previously cited art, renders obvious the argued limitation. As such, new rejections have been formulated as set forth below. Applicant argues that the combined teachings of Chojnacki and I807a do not teach or render obvious the limitation "An electrically conductive podium mounted on the surface of the substrate; a light source mounted on a surface of the electrically conductive podium opposite the substrate" because, according to applicant, the Official Notice of fact C in relation to these features is improper. To support this argument, applicant argues that components are often mounted to the surface of a substrate without a height adjusting podium. Applicant's argument is not persuasive because the argued practice appears in the prior art. Specifically, the argued practice appears in Tamaya et al. (Tamaya, US Pub. 2014/0233598) in which the laser is supported on a joining member so as to adjust the vertical positioning of the laser device (Tamaya, ¶22 describing the function of joining layer 6a that connects laser 1 to submount 5). Since Tamaya describes prior art use of the Officially Noticed fact, the argument that this feature was not well known in the art is not persuasive. Additionally, the rejections have been modified to replace Official Notice of fact C with references to Tamaya (MPEP §2144.03D). As such, this argument is not persuasive. The limitation "An electrically conductive podium mounted on the surface of the substrate; a light source mounted on a surface of the electrically conductive podium opposite the substrate" is rendered obvious by the combined teachings of Chojnacki, I807a, Tamaya, and Godfrey (see below). Applicant's argument that the Official Notice of fact C in relation to these features is improper is not persuasive because the argued practice appears in the prior art. Applicant argues that the combination of Chojnacki and I807a is improper because, according to applicant, I807a teaches away from the claimed system. To support this argument, applicant contends that I807a asserts benefits related to reducing the distance between the anode wire of the laser and the reference voltage line. Applicant's argument is not persuasive because the argued arrangement is not related to the features of I807a that are introduced in the combination with Chojnacki and are understood to be optional in this context (MPEP §2145XD1). Specifically, Chojnacki teaches an arrangement that includes a laser and a charging capacitor that are electrically connected on an interposer (Chojnacki, Fig. 1A depicting laser 3 and capacitor 5 electrically connected in a circuit on and through interposer 2). This circuit of Chojnacki must receive external power in some manner. I807a provides a mechanism for delivering external power to a circuit that involves a capacitor and a laser that are electrically connected in a circuit via an interposer (I807a, ¶99 discussing a reference potential line 14M that delivers power to wiring board 10 to power the circuit including laser 20 and capacitor 70A). While I807a also employs the reference potential wire to construct an additional capacitor, this use of this wire is distinct from the basic use of the wire in delivering power to capacitor 70A. Additionally, both Chojnacki and Godfrey employ circuit connections similar to I807a but without a capacitor formed by parasitic capacitance within the wiring board (see Chojnacki, Fig. 1A and Godfrey, Fig. 2B which each depicting a circuits in which the only capacitors are element 5 and 212, respectively, and neither of which are formed within a wiring board). Since the present combination does not involve the argued capacitor of I807a and since the prior art provides similar circuits without including the argued capacitor of I807a, the present combination does not require the presence of capacitor 70C of I807a and this argument, which is related exclusively to properties of capacitor 70C of I807a, is moot. As such, this argument is not persuasive. The combination of Chojnacki, I807a, Tamaya, and Godfrey is maintained. Applicant's argument that I807a teaches away from the claimed system is not persuasive because the argued arrangement is not related to the features of I807a that are introduced in the combination with Chojnacki and are understood to be optional in this context (MPEP §2145XD1). All remaining arguments related to the rejections of claims 1 and 22 as well as dependent claims thereof are moot in light of the above noted change in rejection. Additionally, in light of the above noted change in rejection, Official Notice of facts A, B, and D is no longer used in any rejection. Applicant argues that the combined teachings of I807a and Moeneclaey et al. (Moeneclaey, US Pub. 2017/0070029) does not teach or render obvious the limitation "A light source bypass, configured to generate a flow of current through one or more portions of the current driver when the light source is switched off and thereby reduce an effect of one or more parasitic inductances" because, according to applicant, Moeneclaey does not teach the claimed arrangement. To support this argument, applicant contends that, when VCSEL 102 is switched off with switch 302, the switch 312 is also switched off. Applicant's argument is not persuasive because the arrangement of Moeneclaey operates in the claimed manner. Specifically, Moeneclaey teaches that the VCSEL is switched off by activating a bypass line (Moeneclaey, ¶39 discussing how switch 312 creates a bypass of VCSEL 102 on the basis of signal φ3 as depicted in Figure 3 and using timings set forth in Figure 4). In this arrangement, the VCSEL of Moeneclaey is switched off even when the switch that otherwise activates the VCSEL remains on (Moeneclaey, Fig. 4 depicting how the VCSEL is in a low state when signal φ3 is high despite signal φ2 also being high). Further, Moeneclaey teaches that the bypass is to remain active even after the switch that otherwise activates the VCSEL is switched off (Moeneclaey, Fig. 4, depicting how signal φ2 is switched low at time t4, but signal φ3 is still high at this time). Since the switch 312 of Moeneclaey is what causes the VCSEL thereof to turn off and since switch 312 remains on even while switch 302 is switched off, switch 312 of Moeneclaey provides a light source bypass that generates a flow of current through the current driver when the light source is switched off in the manner claimed. As such, this argument is not persuasive. The limitation "A light source bypass, configured to generate a flow of current through one or more portions of the current driver when the light source is switched off and thereby reduce an effect of one or more parasitic inductances" is rendered obvious by the combined teachings of I807a and Moeneclaey (see below). Applicant's argument is that Moeneclaey does not teach the claimed arrangement not persuasive because the arrangement of Moeneclaey operates in the claimed manner. As such, all claims are addressed as follows: Information Disclosure Statement The information disclosure statements filed 1 August 2025 and 5 November 2025 fail to comply with the provisions of 37 CFR 1.98(a)(4) because they lack the appropriate size fee assertion. They have been placed in the application file, but the information referred to therein has not been considered as to the merits. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 2, 5 through 7, 14, 22, 23, 25, and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Chojnacki et al. (Chojnacki, US Pub. 2018/0045882), in view of Iguchi et al. (I807a, US Pub. 2021/0265807), in view of Tamaya et al. (Tamaya, US Pub. 2014/0233598), and further in view of Godfrey (US Pub. 2020/0136611). Regarding claim 1, Chojnacki discloses, "A substrate" (p. [0043] and Fig. 1A, pt. 2). "Wherein the light source comprises an upper surface having an upper terminal" (p. [0044] and Fig. 1A, pts. 3 and 10). "A first mounting surface conductively fixed to the surface of the electrically conductive podium and having a lower terminal" (p. [0044] and Fig. 1A, pts. 2, 3, 8f, and 11). "The light source being configured to be turned on by current flowing between the upper terminal and the lower terminal" (p. [0043] and Fig. 1A, pts. 3, 10, 11, and P). "The vertical capacitor for supplying a first part of the current to drive the light source" (p. [0043] and Fig. 1A, pts. 3 and 5). "Wherein the vertical capacitor comprises an upper surface comprising an upper terminal to a first plate of the vertical capacitor" (p. [0045] and Fig. 1A, pts. 5 and 12). "A second mounting surface conductively fixed to the surface of the substrate and comprising a lower terminal to a second plate of the vertical capacitor" (p. [0045] and Fig. 1A, pts. 2, 5, 8b, and 13). "A current driver mounted on the surface of the substrate" (p. [0043] and Fig. 1A, pts. 2 and 4). "[The current driver] coupled to the light source and the vertical capacitor" (p. [0043] and Fig. 1A, pts. 3, 4, 5, 6, and 7). "[The current driver] for controlling the flow of current from the vertical capacitor to the light source in order to control operation of the light source" (p. [0047] and Fig. 1A, pts. 3, 4, 5, and P). Chojnacki does not explicitly disclose, "Wherein the substrate comprises a supply voltage terminal that is electrically coupled to the vertical capacitor for supplying a second part of the current required to drive the light source." I807a discloses, "Wherein the substrate comprises a supply voltage terminal that is electrically coupled to the vertical capacitor for supplying a second part of the current required to drive the light source" (p. [0099] and Figs. 9A, 9B, and 9C, pts. 14M, 20, 50, and 70A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chojnacki with the teachings of I807a. In view of the teachings of Chojnacki regarding a light emitting package, the additional inclusion of specific connections for power connections as well as the additional inclusion of additional capacitors as taught by I807a would enhance the teachings of Chojnacki by providing suitable connection locations for power inputs and by enhancing the operation of the capacitive element. The combination of Chojnacki and I807a does not explicitly disclose, "An electrically conductive podium." "[The electrically conductive podium] mounted on the surface of the substrate." "A light source mounted on a surface of the electrically conductive podium opposite the substrate." Tamaya discloses, "An electrically conductive podium" (p. [0020] and Fig. 1, pt. 6a). "[The electrically conductive podium] mounted on the surface of the substrate" (p. [0020] and Fig. 1, pts. 5 and 6a). "A light source mounted on a surface of the electrically conductive podium opposite the substrate" (p. [0020] and Fig. 1, pts. 1, 5, and 6a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki and I807a with the teachings of Tamaya. In view of the teachings of Chojnacki regarding a light emitting package including multiple elements having top side connections, the additional inclusion of a conductive submount underlying the light emitting device as taught by Tamaya would enhance the teachings of Chojnacki and I807a by allowing the height of the laser device to be adjusted and thereby allowing elements of different heights to be employed in the arrangement of Chojnacki. The combination of Chojnacki, I807a, and Tamaya does not explicitly disclose, "A vertical capacitor arranged substantially adjacent to the light source." "Wherein the upper terminal of the vertical capacitor is electrically coupled to the upper terminal of the light source with an unswitched connection." "Wherein the electrically conductive podium has a thickness such that a distance between the surface of the substrate and the upper terminal of the light source is substantially the same as a distance between the surface of the substrate and the upper terminal of the vertical capacitor." "Wherein the connection between the upper terminal of the vertical capacitor and the upper terminal of the light source is substantially parallel to the substrate." Godfrey discloses, "A vertical capacitor arranged substantially adjacent to the light source" (p. [0021], [0023], and Fig. 2B, pts. 212 and 214). "Wherein the upper terminal of the vertical capacitor is electrically coupled to the upper terminal of the light source with an unswitched connection" (p. [0025] and Fig. 2B, pts. 212, 214, 226, 275, and 276). "Wherein the electrically conductive podium has a thickness such that a distance between the surface of the substrate and the upper terminal of the light source is substantially the same as a distance between the surface of the substrate and the upper terminal of the vertical capacitor" (p. [0024] and Fig. 2A, pts. 209, 212, and 214). "Wherein the connection between the upper terminal of the vertical capacitor and the upper terminal of the light source is substantially parallel to the substrate" (p. [0025] and Fig. 2B, pts. 202, 212, 214, and 226, where this connection is parallel to the substrate when using the interconnect structures of Chojnacki or the metal tab of Godfrey). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, and Tamaya with the teachings of Godfrey. In view of the teachings of Chojnacki regarding a light emitting package including a laser, a capacitor, and a switch, the alternate circuit configuration in which the top terminals of the laser and capacitor are connected together and the bottom terminals of these elements are connected via a switch as taught by Godfrey would enhance the teachings of Chojnacki, I807a, and Tamaya by providing an alternate manner of connecting the noted elements so as to produce a suitable driving circuit. Regarding claim 2, The combination of Chojnacki, I807a, and Tamaya does not explicitly disclose, "Wherein the voltage terminal of the substrate is electrically coupled to the upper terminal of the vertical capacitor by a first interconnector." Godfrey discloses, "Wherein the voltage terminal of the substrate is electrically coupled to the upper terminal of the vertical capacitor by a first interconnector" (p. [0028] and Fig. 2A, pts. 212, 224, and 274, where wire 224 of Godfrey must be electrically connected to potential wire 14M of I807a when the driving voltage is supplied in the manner of I807a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, and Tamaya with the teachings of Godfrey for the reasons provided above regarding claim 1. Regarding claim 5, Chojnacki discloses, "Wherein the current driver is a low-side driver" (p. [0047] and Fig. 1A, pts. 4 and P, where operating this current loop in reverse as suggested results in low-side driving). The combination of Chojnacki, I807a, and Tamaya does not explicitly disclose, "The lower terminal of the light source is electrically coupled to the lower terminal of the vertical capacitor by the current driver." "Wherein the upper terminal of the vertical capacitor is electrically coupled to the upper terminal of the light source by a second interconnector." "When the light source is on current flows from the upper terminal of the vertical capacitor to the upper terminal of the light source and then from the lower terminal of the light source back to the vertical capacitor via the current driver." Godfrey discloses, "The lower terminal of the light source is electrically coupled to the lower terminal of the vertical capacitor by the current driver" (p. [0023] and Fig. 2B, pts. 216, 232, and 234). "Wherein the upper terminal of the vertical capacitor is electrically coupled to the upper terminal of the light source by a second interconnector" (p. [0025] and Fig. 2B, pts. 212, 214, 226, 275, and 276). "When the light source is on current flows from the upper terminal of the vertical capacitor to the upper terminal of the light source and then from the lower terminal of the light source back to the vertical capacitor via the current driver" (p. [0026] and Fig. 2B, pts. 212, 214, 216, 275, 276, and 280). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, and Tamaya with the teachings of Godfrey for the reasons provided above regarding claim 1. Regarding claim 6, The combination of Chojnacki, I807a, and Tamaya does not explicitly disclose, "Wherein the substrate comprises a first conductive path to which the lower terminal of the light source and a first terminal of the current driver are conductively fixed." "When the light source is on current flows through the first conductive path from the lower terminal of the light source to the first terminal of the current driver." "A second conductive path to which the lower terminal of the vertical capacitor and a second terminal of the current driver are conductively fixed." "When the light source is on current flows through the second conductive path from the second terminal of the driver to the lower terminal of the vertical capacitor." Godfrey discloses, "Wherein the substrate comprises a first conductive path to which the lower terminal of the light source and a first terminal of the current driver are conductively fixed" (p. [0023] and Fig. 2B, pts. 214, 216, 234, and 236). "When the light source is on current flows through the first conductive path from the lower terminal of the light source to the first terminal of the current driver" (p. [0023] and Fig. 2B, pts. 214, 216, 234, and 236). "A second conductive path to which the lower terminal of the vertical capacitor and a second terminal of the current driver are conductively fixed" (p. [0023] and Fig. 2B, pts. 212, 216, 232, and 238). "When the light source is on current flows through the second conductive path from the second terminal of the driver to the lower terminal of the vertical capacitor" (p. [0023] and Fig. 2B, pts. 212, 216, 232, and 238). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, and Tamaya with the teachings of Godfrey for the reasons provided above regarding claim 1. Regarding claim 7, Chojnacki does not explicitly disclose, "Wherein the second conductive path is held at a reference potential." I807a discloses, "Wherein the second conductive path is held at a reference potential" (p. [0065] and Fig. 5, pts. 50, 70A, and 84). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chojnacki with the teachings of I807a for the reasons provided above regarding claim 1. Regarding claim 14, Chojnacki discloses, "Wherein the vertical capacitor, light source and current driver are coupled together to form a first current loop" (p. [0047] and Fig. 1A, pts. 3, 4, 5, and P). Chojnacki does not explicitly disclose, "A further capacitor for supplying a third part of the current to drive the light source." "Wherein the further capacitor has a larger capacitance than the vertical capacitor." "Wherein the further capacitor, light source and current driver are coupled together to form a second current loop." I807a discloses, "A further capacitor for supplying a third part of the current to drive the light source" (p. [0084], [0085], and Fig. 9A, pt. 70B). "Wherein the further capacitor has a larger capacitance than the vertical capacitor" (p. [0084], [0085], and Fig. 9A, pt. 70B). "Wherein the further capacitor, light source and current driver are coupled together to form a second current loop" (p. [0072] and Fig. 5, pts. 50, 70B, and VCSEL). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chojnacki with the teachings of I807a for the reasons provided above regarding claim 1. Regarding claim 22, Chojnacki discloses, "A substrate" (p. [0043] and Fig. 1A, pt. 2). "Wherein the light source comprises an upper surface having an upper terminal" (p. [0044] and Fig. 1A, pts. 3 and 10). "A first mounting surface conductively fixed to the surface of the electrically conductive podium opposite the substrate and having a lower terminal" (p. [0044] and Fig. 1A, pts. 2, 3, 8f, and 11). "The light source being configured to be turned on by current flowing between the upper terminal and the lower terminal" (p. [0043] and Fig. 1A, pts. 3, 10, 11, and P). "The vertical capacitor for supplying a first part of the current to drive the light source" (p. [0043] and Fig. 1A, pts. 3 and 5). "Wherein the vertical capacitor comprises an upper surface comprising an upper terminal to a first plate of the vertical capacitor" (p. [0045] and Fig. 1A, pts. 5 and 12). "Wherein the upper terminal of the vertical capacitor is electrically coupled to the upper terminal of the light source" (p. [0047] and Fig. 1A, pts. 3, 5, and P). "A second mounting surface conductively fixed to the surface of the substrate and comprising a lower terminal to a second plate of the vertical capacitor" (p. [0045] and Fig. 1A, pts. 2, 5, 8b, and 13). "A current driver for controlling the flow of current from the vertical capacitor to the light source in order to control operation of the light source" (p. [0045] and Fig. 1A, pts. 3, 4, and 5). "Wherein the current driver comprises an upper surface comprising a first upper terminal and a second upper terminal" (p. [0045] and Fig. 1A, pts. 4, 6, 7, and 9). "A mounting surface that is mounted on the surface of the substrate" (p. [0045] and Fig. 1A, pts. 2, 4, and 14). "Wherein the upper terminal of the vertical capacitor is electrically coupled to the first upper terminal of the current driver" (p. [0045] and Fig. 1A, pts. 4, 5, and 7). "The upper terminal of the light source of coupled to the second upper terminal of the current driver" (p. [0045] and Fig. 1A, pts. 3, 4, and 6). Chojnacki does not explicitly disclose, "Wherein the substrate comprises a supply voltage terminal that is electrically coupled to the vertical capacitor for supplying a second part of the current required to drive the light source." I807a discloses, "Wherein the substrate comprises a supply voltage terminal that is electrically coupled to the vertical capacitor for supplying a second part of the current required to drive the light source" (p. [0099] and Figs. 9A, 9B, and 9C, pts. 14M, 20, 50, and 70A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chojnacki with the teachings of I807a for the reasons provided above regarding claim 1. The combination of Chojnacki and I807a does not explicitly disclose, "An electrically conductive podium." "[The electrically conductive podium] mounted on the surface of the substrate." "A light source mounted on a surface of the substrate." Tamaya discloses, "An electrically conductive podium" (p. [0020] and Fig. 1, pt. 6a). "[The electrically conductive podium] mounted on the surface of the substrate" (p. [0020] and Fig. 1, pts. 5 and 6a). "A light source mounted on a surface of the substrate" (p. [0020] and Fig. 1, pts. 1, 5, and 6a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki and I807a with the teachings of Tamaya for the reasons provided above regarding claim 1. The combination of Chojnacki, I807a, and Tamaya does not explicitly disclose, "A vertical capacitor arranged substantially adjacent to the light source." "Wherein the electrically conductive podium has a thickness such that a distance between the surface of the substrate and the first upper terminal of the current driver is substantially the same as a distance between the surface of the substrate and the upper terminal of the vertical capacitor." "Wherein the connection between the upper terminal of the vertical capacitor and the upper terminal of the light source is substantially parallel to the substrate." Godfrey discloses, "A vertical capacitor arranged substantially adjacent to the light source" (p. [0021], [0023], and Fig. 2B, pts. 212 and 214). "Wherein the electrically conductive podium has a thickness such that a distance between the surface of the substrate and the first upper terminal of the current driver is substantially the same as a distance between the surface of the substrate and the upper terminal of the vertical capacitor" (p. [0024] and Fig. 2A, pts. 209, 212, and 214). "Wherein the connection between the upper terminal of the vertical capacitor and the upper terminal of the light source is substantially parallel to the substrate" (p. [0025] and Fig. 2B, pts. 202, 212, 214, and 226, where this connection is parallel to the substrate when using the interconnect structures of Chojnacki or the metal tab of Godfrey). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, and Tamaya with the teachings of Godfrey for the reasons provided above regarding claim 1. Regarding claim 23, The combination of Chojnacki, I807a, and Tamaya does not explicitly disclose, "Wherein a distance between the surface of the substrate and the second upper terminal of the current driver is substantially the same as a distance between the surface of the substrate and the upper terminal of the light source." Godfrey discloses, "Wherein a distance between the surface of the substrate and the second upper terminal of the current driver is substantially the same as a distance between the surface of the substrate and the upper terminal of the light source" (p. [0028] and Fig. 2A, pts. 212, 224, and 274, where wire 224 of Godfrey must be electrically connected to potential wire 14M of I807a when the driving voltage is supplied in the manner of I807a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, and Tamaya with the teachings of Godfrey for the reasons provided above regarding claim 1. Regarding claim 25, Chojnacki discloses, "Wherein the substrate comprises a reference voltage conductive path to which the lower terminal of the light source and a lower terminal of the vertical capacitor are conductively fixed" (p. [0047] and Fig. 1A, pts. 2 and P). "When the light source is on current flows through the reference voltage conductive path from the lower terminal of the light source to the lower terminal of the vertical capacitor" (p. [0047] and Fig. 1A, pts. 2, 3, 5, and P). Regarding claim 26, Chojnacki discloses, "Wherein a part of the reference voltage conductive path passes underneath the current driver" (p. [0047] and Fig. 1A, pts. 4 and P). "When the light source is on current flows through the reference voltage conductive path from the lower terminal of the light source to the lower terminal of the vertical capacitor, underneath the current driver in substantially the opposite direction to the current flow from the upper terminal of the vertical capacitor to the upper terminal of the light source" (p. [0047] and Fig. 1A, pts. 2, 3, 4, 5, and P). Claims 4 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Chojnacki, in view of I807a, in view of Tamaya, in view of Godfrey, and further in view of Kuwahara et al. (Kuwahara, JP Pub. 2013-046041 A). Regarding claim 4, The combination of Chojnacki, I807a, Tamaya, and Godfrey does not explicitly disclose, "Wherein the electrically conductive podium has a surface area that substantially matches a surface area of the light source." Kuwahara discloses, "Wherein the electrically conductive podium has a surface area that substantially matches a surface area of the light source" (p. [0051] and Fig. 18, pts. 3 and 54, where the podium of Tamaya is matched to the laser provided thereon in the same manner as how podium 54 is matched to chip 3). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, Tamaya, and Godfrey with the teachings of Kuwahara. In view of the teachings of Chojnacki regarding a light emitting package and the teachings of Tamaya regarding provision of a conductive pedestal on which the laser is provided, the alternate sizing of pedestal to have an area equal to the chip provided thereon as taught by Kuwahara would enhance the teachings of Chojnacki, I807a, Tamaya, and Godfrey by allowing the size of the pedestal to be minimized while also providing a stable mounting surface for the laser. Regarding claim 24, The combination of Chojnacki, I807a, Tamaya, and Godfrey does not explicitly disclose, "Wherein the light source is mounted on the surface of the substrate using a conductive podium having a thickness such that the distance between the surface of the substrate and the upper terminal of the light source is substantially the same as the distance between the surface of the substrate and the second upper terminal of the current driver." Kuwahara discloses, "Wherein the light source is mounted on the surface of the substrate using a conductive podium having a thickness such that the distance between the surface of the substrate and the upper terminal of the light source is substantially the same as the distance between the surface of the substrate and the second upper terminal of the current driver" (p. [0051] and Fig. 18, pts. 3 and 54, where the podium of Tamaya is matched to the laser provided thereon in the same manner as how podium 54 is matched to chip 3). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, Tamaya, and Godfrey with the teachings of Kuwahara for the reasons provided above regarding claim 4. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Chojnacki, in view of I807a, in view of Tamaya, in view of Godfrey, and further in view of Adachi (US Pub. 2021/0044078). Regarding claim 13, The combination of Chojnacki, I807a, Tamaya, and Godfrey does not explicitly disclose, "Wherein the first interconnector comprises a conductive platform having a mounting surface that is conductively fixed to the voltage terminal." "[The first interconnector comprises] an upper surface that is at substantially the same distance from the surface of the substrate as the upper terminal of the vertical capacitor." "At least one conductive element fixed to the upper surface of the conductive platform and the upper terminal of the vertical capacitor." Adachi discloses, "Wherein the first interconnector comprises a conductive platform having a mounting surface that is conductively fixed to the voltage terminal" (p. [0058] and Fig. 10, pts. 202 and 216). "[The first interconnector comprises] an upper surface that is at substantially the same distance from the surface of the substrate as the upper terminal of the vertical capacitor" (p. [0058] and Fig. 10, pts. 202, 210, 216, and 254). "At least one conductive element fixed to the upper surface of the conductive platform and the upper terminal of the vertical capacitor" (p. [0058] and Fig. 10, pts. 216, 254, and 262). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, Tamaya, and Godfrey with the teachings of Adachi. In view of the teachings of Chojnacki regarding a light emitting package with elements connected by top side connections, the additional inclusion bulk elements to adjust the height the input trace as taught by Adachi would enhance the teachings of Chojnacki, I807a, Tamaya, and Godfrey by adjusting the heights of traces to which top side connections are made and thereby allowing the distances of those connections to be reduced. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Chojnacki, in view of I807a, in view of Tamaya, in view of Godfrey, and further in view of Iguchi (I813b, US Pub. 2021/0265813). Regarding claim 15, Chojnacki does not explicitly disclose, "A second vertical capacitor." "Wherein the second vertical capacitor comprises an upper surface comprising an upper terminal to a first plate of the second vertical capacitor." "Wherein the first upper terminal of the light source is positioned at a first side of the upper surface of the light source." "A mounting surface conductively fixed to the surface of the substrate and comprising a lower terminal to a second plate of the vertical capacitor." "Wherein the second vertical capacitor is electrically coupled to the voltage terminal of the substrate." I807a discloses, "A second vertical capacitor" (p. [0036] and Fig. 9A, pt. 70A, where implementing a second capacitor by duplicating the capacitor of Chojnacki causes the second capacitor to exhibit this feature). "Wherein the second vertical capacitor comprises an upper surface comprising an upper terminal to a first plate of the second vertical capacitor" (p. [0036] and Fig. 9A, pt. 70A, where implementing a second capacitor by duplicating the capacitor of Chojnacki causes the second capacitor to exhibit this feature). "Wherein the first upper terminal of the light source is positioned at a first side of the upper surface of the light source" (p. [0103] and Fig. 9A, pts. 20 and 23). "A mounting surface conductively fixed to the surface of the substrate and comprising a lower terminal to a second plate of the vertical capacitor" (p. [0036] and Fig. 9A, pt. 70A, where implementing a second capacitor by duplicating the capacitor of Chojnacki causes the second capacitor to exhibit this feature). "Wherein the second vertical capacitor is electrically coupled to the voltage terminal of the substrate" (p. [0036] and Fig. 9A, pt. 70A, where implementing a second capacitor by duplicating the capacitor of Chojnacki causes the second capacitor to exhibit this feature). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Chojnacki with the teachings of I807a for the reasons provided above regarding claim 1. The combination of Chojnacki, I807a, Tamaya, and Godfrey does not explicitly disclose, "Wherein the upper terminal of the second vertical capacitor is electrically coupled to a second upper terminal of the light source." "The second upper terminal of the light source is positioned at a second, opposing side of the upper surface of the light source." "[The second capacitor] is positioned on the opposite side of the light source to the position of the first vertical capacitor." "When the light source is on current flows from the first vertical capacitor to the light source in substantially the opposite direction to current that flows from the second vertical capacitor to the light source." I813b discloses, "Wherein the upper terminal of the second vertical capacitor is electrically coupled to a second upper terminal of the light source" (p. [0098] and Fig. 6A, pts. 20, 23B, and 70B, where this is an upper terminal when implemented as in Chojnacki). "The second upper terminal of the light source is positioned at a second, opposing side of the upper surface of the light source" (p. [0098] and Fig. 6A, pts. 20 and 23B). "[The second capacitor] is positioned on the opposite side of the light source to the position of the first vertical capacitor" (Fig. 6A, pts. 20, 70A, and 70B). "When the light source is on current flows from the first vertical capacitor to the light source in substantially the opposite direction to current that flows from the second vertical capacitor to the light source" (Fig. 6A, pts. 20, 70A, and 70B). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, Tamaya, and Godfrey with the teachings of I813b. In view of the teachings of Chojnacki regarding a light emitting package including a capacitor and the teachings of I807a indicating that multiple capacitors may be employed, the alternate arrangement of at least some of the multiple capacitors to appear on opposite sides of the laser as taught by I813b would enhance the teachings of Chojnacki, I807a, Tamaya, and Godfrey by allowing the current loops created by the capacitor connections to form opposed magnetic fields. Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over I807a in view of Moeneclaey et al. (Moeneclaey, US Pub. 2017/0070029). Regarding claim 19, I807a discloses, "A laser" (p. [0038] and Fig. 9A, pt. 20). "A first capacitor coupled to the laser for supplying current to drive the laser" (p. [0036] and Fig. 9A, pts. 20 and 70A). "Wherein the first capacitor has a first capacitance" (p. [0084] and Fig. 9A, pts. 20 and 70A). "A second capacitor coupled to the laser for supplying current to drive the laser" (p. [0036] and Fig. 9A, pts. 20 and 70B). "Wherein the second capacitor has a second capacitance that is larger than the first capacitance" (p. [0085] and Fig. 9A, pts. 20 and 70B). "A current driver coupled to the laser, and the first capacitor and the second capacitor" (p. [0036] and Fig. 9A, pts. 20, 50, 70A, and 70B). "[The current driver] for controlling a flow of current between the laser and the first and second capacitors" (p. [0072] and Fig. 5, pts. 20, 50, 70A, and 70B). "Wherein the laser, current driver and first capacitor together form a first current circuit" (p. [0072] and Fig. 5, pts. 20, 50, and 70A). "Wherein the laser, current driver and second capacitor together form a second current circuit" (p. [0072] and Fig. 5, pts. 20, 50, and 70B). "Wherein an inductance of the first current circuit is smaller than an inductance of the second current circuit" (p. [0085] and [0086]). I807a does not explicitly disclose, "A light source bypass, configured to generate a flow of current through one or more portions of the current driver when the light source is switched off and thereby reduce an effect of one or more parasitic inductances." Moeneclaey discloses, "A light source bypass, configured to generate a flow of current through one or more portions of the current driver when the light source is switched off and thereby reduce an effect of one or more parasitic inductances" (p. [0039] and Fig. 3, pts. 102 and 312). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of I807a with the teachings of Moeneclaey. In view of the teachings of I807a regarding a light emitting package including laser driving components, the additional inclusion of a current bypass that operates when the laser is not to be operated as taught by Moeneclaey would enhance the teachings of I807a by allowing rapid switching of the laser device. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over I807a, in view of Moeneclaey, and further in view of Galvano et al. (Galvano, US Pub. 2018/0278011). Regarding claim 20, The combination of I807a and Moeneclaey does not explicitly disclose, "Wherein the first capacitor is coupled to the current driver by mounting the first capacitor on a surface of an integrated circuit in which the current driver formed and conductively bonding a terminal of the first capacitor to a first terminal on the surface of the integrated circuit." Galvano discloses, "Wherein the first capacitor is coupled to the current driver by mounting the first capacitor on a surface of an integrated circuit in which the current driver formed and conductively bonding a terminal of the first capacitor to a first terminal on the surface of the integrated circuit" (p. [0032] and Fig. 6, pts. 4 and 30). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of I807a and Moeneclaey with the teachings of Galvano. In view of the teachings of I807a regarding a light emitting package, the alternate configuration in which electrical elements are mounted atop the driver as taught by Galvano would enhance the teachings of I807a and Moeneclaey by allowing the device to exhibit a more compact form factor as well as allow the element distances to be reduced. Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Chojnacki, in view of I807a, in view of Tamaya, in view of Godfrey, and further in view of Kagaya (US Pub. 2007/0248363). Regarding claim 21, The combination of Chojnacki, I807a, Tamaya, and Godfrey does not explicitly disclose, "Wherein the upper terminal of the light source is electrically coupled to the supply voltage terminal through the upper terminal of the vertical capacitor." Kagaya discloses, "Wherein the upper terminal of the light source is electrically coupled to the supply voltage terminal through the upper terminal of the vertical capacitor" (p. [0098] and Fig. 4, pts. 28, 35, 36, and 120). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of the combination of Chojnacki, I807a, Tamaya, and Godfrey with the teachings of Kagaya. In view of the teachings of Chojnacki regarding a light emitting package including surface mounted capacitors, the additional inclusion of a wire connected to the top of the capacitor to provide input current as taught by Kagaya would enhance the teachings of Chojnacki, I807a, Tamaya, and Godfrey by providing necessary connection between the system and external connectors. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Sean P Hagan whose telephone number is (571)270-1242. The examiner can normally be reached Monday - Thursday, 8:30AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at 571-272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SEAN P HAGAN/Examiner, Art Unit 2828
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Prosecution Timeline

Jun 25, 2021
Application Filed
May 02, 2024
Non-Final Rejection — §103
Aug 05, 2024
Response Filed
Oct 31, 2024
Final Rejection — §103
Jan 10, 2025
Examiner Interview Summary
Jan 10, 2025
Applicant Interview (Telephonic)
Feb 05, 2025
Response after Non-Final Action
Apr 02, 2025
Request for Continued Examination
Apr 03, 2025
Response after Non-Final Action
Jul 31, 2025
Non-Final Rejection — §103
Nov 05, 2025
Response Filed
Feb 11, 2026
Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
38%
Grant Probability
69%
With Interview (+30.8%)
3y 4m
Median Time to Grant
High
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