Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
DETAILED ACTION
This is an AIA application filed June 25, 2021.
The earliest effective filing date of this AIA application is seen as June 25, 2021, the actual filing date, there being no earlier priority applications.
The present application is also related to the applications giving rise to the following patent publication(s):
Office
Application
App. Date
Pub. #
Pub. Date
EP
22164406
03/25/2022
EP 4116752 A1
01/11/2023
CN
202210579449
05/25/2022
CN 115598774 A
01/13/2023
The claims filed March 4, 2026 are entered, currently outstanding, and subject to examination.
This action is in response to the filing of the same date.
The current status and history of the claims is summarized below:
Last Amendment/Response
Previously
Amended:
1
1, 2, & 4-14
Cancelled:
none
15-26
Withdrawn:
none
none
Added:
none
21-26
Claims 1-14 are currently pending and outstanding.
Regarding the last reply:
Claim 1 was amended.
No claims were cancelled.
No claims were withdrawn.
No claims were added.
Claims 1-14 are currently outstanding and subject to examination.
This is a final action and is the fourth action on the merits.
Allowable subject matter is not indicated below.
Often, in the substance of the action below, formal matters are addressed first, claim rejections second, and any response to arguments third.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 4, 2026 has been entered.
Claim Rejections - 35 USC § 112(b/¶ 2)
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1 (and by dependency, claims 2-14) are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Amended claim 1 mentions "individual fibers" without specifying what kind of fibers they are and whether or not such "individual fibers" constitute part of the claim. Are "individual fibers" necessary for infringement?
Special Definitions for Claim Language - MPEP § 2111.01(IV)
No special definitions as defined by MPEP § 2111.01(IV) are seen as present in the specification regarding the language used in the claims. Consequently, the words and phrases of the claims are given their plain meaning. MPEP §§ 2173.01, 2173.05(a), and 2111.01.
If special definitions are present, Applicant should bring those to the attention of the examiner and the prosecution history with its next response in a manner both specific and particular. In doing so, there will be no mistake, confusion, and/or ambiguity as to what constitutes the special definition(s). Per above, such special definitions must conform to the requirements of MPEP § 2111.01(IV).
To date, Applicant has provided no indication of special definitions.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, and 5-12 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by U.S. Patent Application Publication No. 20060159387 of Handelman (Handelman).
With respect to claim 1, Handelman discloses an integrated circuit (IC) package (Fig. 1, ¶ 107 et seq., PIC device 10), comprising:
an optical die (¶ 107, "a PIC device 10 with an embedded optical interconnect mesh 20 structured to enable a configurable network architecture") comprising a configurable optical switch (¶ 110, "The embedded optical interconnect mesh 20 preferably includes a plurality of optical paths 65, a reflecting optical element 70, and a bi-directional coupler 80". ¶ 137, "Multicast to only some of the OE nodes may be obtained by broadcasting information with addresses of only some of the OE nodes. Although all the OE nodes receive the information, only OE nodes having one of the broadcasted addresses process the information and all other OE nodes ignore the information. Unicast may similarly be obtained by broadcasting information with an address of only one OE node.” The foregoing is seen as teaching addressable switching. Reconfiguration is disclosed in ¶ 141 where, "[f]or example, if initially the PIC device 10 is configured in the star network architecture, the PIC device 10 may later be reconfigured, for example in response to an instruction entered by an operator of the control and management system 190, from the star network architecture to the bus/broadcast network architecture or to the ring network architecture. Such reconfiguration is performed, for example, by changing operation modes of the optical transceivers 30 to correspond to the reconfigured network architecture.") operably coupled to one or more optical transceivers (¶ 108, "set of optical transceivers 30");
an optical connector (¶ 121, "link adder 140 is preferably operative to associate an external optical unit 150 with the optical interconnect mesh 20") comprising one or more exo-package optical ports (¶ 121, "ports 160 and 170 in the link adder 140"),
the one or more exo-package optical ports operably coupled to the configurable optical switch (per above re the link adder 1140 with ports 160/170),
wherein the configurable optical switch is to pass optical signals on the one or more exo-package optical ports to the one or more optical transceivers (via the interconnection available through bi-directional coupler 80),
wherein the configurable optical switch is configurable to map individual fibers coupled to the one or more exo-package optical ports to individual fibers coupled to the one or more optical transceivers (¶ 134, "The bi-directional coupler 80 then distributes such reflected optical signals among all the optical receivers 50 via the ports 90 and corresponding optical paths 65 of the optical interconnect mesh 20.” Per Fig. 1, exo-ports 160 and 170 are connected to ports 90 of the bi-directional coupler 80. ¶ 137, "Multicast to only some of the OE nodes may be obtained by broadcasting information with addresses of only some of the OE nodes.” In light of these disclosures, Handelman can address individual ports 90, including those of the connected exo-ports 160 and 170.);
and an IC die comprising electronic circuitry operably coupled to the one or more optical transceivers (¶ 126, "control and management system 190").
With respect to claim 2, Handelman as set forth above discloses the IC package of claim 1, including one wherein
the optical die (10) is a first optical die,
wherein a second optical die (¶¶ 118, 119; "The interface unit 130 preferably associates the set of optical transceivers 30 with at least one of the following: subsystems of an electronic chip (not shown) which communicate with each other via the set of optical transceivers 30; and a set of electronic chips (not shown) which communicate with each other via the set of optical transceivers 30.” The chips are seen as dies.) comprises the one or more optical transceivers, and,
wherein the one or more optical transceivers are operably coupled to the configurable optical switch (such coupling is not seen as affected by chip/die structure.).
With respect to claim 3, Handelman as set forth above discloses the IC package of claim 2, including one wherein
the one or more optical transceivers are optically coupled to the configurable optical switch through an at least one optical fiber, waveguide or a free-space laser coupling.
¶ 114:
The embedded optical interconnect mesh 20 preferably includes at least one of the following: a free-space optical interconnect mesh; a waveguide optical interconnect mesh; a fiber interconnect mesh; a photonic crystal waveguide optical interconnect mesh; and a combination of at least two of the following: a free-space optical interconnect mesh; a waveguide optical interconnect mesh; a fiber interconnect mesh; and a photonic crystal waveguide optical interconnect mesh.
With respect to claim 5, Handelman as set forth above discloses the IC package of claim 1, including one wherein
the optical die (10) comprises the configurable optical switch (20) and at least one of the one or more optical transceivers (30), and
wherein the configurable optical switch (20) is optically coupled to the one or more optical transceivers (Fig. 1, optical transceivers 30) .
With respect to claim 6, Handelman as set forth above discloses the IC package of claim 1, including one wherein
wherein the IC die (190) comprises an electronic logic circuit (seen as inherent for control and management) electrically coupled (¶ 127, "electrical interconnect 200") to the configurable optical switch (as part of the PIC device 10); and
wherein the electronic logic circuit (190) is to configure the configurable optical switch (20) to pass an optical signal on the at least one exo-package optical port (240/250) to at least a first intra-package optical port (90, say at the top) optically coupled to the at least one of the one or more optical transceivers (30, see ¶ 141).
With respect to claim 7, Handelman as set forth above discloses the IC package of claim 6, including one wherein
the electronic logic circuit (190) is to configure the configurable optical switch (20) to re-route the optical signal on the at least one exo-package optical port (240/250) to at least a second intra-package optical port (90, say at the bottom) optically coupled to the at least one of the one or more optical transceivers (30).
With respect to claim 8, Handelman as set forth above discloses the IC package of claim 7, including one wherein
a nonvolatile memory is coupled to the electronic logic circuit (¶ 148, "Preferably, the control and management system 190 maintains an identification of the first sub-group and an identification of the second sub-group."),
the nonvolatile memory is operable to store binary data comprising switch configuration information readable by the electronic logic circuit (Id.), and
wherein the nonvolatile memory is programmable through a connection to an external logic device (¶ 141, "For example, if initially the PIC device 10 is configured in the star network architecture, the PIC device 10 may later be reconfigured, for example in response to an instruction entered by an operator of the control and management system 190, from the star network architecture to the bus/broadcast network architecture or to the ring network architecture.” Instructions are seen as programming).
With respect to claim 9, Handelman as set forth above discloses the IC package of claim 8, including one wherein
the electronic logic circuit (190) is to produce logic signals operably coupled to the configurable optical switch (per above, claim 6),
wherein the logic signals are to dynamically reconfigure the optical coupling according to the switch configuration information stored within the nonvolatile memory (¶ 141 re configurable architecture per claim 8, above).
With respect to claim 10, Handelman as set forth above discloses the IC package of claim 6, including one wherein
the electronic logic circuit is to detect a degradation in optical performance of one or more optical ports coupled to the configurable optical switch (intended use, see below).
Claim 10 requires a device constructed according to its immediate parent claim, claim 6, to be operated in a certain manner.
The manner of operating the device does not differentiate an apparatus claim from the prior art. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987) (The preamble of claim 1 recited that the apparatus was “for mixing flowing developer material” and the body of the claim recited “means for mixing ..., said mixing means being stationary and completely submerged in the developer material”. The claim was rejected over a reference which taught all the structural limitations of the claim for the intended use of mixing flowing developer. However, the mixer was only partially submerged in the developer material. The Board held that the amount of submersion is immaterial to the structure of the mixer and thus the claim was properly rejected.). MPEP § 2114(II).
Consequently, claim 10 is rejected on the same grounds as its immediate parent claim, claim 6, as not being differentiated from it.
Further, for product and apparatus claims, when the structure recited in the reference is substantially identical to that of the claims, claimed properties or functions are presumed to be inherent. Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977). MPEP § 2112.01(I).
Below, this analysis is referred to as “intended use”. Subject matter in the claims directed to the intended use of a structure is not seen as providing a structural distinction over prior art.
With respect to claim 11, Handelman as set forth above discloses the IC package of claim 10, including one wherein
the electronic logic circuit is to produce logic signals to be sent to the configurable optical switch to switch a first optical connection from a second optical connection to a third optical connection (intended use, per above),
wherein the second optical connection has a degradation in operational performance detectable by the electronic logic circuit, and
the third optical connection is a substantially functional optical connection.
¶ 141 has "the star network, the bus/broadcast network and the ring network due to, inter alia, the structure of the optical interconnect mesh 20." which is seen to provide multiple configurations between several optical connections. Degradation would occur when one configuration is less preferable to another.
With respect to claim 12, Handelman as set forth above discloses the IC package of claim 1,
wherein the IC package (10) is electrically coupled to a printed circuit board (PCB; ¶ 105, "The photonic integrated circuit device is suitable for integration into a hybrid electrical-optical printed circuit board (PCB) or is integrated into a hybrid electrical-optical PCB."; ¶ 127), and
wherein the IC package is electrically coupled to power signal routing within the PCB wherein the IC package is electrically coupled to power signal routing within the PCB (as per usual/normal PCB/circuit operation).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims, the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 4, 13, and 14 are rejected under 35 U.S.C. § 103 as being unpatentable over Handelman as set forth above.
With respect to claim 4, Handelman as set forth above discloses the IC package of claim 1, including one wherein
the IC die (190) is a first die electrically coupled to the electronic circuitry and optically coupled to a first optical port (via optical interconnects 220 and 230) on the first die (190),
wherein a second die (PIC device 10) comprises the configurable optical switch (20) and a second optical port (any of those shown in Fig. 1 on the left side 210, 240, 250, 160, 170) optically coupled (optical paths 65) to the configurable optical switch (20), and
wherein at least one optical fiber is coupled to the first optical port and to the second optical port (¶ 105, "Each optical interconnect in the photonic integrated circuit device includes at least one of the following: a free-space optical interconnect; a waveguide optical interconnect; a fiber interconnect; and an optical interconnect based on photonic crystal waveguides.” ¶ 127 has optical interconnects 220 and 230.).
¶ 126, "Preferably, the PIC device 10 is operatively associated with a control and management system 190. The control and management system 190 is external to the PIC device 10. Alternatively, part of the control and management system 190 may be comprised in the PIC device 10."
Handelman as set forth above does not disclose:
The first die comprising the one or more optical transceivers.
As the opto-electronic response of the resulting circuit is seen as being the same as the configuration of claim 1, the subject matter of claim 4 is seen as a rearrangement of parts.
It would have been obvious to one having ordinary skill in the art at the time of applicant's invention to have such a rearrangement of parts as a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular parts arrangement was significant. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975). MPEP § 2144.04(VI)(C).
Further, the combination would then provide:
The first die comprising the one or more optical transceivers.
With respect to claim 13, Handelman as set forth above discloses the IC package of claim 12, including one wherein
the IC package is a first IC package, the IC die is a first IC die, the configurable optical switch is a first configurable optical switch, further comprising a second IC package optically coupled through one or more optical fibers to the at least one exo-package optical port[[s]] of the first IC package,
the second IC package comprising a second IC die and a second configurable optical switch.
Duplication of parts (see below) vie external optical unit 150 and/or adapter 180, ¶ 121 et seq. and ¶ 156.
Per ¶ 156:
It is appreciated that the PIC device 10 may be comprised in a photonic switch (not shown) and used to switch and route optical signals. For example, a first OE node in the PIC device 10 may receive an optical packet either from a first element of the photonic switch (not shown) or from a chip in the PIC device 10 which is associated with the first OE node and switch the optical packet either to a second OE node of the PIC device 10 or to a second element of the photonic switch. In such an application, the photonic switch replaces the external optical unit 150 and reception of the optical packet from the first element of the photonic switch and transmission of the optical packet to the second element of the photonic switch are preferably performed via the link adder 140. The optical packet may include a fixed-length optical packet, or an optical burst, that is a variable-length optical packet.
Mere duplication of parts has no distinguishing significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960); MPEP § 2144.04(VI)(B). Here, Handelman is seen to provide for duplication of additional PIC device elements and other elements in a photonic switch.
With respect to claim 14, Handelman as set forth above discloses the IC package of claim 13, including one wherein
the first IC die comprises an electronic logic circuit optically coupled to the second configurable optical switch within the second IC package (per coordination between switches, see claim 13, above),
wherein the electronic logic circuit is coupled to a non-volatile memory (¶ 148, "Preferably, the control and management system 190 maintains an identification of the first sub-group and an identification of the second sub-group.") comprising configuration information (Id.) readable by the electronic logic circuit to produce logic signals to be sent to the second configurable optical switch (per claim 13, above, the duplication of parts therein and the photonic switch operation).
Response to Arguments
Applicant's arguments filed March 4, 2026 have been fully considered but they are not persuasive and the claim rejections are not rebutted.
Applicant argues that:
The examiner asserts that Handelman's description, in paragraph 110, of an embedded optical interconnect mesh 20 discloses the claimed optical switch, and that it is configurable because Handelman describes, in paragraph 141, reconfiguration of a device 10 from a star network architecture to a bus/broadcast network architecture.
However, Handelman describes this reconfiguration as being performed by changing operation modes of optical transceivers 30, not by reconfiguring an optical switch. Furthermore, no description or suggestion of mapping individual fibers coupled to exo-package optical ports to individual fibers coupled to optical transceivers is found in Handelman.
Examiner response: No indication is made as to what constitutes “reconfiguring an optical switch”. As Handelman indicates the ability to individually address devices connected to the ports 90 of bi-directional coupler 80, reconfiguration must occur so that the embedded optical interconnect mesh 20 can perform that task as well as achieving different network configurations.
Applicant's arguments with regards to the remaining claims all rely upon the arguments set forth above. Consequently, these remaining arguments as seen as being addressed by the examiner's corresponding remarks.
Applicant’s remaining arguments fail to comply with 37 CFR 1.111(b) because they amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references. As such, the examiner makes no remarks regarding them.
Conclusion
Applicant’s publication US 20220413216 A1 published December 29, 2022 was previously cited.
No new art is cited.
This is a request for continued examination/RCE of the current application. All claims are drawn to the same invention claimed in the earlier application and could have been finally rejected on the grounds and art of record in the next Office action if they had been entered in the earlier application. Accordingly, THIS ACTION IS MADE FINAL even though it is a first action in this case. See MPEP § 706.07(b). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW JORDAN whose telephone number is (571) 270-1571. The examiner can normally be reached most days 1000-1800 PACIFIC TIME ZONE (messages are returned).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. While examiner does not examine over the phone (see 37 C.F.R. § 1.2), examiner is glad to clarify or discuss issues so long as it forwards prosecution.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas (Tom) HOLLWEG can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Andrew Jordan/
Primary Examiner, Art Unit 2874
V: (571) 270-1571 (Pacific time)
F: (571) 270-2571
March 16, 2026