Prosecution Insights
Last updated: April 19, 2026
Application No. 17/370,353

IMAGING ELEMENT AND IMAGING DEVICE HAVING PIXELS EACH WITH MULTIPLE PHOTOELECTRIC CONVERTERS

Non-Final OA §103
Filed
Jul 08, 2021
Examiner
SPINKS, ANTOINETTE T
Art Unit
2639
Tech Center
2600 — Communications
Assignee
Nikon Corporation
OA Round
5 (Non-Final)
72%
Grant Probability
Favorable
5-6
OA Rounds
2y 9m
To Grant
92%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
654 granted / 913 resolved
+9.6% vs TC avg
Strong +20% interview lift
Without
With
+20.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
39 currently pending
Career history
952
Total Applications
across all art units

Statute-Specific Performance

§101
2.8%
-37.2% vs TC avg
§103
49.0%
+9.0% vs TC avg
§102
27.9%
-12.1% vs TC avg
§112
14.5%
-25.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 913 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on February 26, 2026 has been entered. Response to Amendment The amendment filed on February 26, 2026 in response to the previous Office Action (09/30/2025/2025) is acknowledged and has been entered. Claims 1 – 2, 4 – 9 and 16 – 23 are currently pending. Claims 3 and 10 – 15 are canceled. Applicant' s amendment overcomes the following objections/rejections in the last Office Action: Rejection under 112(a) Response to Arguments Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 – 2, 6 – 9. 16 – 17 and 21 – 23 are rejected under 35 U.S.C. 103 as being unpatentable over Hamada (US 2011/0019043) in view of Watanabe (US 4,479,143). Regarding claim 1, Hamada discloses, in at least figures 8 – 11, an image sensor comprising: a first photoelectric converting unit (PD3) that converts light passing through a first micro lens (13) into electrical charge (fig. 11, 6; ¶50); a second photoelectric converting unit (PD2) that converts light passing through second first micro lens (13) into electrical charge (fig. 11, 60; ¶50); a third photoelectric converting unit (PD1) that converts light passing through a first micro lens (13) into electrical charge (fig. 11, 6; ¶50; a fourth photoelectric converting unit (PD4) that converts light passing through a first micro lens (13) into electrical charge (Fig. 11, 6; ¶50); a first transfer unit (Tr13) that transfers the electrical charge converted by the first photoelectric converting unit (¶51); a second transfer unit (Tr12) that transfers the electrical charge converted by the second photoelectric converting unit (¶51), second transfer unit being arranged in line with the first transfer unit in the row direction (fig. 11); a third transfer unit (Tr11) that transfers the electrical charge converted by the third photoelectric converting unit (¶51); and a fourth transfer unit (Tr14) that transfers the electrical charge converted by the fourth photoelectric converting unit (¶51), the fourth transfer unit being arranged in line with the third transfer unit in the column direction (fig. 11); a first electrical charge detecting unit (20) that is a region shared by the first photoelectric converting unit, the second photoelectric converting unit, the third photoelectric converting unit and the fourth photoelectric converting unit, and detects the electrical charge transferred from the first photoelectric converting unit by the first transfer unit, the electrical charge transferred from the second photoelectric converting unit by the second transfer unit, the electrical charge transferred from the third photoelectric converting unit by the third transfer unit and the electrical charge transferred from the fourth photoelectric converting unit by the fourth transfer unit (figs. 8-11: single FD node is shared between all the PDs); and wherein the first transfer unit and the second transfer unit are arranged such that a transfer direction of the electrical charge converted by the first photoelectric converting unit from the first photoelectric converting unit to the first electrical charge detecting unit is opposite to a transfer direction of the electrical charge converted by the second photoelectric converting unit from the second photoelectric converting unit to the first electrical charge detecting unit, and the third transfer unit and the fourth transfer unit are arranged such that a transfer direction of the electrical charge converted by the third photoelectric converting unit from the third photoelectric converting unit to the first electrical charge detecting unit is opposite to a transfer direction of the electrical charge converted by the fourth photoelectric converting unit from the fourth photoelectric converting unit to the first electrical charge detecting unit (fig. 11). Hamada fails to explicitly disclose wherein first and second PDs pass light through a first and second filter with a first spectral characteristic and third and fourth PDs pass light through a third and fourth filter with a second spectral characteristic different from the first. In a similar field of endeavor, Watanabe teaches a color imaging array and device with a filter arrangement that has the 2 color filters of a first color and 2 filters of a second color arranged in the same pixel block (fig. 3, 8). In light of the teaching of Watanabe, it would have been obvious to one of ordinary skill in the art before the effective filing date, to use Watanabe’s teaching in Hamada system because an artisan of ordinarily skill would recognize that placing the same type color in rows/columns as shown in Watanabe, the image sensor can obtain higher dynamic range and color resolution. Regarding claim 8, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 1. Hamada also teaches a generating unit (75) that generates image data by using a signal output by the image signal (¶49). Regarding claim 16, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 1. Hamada also teaches a first transfer control line for controlling the first transfer unit (control line connect to gate of Tr11); a second transfer control line for controlling the second transfer unit (control line connect to gate of Tr14); a third transfer control line for controlling the third transfer unit (control line connect to gate of Tr12); and a fourth transfer control line for controlling the fourth transfer unit (control line connect to gate of Tr13). Regarding claim 17, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 16. Hamada also teaches wherein the first microlens, the second microlens, the third microlens and the fourth microlens are provided in a microlens layer (13) (fig. 5),the first photoelectric converting unit, the second photoelectric converting unit, the third photoelectric converting unit and the fourth photoelectric converting unit are provided in a semiconductor layer (50) that is stacked with the microlens layer (fig. 5), the first transfer control line, the second transfer control line, the third transfer control line and the fourth transfer control line are provided in a wiring layer (51) that is stacked with the microlens layer (fig. 5), and Tanaka teaches wherein the semiconductor layer (53) is provided between the microlens layer (57) and the wiring layer (52) in a stack direction in which the microlens layer, the semiconductor layer and the wiring layer are stacked (fig. 3). Regarding claim 2, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 17. Hamada also teaches a first reset unit (Tr2), for resetting a voltage of the first electrical charge detecting unit and a first output unit that includes a transistor gate that is electrically connected to the first electrical charge detecting unit (¶52) and that outputs (via Tr4)a signal based on the electrical charge detected by the first electrical charge detecting unit are provided in the semiconductor layer (figs. 8-11). Regarding claim 6, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 2. Hamada also teaches wherein a first reset control line (RST control line connected to gate of reset transistor Tr2) that outputs a control signal for controlling the reset unit is provided in the wiring layer (¶59:common reset signal). Regarding claim 7, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 2. Hamada also teaches wherein a first output control line (SEL control line connected to gate of selection transistor Tr4) for controlling the output unit is provided in the wiring layer (¶59:common selection signal). Regarding claim 9, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 2. Hamada also teaches further comprising a first signal line (8) that is electrically connected to the first output unit, and outputs the signal, wherein the first signal line is provided in the wiring layer (¶54, 58, 60, 66: vertical signal line). Regarding claim 21, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 1. The combination also teaches further comprising: a fifth photoelectric converting unit that converts light passing through the first microlens and the first filter into electrical charge, the fifth photoelectric converting unit being arranged next to the first photoelectric converting unit in the row direction; a sixth photoelectric converting unit that converts light passing through the second microlens and the second filter into electrical charge, the sixth photoelectric converting unit being arranged next to the second photoelectric converting unit in the row direction; a seventh photoelectric converting unit that converts light passing through the third microlens and the third filter into electrical charge, the seventh photoelectric converting unit being arranged next to the third photoelectric converting unit in the column direction; and an eighth photoelectric converting unit that converts light passing through the fourth microlens and the fourth filter into electrical charge, the eighth photoelectric converting unit being arranged next to the fourth photoelectric converting unit in the column direction (Hamada fig. 11; Watanabe fig. 3, 8). Regarding claim 22, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 21. The combination also teaches wherein the first photoelectric converting unit is provided between the second photoelectric converting unit and the fifth photoelectric converting unit in the row direction, the second photoelectric converting unit is provided between the first photoelectric converting unit and the sixth photoelectric converting unit in the row direction, the third photoelectric converting unit is provided between the fourth photoelectric converting unit and the seventh photoelectric converting unit in the column direction, and the fourth photoelectric converting unit is provided between the third photoelectric converting unit and the eight photoelectric converting unit in the column direction (Hamada fig. 11; Watanabe fig. 3, 8). Regarding claim 23, Hamada in view of Iwata in view of Iwabuchi et al. disclose all the aforementioned limitations of claim 21. The combination also teaches further comprising: a fifth transfer unit that transfers the electrical charge converted by the fifth photoelectric converting unit, the fifth transfer unit being arranged in line with the first transfer unit in the row direction; a sixth transfer unit that transfers the electrical charge converted by the sixth photoelectric converting unit, the sixth transfer unit being arranged in line with the first transfer unit in the row direction; a seventh transfer unit that transfers the electrical charge converted by the seventh photoelectric converting unit, the seventh transfer unit being arranged in line with the third transfer unit in the column direction; an eighth transfer unit that transfers the electrical charge converted by the eighth photoelectric converting unit, the eighth transfer unit being arranged in line with the third transfer unit in the column direction; a second electrical charge detecting unit that detects the electrical charge transferred from the fifth photoelectric converting unit by the fifth transfer unit; a third electrical charge detecting unit that detects the electrical charge transferred from the sixth photoelectric converting unit by the sixth transfer unit; a fourth electrical charge detecting unit that detects the electrical charge transferred from the seventh photoelectric converting unit by the seventh transfer unit; and a fifth electrical charge detecting unit that detects the electrical charge transferred from the eighth photoelectric converting unit by the eighth transfer unit (Hamada figs. 8-11: single FD node is shared between all the PDs). Claim(s) 5 are rejected under 35 U.S.C. 103 as being unpatentable over Hamada (US 2011/0019043) in view of Watanabe in view of Tanaka (US 2015/0288901). Regarding claim 5, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 1. The combination fails to explicitly disclose a focus detecting unit that detects a focused state by using the signal output by the image sensor. In a similar field of endeavor, Tanaka teaches an image sensor with microlens (57) and a color filter arrangement with divided pixel structure is used to determine and perform focus adjustment based on the analysis of the captured image data (¶70, 106). In light of the teaching of Tanaka, it would have been obvious to one of ordinary skill in the art before the effective filing date, to use Tanaka’s teaching in Hamada system because an artisan of ordinarily skill would recognize the phase detection AF enables fast autofocusing because it detects the focus state at each lens position. Claim(s) 4 and 18 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hamada (US 2011/0019043) in view of Watanabe in view of Iwabuchi et al. (US 2014/0175592). Regarding claim 18, Hamada in view of Watanabe disclose all the aforementioned limitations of claim 9. Hamada also teaches further comprising a signal processing unit that performs a signal processing on the signal output by the first signal line (¶11: output unit 6 includes a signal processing circuit 11 for processing output signals provided through the horizontal transfer lines 10). The combination fails to explicitly disclose wherein the semiconductor layer and the wiring layer are provided in a first semiconductor chip, and the signal processing unit is provided in a second semiconductor chip that is stacked with the first semiconductor chip. In a similar field of endeavor, Iwabuchi teaches a stacked image sensor structure where a memory, processor (ADC array) and image sensor are all on separate chips with penetration contact portions 84 passing through the processing chip 53 (that is not part of an imaging region) (fig. 1; ¶98). In light of the teaching of Iwabuchi, it would have been obvious to one of ordinary skill in the art before the effective filing date, to use Iwabuchi’s teaching in Hamada system because an artisan of ordinarily skill would recognize vias allow for electrical connection between stacked chips and stacking reduces device size. Regarding claim 4, Hamada in view of Watanabe in view of Iwabuchi disclose all the aforementioned limitations of claim 18. Hamada also teaches further comprising a control unit that performs a control such that an electrical charge accumulation time of the electrical charge converted by the first photoelectric converting unit is different from an electrical charge accumulation time of the electrical charge converted by the second photoelectric converting unit (fig. 1; vertical driving unit 4 and horizontal transfer unit 5 indicate a rolling shutter). Regarding claim 19, Hamada in view of Watanabe in view of Iwabuchi disclose all the aforementioned limitations of claim 4. Hamada also teaches wherein the control unit performs a control such that an electrical charge accumulation time of the electrical charge converted by the third photoelectric converting unit is different from an electrical charge accumulation time of the electrical charge converted by the fourth photoelectric converting unit (fig. 1; vertical driving unit 4 and horizontal transfer unit 5 indicate a rolling shutter). Regarding claim 20, Hamada in view of Watanabe view of Iwabuchi et al. disclose all the aforementioned limitations of claim 18. Iwabuchi also teaches further comprising a third semiconductor chip that is stacked with the first semiconductor chip, and includes a recording unit for recording the signal to which the signal processing is performed by the signal processing unit (fig. 1; stacked image sensor structure where a memory, processor (ADC array) and image sensor are all on separate chips). Contact Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTOINETTE SPINKS whose telephone number is (571)270-3749. The examiner can normally be reached M-Th 7am - 5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at 571-272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTOINETTE T SPINKS/Primary Examiner, Art Unit 2639
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Prosecution Timeline

Jul 08, 2021
Application Filed
Aug 29, 2023
Non-Final Rejection — §103
Feb 06, 2024
Response Filed
May 13, 2024
Final Rejection — §103
Nov 14, 2024
Request for Continued Examination
Nov 18, 2024
Response after Non-Final Action
Jan 27, 2025
Non-Final Rejection — §103
Jun 30, 2025
Response Filed
Sep 24, 2025
Final Rejection — §103
Feb 26, 2026
Request for Continued Examination
Feb 27, 2026
Response after Non-Final Action
Mar 05, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
72%
Grant Probability
92%
With Interview (+20.4%)
2y 9m
Median Time to Grant
High
PTA Risk
Based on 913 resolved cases by this examiner. Grant probability derived from career allow rate.

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