Prosecution Insights
Last updated: April 19, 2026
Application No. 17/383,928

ENCODER AND DECODER USING A DEBLOCKING FILTER FOR A SUB-BLOCK TRANSFORM BOUNDARY BETWEEN A FIRST PARTITION AND A SECOND PARTITION

Non-Final OA §103
Filed
Jul 23, 2021
Examiner
PRINCE, JESSICA MARIE
Art Unit
2486
Tech Center
2400 — Computer Networks
Assignee
Panasonic Intellectual Property Corporation of America
OA Round
9 (Non-Final)
76%
Grant Probability
Favorable
9-10
OA Rounds
3y 1m
To Grant
93%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
535 granted / 700 resolved
+18.4% vs TC avg
Strong +16% interview lift
Without
With
+16.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
37 currently pending
Career history
737
Total Applications
across all art units

Statute-Specific Performance

§101
6.0%
-34.0% vs TC avg
§103
45.8%
+5.8% vs TC avg
§102
14.5%
-25.5% vs TC avg
§112
17.5%
-22.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 700 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/25/2026 has been entered. Response to Arguments Applicant’s arguments with respect to claim(s) 15-26 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 15-19, 21, and 23, 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al., (U.S. Pub. No. 2022/0228832 A1) in view of Wang et al., (U.S. Pub. No. 2022/0014793 A1). As per claim 15, Tsai teaches an encoder ([0021], [0028]), comprising: circuitry ([0084], [0089]), the circuitry, in operation: sets a parameter to a first value in response to a current boundary being a sub-block transform (SBT) boundary between partitions included in a single transform block on which the SBT is performed (fig. 13, abstract, [0030-0031] and fig. 11), the parameter being utilized to determine a strength of a deblocking filter (table 1, fig. 13 el. 1320 and [0030-0031] and [0084], [0086]), wherein, in the SBT, the single transform block is divided into partitions (fig. 11 and fig. 13), and an orthogonal transform is selectively performed on one or more of the partitions (fig. 7), wherein the current boundary is inside the single transform block and is different from a boundary between different transform blocks (fig. 11 and abstract, and [0030-0031], [0052], [0061], [0073], [0081]); and applies the deblocking filter to the current boundary according to the parameter (fig. 13). Although Tsai discloses the claimed encoder ([0021], [0028]), Tsai does not explicitly disclose the claimed memory coupled to the circuitry, as recited in claim 15. However, Wang teaches the claimed memory coupled to the circuitry (fig. 1A-B). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Wang with Tsai in order to provide improved compression and decompression techniques that improve compression ratio with little to no sacrifice in picture quality are desirable. As per claim 16, Tsai (modified by Wang) as a whole teaches everything as claimed above, see claim 15. In addition, Tsai teaches wherein the SBT, the single transform block is divided into two partitions (fig. 11), and the orthogonal transform is selectively performed on one the partitions (fig. 7). As per claim 17, which is the corresponding decoder with the limitations of the encoder as recited in claim 15, thus the rejection and analysis made for claim 15 also applies. As per claim 18, which is the corresponding decoder with the limitations of the encoder as recited in claim 16, thus the rejection and analysis made for claim 16 also applies. As per claim 19, Tsai teaches an encoder, comprising: sets a first parameter to a first value in response to a current boundary between partitions being included in a single transform block on which a sub-block transform (SBT) is performed (fig. 13 el. 1310, [0086]), the first value indicating applying a deblocking filter to the current boundary (fig. 13 el. 1320, table 1, [0006] [0086]), wherein, in the SBT, the single transform block is divided into partitions (fig. 11), and an orthogonal transform is selectively performed on one or more of the partitions (fig. 7), wherein the current boundary is inside the single transform block and is different from a boundary between different transform blocks (fig. 11); determines a second parameter different from the first parameter (table 2); and applies the deblocking filter corresponding to the second parameter to the current boundary (fig. 13, table 1). Although Tsai discloses an encoder ([0021]), comprising circuitry ([0089]), Tsai does not explicitly disclose memory coupled to the circuitry, as recited in claim 19. However, Wang teaches a memory coupled to the circuitry (fig. 1A-B). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Wang with Tsai in order to provide improved compression and decompression techniques that improve compression ratio with little to no sacrifice in picture quality are desirable. As per claim 21, which is the corresponding decoder with the limitations of the encoder as recited in claim 19, thus the rejection and analysis made for claim 19 also applies here. As per claim 23, Tsai (modified by Wang) as a whole teaches everything as claimed above, see claim 15. In addition, Tsai teaches wherein at least one of the partitions has a non-zero transform coefficient ([0030-0031], [0081]). As per claim 25, which is the corresponding decoder with the limitations of the encoder as recited in claim 23, thus the rejection and analysis made for claim 23 also applies. Claim(s) 20, 22, 24 and 26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al., (U.S. Pub. No. ) in view of Wang et al., (U.S. Pub. No. 2022/0014793 A1) and further in view of Wedi et al., (U.S. Pub. No. 2014/0056350 A1). As per claim 20, Tsai (modified by Wang) as a whole teaches everything as claimed above, see claim 19. Tsai does not explicitly disclose wherein the second parameter includes a first value corresponding to a first deblocking filter and a second value corresponding to a second deblocking filter stronger than the first deblocking filter. However, Wedi teaches wherein the second parameter includes a first value corresponding to a first deblocking filter and a second value corresponding to a second deblocking filter stronger than the first deblocking filter ([0027-0028], “selecting a first or second deblocking filter for being applied to the block boundary using a threshold that is defined based on the second parameter, wherein the first and the second deblocking filters have different strengths”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Wedi with Tsai (modified by Wang) for the benefit to improve scheme for deciding deblocking and selecting appropriate deblocking filters, abstract. As per claim 22, which is the corresponding decoder with the limitations of the encoder as recited in claim 20, thus the rejection and analysis made for claim 20 also applies here. As per claim 24, Tsai (modified by Wang) as a whole teaches everything as claimed above, see claim 15. Tsai does not explicitly disclose wherein the parameter includes: a first value corresponding to a first deblocking filter, a second value corresponding to a second deblocking filter stronger than the first deblocking filter, and a third value indicating that the deblocking filter is not applied. However, Wedi teaches wherein the parameter includes: a first value corresponding to a first deblocking filter (fig. 7 and [0107]), a second value corresponding to a second deblocking filter stronger than the first deblocking filter (fig. 7 and [0107]), and a third value indicating that the deblocking filter is not applied (fig. 7 and [0107]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Wedi with Tsai (modified by Wang) for the benefit to improve scheme for deciding deblocking and selecting appropriate deblocking filters, abstract. As per claim 26, which is the corresponding decoder with the limitations of the encoder as recited in claim 24, thus the rejection and analysis made for claim 24 also applies. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JESSICA PRINCE whose telephone number is (571)270-1821. The examiner can normally be reached M-F 7:30-3:30 P.M.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jamie Atala can be reached at 571-272-7384. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JESSICA PRINCE Examiner Art Unit 2486 /JESSICA M PRINCE/ Primary Examiner, Art Unit 2486
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Prosecution Timeline

Jul 23, 2021
Application Filed
May 07, 2022
Non-Final Rejection — §103
Sep 09, 2022
Response Filed
Nov 28, 2022
Final Rejection — §103
May 01, 2023
Request for Continued Examination
May 19, 2023
Response after Non-Final Action
May 20, 2023
Non-Final Rejection — §103
Sep 25, 2023
Response Filed
Sep 29, 2023
Final Rejection — §103
Dec 12, 2023
Interview Requested
Jan 18, 2024
Applicant Interview (Telephonic)
Feb 05, 2024
Examiner Interview Summary
Feb 05, 2024
Request for Continued Examination
Feb 08, 2024
Response after Non-Final Action
Mar 07, 2024
Non-Final Rejection — §103
Aug 08, 2024
Response Filed
Sep 28, 2024
Final Rejection — §103
Dec 27, 2024
Request for Continued Examination
Jan 12, 2025
Response after Non-Final Action
Jan 25, 2025
Non-Final Rejection — §103
Apr 29, 2025
Response Filed
Aug 23, 2025
Final Rejection — §103
Feb 25, 2026
Request for Continued Examination
Mar 08, 2026
Response after Non-Final Action
Mar 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

9-10
Expected OA Rounds
76%
Grant Probability
93%
With Interview (+16.2%)
3y 1m
Median Time to Grant
High
PTA Risk
Based on 700 resolved cases by this examiner. Grant probability derived from career allow rate.

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