Prosecution Insights
Last updated: April 19, 2026
Application No. 17/401,453

METHOD AND DEVICE FOR BIT-BRICK ENCODING AND PARALLEL PROCESSING

Non-Final OA §101
Filed
Aug 13, 2021
Examiner
GUDAS, JAKOB OSCAR
Art Unit
2151
Tech Center
2100 — Computer Architecture & Software
Assignee
Korea Advanced Institute Of Science And Technology
OA Round
4 (Non-Final)
44%
Grant Probability
Moderate
4-5
OA Rounds
4y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 44% of resolved cases
44%
Career Allow Rate
4 granted / 9 resolved
-10.6% vs TC avg
Strong +71% interview lift
Without
With
+71.1%
Interview Lift
resolved cases with interview
Typical timeline
4y 2m
Avg Prosecution
28 currently pending
Career history
37
Total Applications
across all art units

Statute-Specific Performance

§101
33.2%
-6.8% vs TC avg
§103
37.0%
-3.0% vs TC avg
§102
8.0%
-32.0% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 9 resolved cases

Office Action

§101
Detailed Action The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This office action is nonfinal and is in response to claims filed on 02/20/2026 via amendment. Claims 1-2, 4-16, and 18-25 are pending for examination. Claims 1-2, 4-16, and 18-25 are as previously filed. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/20/2026 has been entered. Response to Arguments Rejections Under 35 U.S.C. 101 Applicant’s arguments regarding the 35 U.S.C. 101 rejections have been fully considered. Regarding the rejection under 35 U.S.C. 101, Applicant argues “First the assertion that the claims of Gottshalk are somehow analogous to the present claims is clearly erroneous as Gottshalk involved a mere conversion of numbers into pure binary numbers. The present claims provide an integration of bit-brick encoding into hardware accelerators that result in specific technological improvements”. See Remarks 10 filed 02/20/2026. Examiner respectfully disagrees with Applicant’s arguments. Just because the claims of the present application are not the exact same as those of Gottshalk, that does not mean they are not analogous. Especially the portion which "held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle". Applicant further argues “However, as discussed above, the alleged "evaluation mental processes" include for example, the following claim elements which cannot practically be performed in the human mind: receive input data represented by a 16-bit half floating point, adjust, using an encoder, a number of bits of an exponent and a mantissa of the input data to split the input data into 4-bit units; encode, using the encoder, the input data in which the number of bits has been adjusted such that the exponent is a multiple of "4," wherein the processor is further configured to: calculate a quotient and a remainder obtained when a sum of the exponent of the input data and "4" is divided by "4"; encode the exponent based on the quotient; and encode the mantissa based on the remainder”. See Remarks 16. Examiner respectfully disagrees with Applicant’s arguments. Examiner encourages Applicant to review the office action mailed 10/23/2025, as the limitations above were categorized in the broad category of mathematical concepts and additional elements in steps 2A and 2B. Applicant further argues “Instead, an example encoding method is explained in paragraph [0075] take place at a sufficient level with respects to an exponent and mantissa for adjusting configuration bits at the 28th power that these examples are similar to the allowable processes described above”. See Remarks 17. Examiner respectfully disagrees with Applicant’s arguments. The claims are an improvement to the abstract idea of the math and can be performed in one’s mind using pen and paper. The claims are similar to Gottschalk v. Benson (see MPEP 2106), which "held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle". Applicant further argues “Thus, unlike applying a mathematical formula, the Office has, at best, identified claims that "involve a mathematical concept." Accordingly, in the present claims, Step 2A is satisfied and claim 1, for example, recites statutory subject matter and thus, the dependent claims depending therefore are likewise not abstract”. See Remarks 18. Examiner respectfully disagrees with Applicant’s arguments. The claims are directed to mathematical calculation and relationships which are abstract ideas under Step 2A. The additional elements are clearly an apply it scenario and generally linking the use of the judicial exception to a particular field of use. see MPEP 2106.05(h). Under Step 2B the remaining additional elements are well understood, routine, and conventional as discussed in the office action mailed 10/23/2025. Applicant further argues “That is, claim 1, as an example, provide an improvement "wherein the encoding enables shift-free parallel multiply-accumulate (MAC) operations in the ANN hardware." That is, as described in Paragraph [0005] of the Application… Thus, the claimed invention may provide improved ANN's that may analyze a large volume of input data in real time and to efficiently process that data to extract desired information”. See Remarks 18. Examiner respectfully disagrees with Applicant’s arguments. The recitation of the ANN is clearly generally linking the use of the judicial exception to a particular field of use, as well as intended use. The improvements purported in the claims are rooted in the improvements to the math which Gottschalk v. Benson "held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle". Applicant further argues “the claims do not invoke computers merely as a tool to perform an existing process. Indeed, where the Reminder Memo and other guidance discusses concepts such as "whether the claim purports to improve computer capabilities or to improve an existing technology," the Applicant submits that these claims provide an improvement to computer capabilities (i.e., an ANN)”. See Remarks 20. Examiner respectfully disagrees with Applicant’s arguments. The recitation of the ANN is clearly generally linking the use of the judicial exception to a particular field of use, as well as intended use. The improvements purported in the claims are rooted in the improvements to the math which Gottschalk v. Benson "held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle". Applicant further argues “For example, as discussed above, Ex Parte Guillaume Desjardins stated that "Enfish ranks among the Federal Circuit's leading cases on the eligibility of technological improvements”… This claim is analogous to the current claims such as a process including "receive input data represented by a 16-bit half floating point, adjust, using an encoder, a number of bits of an exponent and a mantissa of the input data to split the input data into 4-bit units," "encode the exponent based on the quotient," and "encode the mantissa based on the remainder," as recited in claim 1”. See Remarks 21. Examiner respectfully disagrees with Applicant’s arguments. The present claims are more closely similar to those of Gottschalk v. Benson (see MPEP 2106), which "held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle". The improvements of the claims are rooted in the improvements to performing the abstract ideas (e.g. the encoding, the calculating, etc.) and not to the computer itself. Applicant further argues “Here, based on the technological improvements provided by the claims, the Applicant submits that the present claims are not a close call, and should be eligible under Section 101”. See Remarks 23. Examiner respectfully disagrees with Applicant’s arguments. The improvements are rooted in the improvements to the math with the addition elements being apply it scenarios, generally linking the abstract idea to a field of use, insignificant extra-solution activity, and being well understood, routine, and conventional. Further, it is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements. See the discussion of Diamond v. Diehr, 450 U.S. 175, 187 and 191-92, 209 USPQ 1, 10 (1981)) in subsection II, below. In addition, the improvement can be provided by the additional element(s) in combination with the recited judicial exception... However, it is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology...”. See MPEP 2106.05(a). Rejections Under 35 U.S.C. 103 Applicant’s arguments, see Remarks 23, with respect to the rejections under 35 U.S.C. 103 have been fully considered and are persuasive. The rejections of claims 10-14 and 18-25 has been withdrawn. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-2, 4-16, and 18-25 are rejected under 35 U.S.C. 101 because the claimed invention is directed to (an) abstract idea(s) without significantly more. Regarding claim 1, at Step 1, the claim is directed to a method, which is a statutory category of invention. At Step 2A prong 1, Examiner notes that the claim is directed towards mental processes and mathematical calculations. The claim language has been reproduced below: An encoding method for artificial neural network (ANN) hardware, comprising: (mental process, evaluation) receiving input data represented by a 16-bit half floating point; (mental process, evaluation) adjusting, by a processor, a number of bits of an exponent and a mantissa of the input data to split the input data into 4-bit units; and (mathematical calculation) encoding, by the processor, the input data in which the number of bits has been adjusted such that the exponent is a multiple of "4" (mathematical calculation) wherein the encoding of the input data comprises: (mental process, evaluation) calculating a quotient and a remainder obtained when a sum of the exponent of the input data and "4" is divided by "4"; (mathematical calculation) encoding the exponent based on the quotient; and (mathematical calculation) encoding the mantissa based on the remainder, (mathematical calculation) wherein the encoding enables parallel multiply-accumulate (MAC) operations in the ANN hardware without shifting during exponent alignment. (mental process, evaluation) Each of the nonbolded limitation are mental processes or mathematical calculation. The “An encoding method for” limitation is an evaluation mental process that can be performed by choosing what the method comprises. The “input data represented by a” limitation is an evaluation mental process that can be performed by choosing what how the input data is represented. The “adjusting, by a processor, a number of bits” limitation is a mathematical calculation that can be performed by adjusting the number of bits by hand using pen and paper. The “encoding, by the processor, the input data” limitation is a mathematical calculation that can be performed by encoding the input by hand using pen and paper. The “wherein the encoding of the input data comprises” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “calculating a quotient and a remainder” limitation is a mathematical calculation that can be performed by calculating a quotient and a remainder by hand using pen and paper. The “encoding the exponent based on” limitation is a mathematical calculation that can be performed by encoding the exponent by hand using pen and paper. The “encoding the mantissa based on” limitation is a mathematical calculation that can be performed by encoding the mantissa by hand using pen and paper. The “wherein the encoding enables” limitation is an evaluation mental process that can be performed by choosing what the encoding enables. At Step 2A prong 2, The additional elements are bolded above. The ‘receiving’ limitation, as claimed and under BRI, is an additional element that is insignificant extra-solution activity. For example, ‘receiving’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed adjusting step. See MPEP 2106.05(g). The artificial neural network (ANN) hardware limitation is merely generally linking the mathematical calculations and mental processes to a technology area. See MPEP 2106.05(h). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). At Step 2B, the claim recites “receiving input data represented by a 16-bit half floating point” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity: i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93. Regarding claims 9 and 15, they recite similar language as claim 1 and are rejected for at least the same reasons therein. Herein claim 9 and 15 are directed towards the statutory category of an article or manufacture and a machine respectively, thus also satisfying step 1. Moreover, none of the additional elements regarding the generic computer components (i.e. A non-transitory computer-readable storage medium, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). Regarding claim 10, at Step 1, the claim is directed to a method, which is a statutory category of invention. At Step 2A prong 1, Examiner notes that the claim is directed towards mental processes and mathematical calculations. The claim language has been reproduced below: A processor-implemented operation method for an artificial neural network (ANN) systolic array, comprising: (mental process, evaluation) receiving first operand data represented by a 4-bit fixed point; (mental process, evaluation) receiving second operand data that are 16 bits wide; (mental process, evaluation) determining, by a processor, a data type of the second operand data; (mental process, evaluation) encoding, by the processor, the second operand data, only in response to a determination that the second operand data are of a floating-point type, and splitting the encoded second operand data into four 4-bit bricks by adjusting the number of bits of an exponent and mantissa of the second operand data, (mathematical calculation) wherein the encoding comprises: (mental process, evaluation) calculating a quotient and a remainder obtained when a sum of the exponent of the second operand data and "4" is divided by "4"; (mathematical calculation) encoding the exponent based on the quotient; and (mathematical calculation) encoding the mantissa based on the remainder, (mathematical calculation) splitting, by the processor, the second operand data into four 4-bit bricks for a parallel data operation, only in response to a determination that the second operand data are of a fixed-point type; and (mathematical calculation) performing, by the processor, a multiply-accumulate (MAC) operation between the second operand data split into the four bricks and the first operand data (mathematical calculation) wherein the splitting enables parallel processing in the systolic array without shifting during accumulation of the MAC operation. (mental process, evaluation) Each of the nonbolded limitation are mental processes or mathematical calculation. The “A processor-implemented operation method for an” limitation is an evaluation mental process that can be performed by choosing what the method comprises. The “first operand data represented by” limitation is an evaluation mental process that can be performed by choosing what how the first operand data is represented. The “second operand data that are” limitation is an evaluation mental process that can be performed by choosing the width of the second data. The “determining, by a processor, a data type” limitation is an evaluation mental process that can be performed by determining the data type by hand using pen and paper. The “encoding, by the processor, the second operand data” limitation is a mathematical calculation that can be performed by encoding the data by hand using pen and paper. The “wherein the encoding of the input data comprises” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “calculating a quotient and a remainder” limitation is a mathematical calculation that can be performed by calculating a quotient and a remainder by hand using pen and paper. The “encoding the exponent based on” limitation is a mathematical calculation that can be performed by encoding the exponent by hand using pen and paper. The “encoding the mantissa based on” limitation is a mathematical calculation that can be performed by encoding the mantissa by hand using pen and paper. The “splitting, by the processor, the second operand data” limitation is a mathematical calculation that can be performed by splitting the data by hand using pen and paper. The “performing, by the processor, a multiply-accumulate” limitation is a mathematical calculation that can be performed by performing the multiply accumulate operation by hand using pen and paper. The “wherein the splitting enables parallel” limitation is an evaluation mental process that can be performed by choosing what the splitting enables. At Step 2A prong 2, The additional elements are bolded above. The ‘receiving’ limitation, as claimed and under BRI, is an additional element that is insignificant extra-solution activity. For example, ‘receiving’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed MAC step. The ‘receiving’ limitation, as claimed and under BRI, is an additional element that is insignificant extra-solution activity. For example, ‘receiving’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed MAC step. See MPEP 2106.05(g). The artificial neural network (ANN)systolic array limitation is merely generally linking the mathematical calculations and mental processes to a technology area. See MPEP 2106.05(h). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). At Step 2B, the claim recites “receiving first operand data represented by a 4-bit fixed point”, “ receiving second operand data that are 16 bits wide “, and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity: i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93. Regarding claims 18 and 23, they recite similar language as claim 1 and are rejected for at least the same reasons therein. Herein claims 18 and 23 is directed towards the statutory category of a machine and a method respectively, thus also satisfying step 1. Moreover, Under steps 2A Prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claims 2 and 16, they are directed towards mental processes and/or mathematical calculations. The “wherein the adjusting” limitation is an evaluation mental process that can be performed by choosing what the adjusting comprises. The “assigning 4 bits” limitation is an evaluation mental process and mathematical calculation that can be performed by assigning the exponent bits by hand using pen and paper. The “assigning 11 bits” limitation is an evaluation mental process and mathematical calculation that can be performed by assigning the mantissa bits by hand using pen and paper. Under steps 2A prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claim 4, it is directed towards mental processes and/or mathematical calculations. The “wherein the encoding” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “encoding the exponent based on” limitation is a mathematical calculation that can be performed by encoding the exponent by hand using pen and paper. Under steps 2A prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claim 5, it is directed towards mental processes and/or mathematical calculations. The “wherein the encoding” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “determining a first bit” limitation is a mathematical calculation that can be performed by determining the bit by hand using pen and paper. Under steps 2A prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claim 6, it is directed towards mental processes and/or mathematical calculations. The “wherein the encoding” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “determining a first bit” limitation is a mathematical calculation that can be performed by determining the bit by hand using pen and paper. Under steps 2A prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claim 7, it is directed towards mental processes and/or mathematical calculations. The “wherein the encoding” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “determining a first bit” limitation is a mathematical calculation that can be performed by determining the bit by hand using pen and paper. Under steps 2A prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claim 8, it is directed towards mental processes and/or mathematical calculations. The “wherein the encoding” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “determining a first bit” limitation is a mathematical calculation that can be performed by determining the bit by hand using pen and paper. Under steps 2A prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claims 11 and 19, they are directed towards mental processes and/or mathematical calculations. The “wherein the encoding” limitation is an evaluation mental process that can be performed by choosing what the encoding comprises. The “encoding the second operand data in which the number of bits is adjusted such that the” limitation is a mathematical calculation that can be performed by adjusting the bits by hand using pen and paper. The “encode the second operand data” limitation is a mathematical calculation that can be performed by encoding the second operand data by hand using pen and paper. Under step 2A Prong 2, none of the additional elements regarding the generic computer components (i.e. the processor, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). Under Step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claims 12 and 20, they are directed towards mental processes and/or mathematical calculations. The “wherein the splitting” limitation is an evaluation mental process that can be performed by choosing what the splitting comprises. The “splitting the encoded second data” limitation is a mathematical calculation that can be performed by splitting the data by hand using pen and paper. Under step 2A Prong 2, none of the additional elements regarding the generic computer components (i.e. the processor, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). Under Step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Regarding claims 13 and 21, they are directed towards mental processes and/or mathematical calculations. The “wherein the performing” limitation is an evaluation mental process that can be performed by choosing what the MAC operation comprises. The “performing a multiplication operation” limitation is a mathematical calculation that can be performed by multiplying the bricks by hand using pen and paper. The “ comparing the exponent brick” limitation is a mathematical calculation that can be performed by comparing the exponents by hand using pen and paper. The “accumulating a result” limitation is a mathematical calculation that can be performed by accumulating the result by hand using pen and paper. Under step 2A Prong 2, the “accumulated exponent data stored in an exponent register” limitation, as claimed under BRI, is an additional element that is insignificant extra-solution activity. The ‘stored’ in the context of the claim encompasses mere data gathering. The “stored in each of three mantissa registers” limitation, as claimed under BRI, is an additional element that is insignificant extra-solution activity. The ‘stored’ in the context of the claim encompasses mere data gathering. None of the remaining additional elements regarding the generic computer components (i.e. the processor, the exponent register, the mantissa registers, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. Under Step 2B, the claim recites “accumulated exponent data stored in an exponent register”, “stored in each of three mantissa registers”, and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity: i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092- 93. Regarding claims 14 and 22, they are directed towards mental processes and/or mathematical calculations. The “wherein the accumulating” limitation is an evaluation mental process that can be performed by choosing what the accumulating comprises. The “aligning accumulation positions” limitation is a mathematical calculation that can be performed by aligning the accumulation positions by had using pen and paper. Under step 2A Prong 2, The “stored in each of three mantissa registers” limitation, as claimed under BRI, is an additional element that is insignificant extra-solution activity. The ‘stored’ in the context of the claim encompasses mere data gathering. None of the remaining additional elements regarding the generic computer components (i.e. the processor, the mantissa registers, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. Under Step 2B, the claim recites “stored in each of three mantissa registers”, and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity: i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092- 93. Regarding claims 24 and 25, they are directed towards mental processes and/or mathematical calculations. The “the encoding method” limitation is an evaluation mental process that can be performed by choosing what the encoding method comprises. The “generating a wider exponent range” limitation is a mathematical calculation that can be performed by generating the wider exponent range by hand using pen and paper. The “encoding the exponent” limitation is a mathematical calculation that can be performed by encoding the exponent by hand using pen and paper. Under steps 2A prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception. Allowable Subject Matter Claims 1-2, 4-16, and 18-25 would be allowable if rewritten to overcome the rejections set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. The limitation of encoding the exponent based on the quotient and a bias differentiates the claim from the prior art. The limitations of determining the first bit values of the mantissa based on the remainder differentiates the claims from the prior art. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jakob O Gudas whose telephone number is (571)272-0695. The examiner can normally be reached Monday-Thursday: 7:30AM-5:00PM Friday: 7:30AM-4:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Trujillo can be reached at (571) 272-3677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.O.G./Examiner, Art Unit 2151 /James Trujillo/Supervisory Patent Examiner, Art Unit 2151
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Prosecution Timeline

Aug 13, 2021
Application Filed
Dec 20, 2024
Non-Final Rejection — §101
Mar 25, 2025
Response Filed
May 15, 2025
Non-Final Rejection — §101
Aug 11, 2025
Response Filed
Oct 17, 2025
Final Rejection — §101
Dec 15, 2025
Response after Non-Final Action
Feb 20, 2026
Request for Continued Examination
Mar 04, 2026
Response after Non-Final Action
Apr 01, 2026
Non-Final Rejection — §101 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12602200
ANALOG MULTIPLY-ACCUMULATE UNIT FOR MULTIBIT IN-MEMORY CELL COMPUTING
2y 5m to grant Granted Apr 14, 2026
Patent 12566586
HIGH-SPEED QUANTUM RANDOM NUMBER GENERATOR BASED ON VACUUM STATE FLUCTUATION TECHNOLOGY
2y 5m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 2 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
44%
Grant Probability
99%
With Interview (+71.1%)
4y 2m
Median Time to Grant
High
PTA Risk
Based on 9 resolved cases by this examiner. Grant probability derived from career allow rate.

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