Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This is a final Office action in response to Applicant’s remarks and amendments filed on 06/09/2026. Claims 7 and 10 are amended. Claims 6 and 12 are canceled. Claims 1-5 and 11 remain withdrawn. Claims 7 – 10 are pending in the current Office action.
In light of applicant’s amendment to claim 10, the 35 U.S.C. 112(b) rejection set forth in the previous Office action is withdrawn.
The 35 U.S.C. 101 rejection set forth in the previous Office action is maintained. The indication of allowable subject matter established in the previous Office action is maintained and included below.
Response to Arguments
Applicant's arguments regarding the 35 U.S.C. 101 rejection, filed 06/09/2026, have been fully considered but they are not persuasive. Specifically, applicant argues that, as amended, instead of generally reciting an abstract idea and then reciting to apply it, the claims are now directed to a specific non-generic device that has integrated within both the logic circuity to predict future occurrence of abnormal behavior in a battery and control circuity to operate the battery to prevent predicted abnormal behavior.
The examiner agrees that a battery management system is not an abstract idea; however, the examiner respectfully reminds applicant that the question that is considered under 35 U.S.C. 101 is not whether the claim recites more than just abstract ideas, but whether the claimed invention is directed to an abstract idea without significantly more. As established previously, Claim 7 recites a method essentially comprising receiving information from sensors, comparing the information, and predicting abnormal behavior in the battery based on output signals from logic circuits that {i.e. results of the comparison}, which may all be performed mentally, i.e. a mental process, and so is directed to an abstract idea, which is one of the judicial exceptions; the additional steps involving logic circuits are merely an instruction to apply the abstract idea [See MPEP 2106.05(f)]; and the signal processing of the comparators is recited to be performed by logic circuits, which is a generic computer component and not a particular machine [See MPEP 210.05(g)]. Although the amendment recites the additional logic circuit steps and operations being performed by a battery management system, the amendment, per MPEP 2106.05 I-A does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. Specifically, the examiner directs applicant to section of MPEP 2106.05 I-A which recites:
“Limitations that the courts have found to qualify as "significantly more" when recited in a claim with a judicial exception include: Applying the judicial exception with, or by use of, a particular machine, e.g., a Fourdrinier machine (which is understood in the art to have a specific structure comprising a headbox, a paper-making wire, and a series of rolls) that is arranged in a particular way to optimize the speed of the machine while maintaining quality of the formed paper web, as discussed in Eibel Process Co. v. Minn. & Ont. Paper Co., 261 U.S. 45, 64-65 (1923) (see MPEP § 2106.05(b))”
A battery management system is not understood in the art to have a specific structure and thus does not satisfy the requirement for being a “particular machine”. As such, the claim as amended fails to apply the judicial exception with, or by use of, a particular machine and the limitations “included in the battery management system” and “by the battery management system” do not amount to significantly more.
The examiner further reminds applicant that, per MPEP 2106.05, “mere physicality or tangibility of an additional element or elements is not a relevant consideration in Step 2B. As the Supreme Court explained in Alice Corp., mere physical or tangible implementation of an exception is not in itself an inventive concept and does not guarantee eligibility”. Without the claim specifying definitely as to what is considered “future occurrence of abnormal behavior” and what particular operations are controlled to prevent the future occurrence of the abnormal behavior, claim 7, as a whole, is still directed to an abstract idea and the rejection of the claims 7 – 10 under 35 U.S.C. 101 is maintained.
Claim Rejections - 35 USC § 101
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 7 – 10 are rejected under the claimed invention is directed to an abstract idea without significantly more.
Claim 7 recites receiving information that indicates a first, second, and third voltage from a temperature sensor, pressure sensor, and gas sensor, respectively; comparing the voltages with threshold voltages; and predicting future occurrence of abnormal behavior based on output signals from logic circuits that collect and process signals received from the comparators {i.e. the results of the comparison}.
The step of receiving information from a temperature sensor, pressure sensor, and gas sensor does not appear to be actually measuring temperature, pressure or gas concentration, but rather communicating this information. Under broadest reasonable interpretation, such a step may be done mentally, or with a pencil and paper, and thus, the step of receiving information from various sensors is a metal process and therefore and abstract idea. The step of comparing an obtained voltage value with a threshold value, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components. That is, other than reciting “by a first/second/third comparator”, nothing in the claim element precludes the step from being performed in the mind. For example, but for the “by a first/second/third comparator” language “outputting” in the context of this claim encompasses the user determining whether the obtained voltage is higher or lower than the threshold voltage. Similarly , the limitation of predicting future occurrence of abnormal behavior in the battery, as drafted, is a process that covers the performance of the limitation in the mind but for the recitation of generic computer components. For example, but for the “comparator outputting” language, “predicting” in the context of this claim encompasses the user manually considering, based on comparison results, the possibility of an occurrence of abnormal behavior. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas [See MPEP 2106.04(a)(2)]. Accordingly, claim 7 recites an abstract idea.
This judicial exception is not integrated into a practical application. In particular, the claim recites, after the comparisons are done, outputting a high level or low level signal which is not a particular practical application because it is not unique to batteries, but rather is like an alarm [See Parker v. Flook, 437 U.S. 584, 198 USPQ 193 (1978)]. Furthermore, the comparing and outputting is recited to be performed by a comparator, which is a generic computer component and not a particular machine [See MPEP 210.05(g)]. Accordingly, the comparator does not integrate the abstract idea into practical application because it does not impose any meaningful limits on practicing the abstract idea. Additionally, even if the step of receiving information by the sensors is interpreted to require collecting measurements, such a step is mere data gathering and does not provide a particular application [See MPEP 2016.05(g).
The steps of receiving and outputting signals by logic circuits also do not integrate the abstract idea into practical application because it does not impose any meaningful limits on practicing the abstract. Specifically, logic circuits are a generic computer component and not a particular machine [See MPEP 210.05(g)]. Accordingly, the logic circuit do not integrate the abstract idea into practical application because it does not impose any meaningful limits on practicing the abstract idea.
Furthermore, although the claim recites an additional step of controlling operation of the battery, the amendment is merely an instruction to apply the abstract idea and thus fail to integrate the judicial exception into a practical application (See MPEP 2106.05(f)). Additionally, this process step appears to be merely a well-understood, routine and conventional generic computer activity which do not amount to significantly more than the judicial exception (See MPEP 2106.05(d)).
Therefore, Claim 7 does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of outputting high level or low level signals, using a comparator to compare voltage values and output signals, using logic circuits to receive and output signals, and controlling operation of a battery amount to no more than mere instructions to apply the exception and so cannot provide an inventive concept. The claim is not patent eligible.
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
Claim 7, if amended to overcome the current 35 U.S.C. 101 rejection without introducing any other objectionable or rejectable content, would be allowable for requiring the method steps of: receiving, by a first logic circuit, the outputs from the first comparator and the second comparator; receiving, by a second logic circuit, the outputs from the first comparator and the third comparator; outputting, by the first logic circuit, a high level signal when (i) the output received from the first comparator is the high level signal, and (ii) the output received from the second comparator changes from the high level signal to the low level signal; outputting, by the second logic circuit, a high level signal when (i) the output received from the first comparator is the high level signal, and (ii) the output received from the third comparator is the high level signal; receiving, by a third logic circuit, the outputs of the first logic circuit and the second logic circuit; outputting, by the third logic circuit, a high level signal when (i) the output received from the first logic circuit is the high level signal, or (ii) the output received from the second logic circuit is the high level signal; and predicting future occurrence of the abnormal behavior in the battery based on the output of the third logic circuit being the high level signal.
Specifically, as established in the previous Office action, Lee (US7514903B2, US PG Pub. 2006/0076926 A1 used for citation purposes) , as evidenced by Analog Devices (Analog Devices Glossary of EE terms “Comparator”, cited in previous Office action mailed 12/03/2024) and in view of Matsumura (US PG Pub. 2011/0077881 A1), Gong (CN107482271A), and LePort (US9083064B2, US PG Pub. 2013/0260192 A1 used for citation purposes) discloses/renders obvious the claimed steps of receiving information from a temperature sensor, pressure sensor, and gas sensor; comparing data from the sensors through a first, second, and third comparator, generating high/low signals from the comparators, and controlling operation of the battery to prevent predicted future occurrence of the abnormal behavior in the battery (Refer to rejection of claim 7 in previous Office action mailed 05/30/2025).
None of the cited prior art above appear to explicitly disclose/suggest; however, a particular arrangement of circuity to process the parameters or the particular circuity of claim 7 to achieve determination/prediction of future occurrence of abnormal battery behavior.
Lee teaches sending the signals of a comparator(s) that collects and compares data of a pressure sensor and/temperature sensors to an amplifying section 24 which amplifies the outputs of the comparator and outputs the amplified signal to an alarm unit ([0070];[0075 – 0077]). As such, Lee does not appear to require a logic circuits(s) to receive outputs from comparators to determine occurrence of abnormal behavior, rather it appears that the outputs of one alone is enough to determine a need for an alarm.
Gong teaches comparing measured temperature values and oxygen concentration values to preset values to determine if a thermal runaway alarm is necessary and teaches doing so through a main control module ([0023 – 0025];[0034 – 0036]), and thus also does not appear to teach/require a logic circuits(s) to receive outputs and determine/predict occurrence of abnormal behavior.
Matsumura, which is particularly directed to a method that predicts occurrence of abnormal battery behavior, teaches measuring and comparing voltage values of the batteries to a threshold value ([0046 – 0049]). Matsumura further teaches using a singular state determination portion 133 which functions like the claimed comparator (i.e. comparing measured data to a threshold value) to determine which cell in the battery system is in a state that is different from those of other secondary batteries ([0049]). As such, Matsumura also does not appear to require a logic circuits(s) to receive outputs from a comparator to predict occurrence of abnormal behavior.
LePort teaches a battery pack pressure monitoring system for thermal event detection and a method involving essentially monitoring the pressure of the battery pack, sending the data to a system controller when a pressure anomaly is detected, and fitting the pressure data to a curve to determine occurrence of a thermal event (Fig. 3 – 6; [0028]). As such, like above prior art, LePort does not appear to suggest/teach the use of logic circuits in the manner taught/disclosed by the applicant to determine/predict the occurrence of abnormal battery behavior.
Additional prior art found to relate to the prediction of abnormal battery behavior and particularly the claimed method include: Pan (CN110398699A) and Zhang (CN110828915A) {Examiner Note: both Pan and Zhang were cited in previous Office action mailed 03/12/2026}.
Pan teaches a method for early warning of thermal runaway in power batteries using multi-sensor information and the thermal runaway parameters in Pan include the voltage, temperature, and gas concentration and pressure of combustible gas in the battery module ([0009 – 0010]). The method includes steps of collecting voltage, temperature, pressure, and gas concentration of the batteries, obtaining the average and minimum of the measured values, comparing the values to a reference range, obtaining fault bit values based on the comparisons, and determining if, based on the sum of the fault bit values, a warning of thermal runaway is necessary ([0051 – 0059]). Pan does not particularly disclose the use of a logic circuit and further teaches a method dependent on the signals of all the measured parameters, and thus, also does not teach/suggest the claimed logic circuits(s) configuration to determine/predict occurrence of abnormal behavior.
Zhang also teaches an early warning method for abnormal battery behavior using multiple parameters including temperature, air pressure, gas concentration, and clamping force ([0008 – 0011]). The method in Zhang determines alarm level by comparing each measured parameter to a preset value, and if one parameter is judged not meet the alarm level/not higher than current alarm level, the process of collecting and judging the next parameter occurs ([0058]). As such, Zhang teaches method that does not appears to require/disclose the use of a logic circuit to determine if alarm is necessary, rather Zhang appears to only require a comparator/comparison of the data of one or more parameters individually to determine if an alarm is necessary.
Additional prior art found to pertain to logic circuits and methods for predicting/determining the occurrence of abnormal behavior of a battery include: Wang (US PG Pub. 2021/0111443 A1, foreign priority date of 04/30/2019, Kwon (KR20190037794A, Machine translation provided), and Kuki (JP2013078261A, Machine translation provided).
Wang teaches a system for detecting thermal runaway and further teaches the method of the system including a step of obtaining a logical signal output from the air pressure sensor located in the battery pack when a BMU of the battery pack is in a sleeping state and the logical signal is a logic gate circuit (Fig. 5; [0010];[0034 – 0035];[0092 – 0094]). A high level logic signal is taught by Wang to cause the BMU to awaken and determine if the air pressure sensor is in an air pressure alarm state and thermal runaway is occurring ([0097 – 0098]). As such, Wang at least suggests that logic circuits can be used to generate high signals that indicate the occurrence of thermal runaway based on at least pressure measurements, but does not teach using more than one logic circuit to determine if thermal runway is/will occur based on multiple measured parameters, and thus does not appear to teach/suggest a logic circuit configuration that corresponds to the claimed configuration.
Kwon, directed toward battery management systems, teaches a voltage protection circuit including first and second voltage meters, first and second comparators, and a NAND logic circuit ([0032 – 0033]). The logic circuit in Kwon is taught to perform a NAND operation on the outputs of the comparators and the relay, which turns on when an abnormality in the voltage is determined, is activated depending on the output of the logic circuit ([0036 – 0042]). As such Kwon at least suggests using one logic circuit in conjunction two comparators in a battery system for the purpose of activating a controlling operation in response to an abnormality of the battery system. However, because Known appears to teach that only one logic circuit is necessary to generate a signal indicating that a controlling operation is needed, Known does not appear to teach/suggest a logic circuit configuration that corresponds to the claimed configuration.
Kuki, also directed toward battery management system teaches using more than one logic circuit, and further teaches a logic circuit structure in which one logical sum circuit 48 is provided to generate a logical sum signal of the output signals of the logical product circuits 42 and 46 (Fig. 2; [0001];[0010];[0029 – 0030]). The logical circuits function to allow for selective discharge of cells with higher voltages based on a comparison between the voltage division values of the resistors 31 to 34 and the corresponding positive electrode potentials, without detecting the absolute values of the voltages of the battery cells Ci1 to Ci4 within the block (Fig. 2; [0031 – 0032]). However, while Kuki does teach using more than one logic circuit together, the logic circuits of Kuki do not function to produce a signal for the prediction if an abnormality based on signals from comparisons of multiple different parameters; thus Kuki does not appear to teach/suggest a logic circuit configuration that corresponds to the claimed configuration.
Therefore, because of none of the cited prior art above teaches/suggests using logic circuity in the manner as claimed, and because none of the cited prior art particularly pertaining to predicting/detecting battery abnormalities appear to require such circuity to achieve predicting abnormal battery behavior, one with ordinary skill in the art would not have found it obvious/be motivated to include the claimed logic circuity in the systems taught above, and thus obtain the claimed method, for purpose of ensuring reliable prediction of thermal runaway/abnormal battery behavior as claimed and disclosed by the applicant (See Instant Specification: pg. 15, lines 5 – 8 and pg. 16, lines 1 – 19).
Claims 8 – 9 would be allowable due to their dependency on Claim 7. Claim 10 would be allowable due to its dependency on claim 7 and if amended to properly overcome the 112b rejection of record.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARYANA Y ORTIZ whose telephone number is (571)270-5986. The examiner can normally be reached M-F 7:00 AM - 5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jonathan Leong can be reached at (571) 270-1292. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/A.Y.O./Examiner, Art Unit 1751
/JONATHAN G LEONG/Supervisory Patent Examiner, Art Unit 1751 7/26/2026