Prosecution Insights
Last updated: April 19, 2026
Application No. 17/426,495

Apparatus and Method for Battery Abnormal Condition Prediction, and Battery Management System Providing the Same Method

Non-Final OA §101§112
Filed
Jul 28, 2021
Examiner
ORTIZ, ARYANA YASMINE
Art Unit
1751
Tech Center
1700 — Chemical & Materials Engineering
Assignee
LG Energy Solution, Ltd.
OA Round
3 (Non-Final)
47%
Grant Probability
Moderate
3-4
OA Rounds
3y 3m
To Grant
68%
With Interview

Examiner Intelligence

Grants 47% of resolved cases
47%
Career Allow Rate
21 granted / 45 resolved
-18.3% vs TC avg
Strong +21% interview lift
Without
With
+21.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
63 currently pending
Career history
108
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
68.1%
+28.1% vs TC avg
§102
15.1%
-24.9% vs TC avg
§112
12.3%
-27.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 45 resolved cases

Office Action

§101 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/28/2025 has been entered. Response to Amendment This is a non-final Office action in response to Applicant’s remarks and amendments filed on 08/28/2025. Claims 2 and 7 are amended. Claims 1 – 5 and 11 – 12 remain withdrawn. Claims 7 – 10 are pending in the current Office action. The 35 U.S.C. 101 rejection set forth in the previous Office action is maintained. The 35 U.S.C. 103 rejections set forth in the previous Office action are withdrawn. An indication of allowable subject matter is established below with respect to independent claim 7. Response to Arguments Applicant's arguments regarding the 35 U.S.C. 101 rejection, filed 08/28/2028 , have been fully considered but they are not persuasive. Applicant argues that amended claim 7 as a whole is directed to a circuit and its particular arrangement and interconnection of specific circuit components, and thus does not amount to a mental process. The examiner agrees that the claimed circuity is not an abstract idea; however, the examiner respectfully reminds applicant that the question that is considered under 35 U.S.C. 101 is not whether the claim recites more than just abstract ideas, but whether the claimed invention is directed to an abstract idea without significantly more. As discussed further below in the 35 U.S.C. 101 rejection section, Claim 7 recites a method essentially comprising receiving information from sensors, comparing the information, and predicting abnormal behavior in the batter based on output signals from logic circuits that {i.e. results of the comparison}, which may all be performed mentally, i.e. a mental process, and so is directed to an abstract idea, which is one of the judicial exceptions. Although the claim as amended recites the additional steps of logic circuits, the amendment is merely an instruction to apply the abstract idea [See MPEP 2106.05(f)]. Furthermore the signal processing of the comparators is recited to be performed by logic circuits, which is a generic computer component and not a particular machine [See MPEP 210.05(g)]. Accordingly, the logic circuits do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. Without the claim specifying definitely as to what is considered “future occurrence of abnormal behavior” and what particular operations are controlled to prevent the future occurrence of the abnormal behavior, claim 7, as a whole, is still directed to an abstract idea and the rejection of the claims 7 – 10 under 35 U.S.C. 101 is maintained. Applicant’s arguments with respect to claim(s) 7 have been considered but are moot in light of the indication of allowable subject matter. Claim Rejections - 35 USC § 101 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 7 – 10 are rejected under the claimed invention is directed to an abstract idea without significantly more. Claim 7 recites receiving information that indicates a first, second, and third voltage from a temperature sensor, pressure sensor, and gas sensor, respectively; comparing the voltages with threshold voltages; and predicting future occurrence of abnormal behavior based on output signals from logic circuits that collect and process signals received from the comparators {i.e. the results of the comparison}. The step of receiving information from a temperature sensor, pressure sensor, and gas sensor does not appear to be actually measuring temperature, pressure or gas concentration, but rather communicating this information. Under broadest reasonable interpretation, such a step may be done mentally, or with a pencil and paper, and thus, the step of receiving information from various sensors is a metal process and therefore and abstract idea. The step of comparing an obtained voltage value with a threshold value, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components. That is, other than reciting “by a first/second/third comparator”, nothing in the claim element precludes the step from being performed in the mind. For example, but for the “by a first/second/third comparator” language “outputting” in the context of this claim encompasses the user determining whether the obtained voltage is higher or lower than the threshold voltage. Similarly , the limitation of predicting future occurrence of abnormal behavior in the battery, as drafted, is a process that covers the performance of the limitation in the mind but for the recitation of generic computer components. For example, but for the “comparator outputting” language, “predicting” in the context of this claim encompasses the user manually considering, based on comparison results, the possibility of an occurrence of abnormal behavior. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas [See MPEP 2106.04(a)(2)]. Accordingly, claim 7 recites an abstract idea. This judicial exception is not integrated into a practical application. In particular, the claim recites, after the comparisons are done, outputting a high level or low level signal which is not a particular practical application because it is not unique to batteries, but rather is like an alarm [See Parker v. Flook, 437 U.S. 584, 198 USPQ 193 (1978)]. Furthermore, the comparing and outputting is recited to be performed by a comparator, which is a generic computer component and not a particular machine [See MPEP 210.05(g)]. Accordingly, the comparator does not integrate the abstract idea into practical application because it does not impose any meaningful limits on practicing the abstract idea. Additionally, even if the step of receiving information by the sensors is interpreted to require collecting measurements, such a step is mere data gathering and does not provide a particular application [See MPEP 2016.05(g). The steps of receiving and outputting signals by logic circuits also do not integrate the abstract idea into practical application because it does not impose any meaningful limits on practicing the abstract. Specifically, logic circuits are a generic computer component and not a particular machine [See MPEP 210.05(g)]. Accordingly, the logic circuit do not integrate the abstract idea into practical application because it does not impose any meaningful limits on practicing the abstract idea. Furthermore, although the claim recites an additional step of controlling operation of the battery, the amendment is merely an instruction to apply the abstract idea and thus fail to integrate the judicial exception into a practical application (See MPEP 2106.05(f)). Additionally, this process step appears to be merely a well-understood, routine and conventional generic computer activity which do not amount to significantly more than the judicial exception (See MPEP 2106.05(d)). Therefore, Claim 7 does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of outputting high level or low level signals, using a comparator to compare voltage values and output signals, using logic circuits to receive and output signals, and controlling operation of a battery amount to no more than mere instructions to apply the exception and so cannot provide an inventive concept. The claim is not patent eligible. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding Claim 10, it is unclear what structure performs the determination step to predict electrolyte solution leakage, because, claim 7, by reciting “predicting future occurrence of abnormal behavior in the battery based on the output of the third logic circuit being the high level signal” appears to limit the abnormal behavior in the battery to thermal runaway, that is in instant specification (Refer to pg. 15, lines 9 – 24; pg. 17, lines 3 – 7 and lines 11 – 16), a high level signal from the third logic circuit is explicitly taught to indicates the occurrence of thermal runaway. Therefore, because independent claim 7 already establishes the abnormal behavior to be thermal runaway, it is unclear how the abnormal behavior can also include electrolyte solution leakage and how such additional abnormal behavior can be determined from the method established in claim 7. For the purpose of this Office action, the examiner is interpreting claim to recite –The method for predicting the abnormal behavior of the battery of claim 7, further comprising receiving the output of the third comparator and determining occurrence of the abnormal behavior, wherein the abnormal behavior includes an electrolyte solution leakage of the battery based on the third comparator outputting the high level signal—. This interpretation appears to be supported by Figure 1 and pg. 17, lines 17 – 24 and pg. 18, line 1 of the instant specification. Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: Claim 7, if amended to overcome the current 35 U.S.C. 101 rejection, would be allowable for requiring the method steps of: receiving, by a first logic circuit, the outputs from the first comparator and the second comparator; receiving, by a second logic circuit, the outputs from the first comparator and the third comparator; outputting, by the first logic circuit, a high level signal when (i) the output received from the first comparator is the high level signal, and (ii) the output received from the second comparator changes from the high level signal to the low level signal; outputting, by the second logic circuit, a high level signal when (i) the output received from the first comparator is the high level signal, and (ii) the output received from the third comparator is the high level signal; receiving, by a third logic circuit, the outputs of the first logic circuit and the second logic circuit; outputting, by the third logic circuit, a high level signal when (i) the output received from the first logic circuit is the high level signal, or (ii) the output received from the second logic circuit is the high level signal; and predicting future occurrence of the abnormal behavior in the battery based on the output of the third logic circuit being the high level signal. Specifically, as established in the previous Office action, Lee (US7514903B2, US PG Pub. 2006/0076926 A1 used for citation purposes) , as evidenced by Analog Devices (Analog Devices Glossary of EE terms “Comparator”, cited in previous Office action mailed 12/03/2024) and in view of Matsumura (US PG Pub. 2011/0077881 A1), Gong (CN107482271A), and LePort (US9083064B2, US PG Pub. 2013/0260192 A1 used for citation purposes) discloses/renders obvious the claimed steps of receiving information from a temperature sensor, pressure sensor, and gas sensor; comparing data from the sensors through a first, second, and third comparator, generating high/low signals from the comparators, and controlling operation of the battery to prevent predicted future occurrence of the abnormal behavior in the battery (Refer to rejection of claim 7 in previous Office action mailed 05/30/2025). None of the cited prior art above appear to explicitly disclose/suggest; however, a particular arrangement of circuity to process the parameters or the particular circuity of claim 7 to achieve determination/prediction of future occurrence of abnormal battery behavior. Lee teaches sending the signals of a comparator(s) that collects and compares data of a pressure sensor and/temperature sensors to an amplifying section 24 which amplifies the outputs of the comparator and outputs the amplified signal to an alarm unit ([0070];[0075 – 0077]). As such, Lee does not appear to require a logic circuits(s) to receive outputs from comparators to determine occurrence of abnormal behavior, rather it appears that the outputs of one alone is enough to determine a need for an alarm. Gong teaches comparing measured temperature values and oxygen concentration values to preset values to determine if a thermal runaway alarm is necessary and teaches doing so through a main control module ([0023 – 0025];[0034 – 0036]), and thus also does not appear to teach/require a logic circuits(s) to receive outputs and determine/predict occurrence of abnormal behavior. Matsumura, which is particularly directed to a method that predicts occurrence of abnormal battery behavior, teaches measuring and comparing voltage values of the batteries to a threshold value ([0046 – 0049]). Matsumura further teaches using a singular state determination portion 133 which functions like the claimed comparator (i.e. comparing measured data to a threshold value) to determine which cell in the battery system is in a state that is different from those of other secondary batteries ([0049]). As such, Matsumura also does not appear to require a logic circuits(s) to receive outputs from a comparator to predict occurrence of abnormal behavior. LePort teaches a battery pack pressure monitoring system for thermal event detection and a method involving essentially monitoring the pressure of the battery pack, sending the data to a system controller when a pressure anomaly is detected, and fitting the pressure data to a curve to determine occurrence of a thermal event (Fig. 3 – 6; [0028]). As such, like above prior art, LePort does not appear to suggest/teach the use of logic circuits in the manner taught/disclosed by the applicant to determine/predict the occurrence of abnormal battery behavior. Additional prior art found to relate to the prediction of abnormal battery behavior and particularly the claimed method include: Pan (CN110398699A, cited in 07/06/2023 IDS – Machine translation provided) and Zhang (CN110828915A, cited in 02/22/2024 IDS – Machine translation provided). Pan teaches a method for early warning of thermal runaway in power batteries using multi-sensor information and the thermal runaway parameters in Pan include the voltage, temperature, and gas concentration and pressure of combustible gas in the battery module ([0009 – 0010]). The method includes steps of collecting voltage, temperature, pressure, and gas concentration of the batteries, obtaining the average and minimum of the measured values, comparing the values to a reference range, obtaining fault bit values based on the comparisons, and determining if, based on the sum of the fault bit values, a warning of thermal runaway is necessary ([0051 – 0059]). Pan does not particularly disclose the use of a logic circuit and further teaches a method dependent on the signals of all the measured parameters, and thus, also does not teach/suggest the claimed logic circuits(s) configuration to determine/predict occurrence of abnormal behavior. Zhang also teaches an early warning method for abnormal battery behavior using multiple parameters including temperature, air pressure, gas concentration, and clamping force ([0008 – 0011]). The method in Zhang determines alarm level by comparing each measured parameter to a preset value, and if one parameter is judged not meet the alarm level/not higher than current alarm level, the process of collecting and judging the next parameter occurs ([0058]). As such, Zhang teaches method that does not appears to require/disclose the use of a logic circuit to determine if alarm is necessary, rather Zhang appears to only require a comparator/comparison of the data of one or more parameters individually to determine if an alarm is necessary. Additional prior art found to pertain to logic circuits and methods for predicting/determining the occurrence of abnormal behavior of a battery include: Wang (US PG Pub. 2021/0111443 A1, foreign priority date of 04/30/2019, Kwon (KR20190037794A, Machine translation provided), and Kuki (JP2013078261A, Machine translation provided). Wang teaches a system for detecting thermal runaway and further teaches the method of the system including a step of obtaining a logical signal output from the air pressure sensor located in the battery pack when a BMU of the battery pack is in a sleeping state and the logical signal is a logic gate circuit (Fig. 5; [0010];[0034 – 0035];[0092 – 0094]). A high level logic signal is taught by Wang to cause the BMU to awaken and determine if the air pressure sensor is in an air pressure alarm state and thermal runaway is occurring ([0097 – 0098]). As such, Wang at least suggests that logic circuits can be used to generate high signals that indicate the occurrence of thermal runaway based on at least pressure measurements, but does not teach using more than one logic circuit to determine if thermal runway is/will occur based on multiple measured parameters, and thus does not appear to teach/suggest a logic circuit configuration that corresponds to the claimed configuration. Kwon, directed toward battery management systems, teaches a voltage protection circuit including first and second voltage meters, first and second comparators, and a NAND logic circuit ([0032 – 0033]). The logic circuit in Kwon is taught to perform a NAND operation on the outputs of the comparators and the relay, which turns on when an abnormality in the voltage is determined, is activated depending on the output of the logic circuit ([0036 – 0042]). As such Kwon at least suggests using one logic circuit in conjunction two comparators in a battery system for the purpose of activating a controlling operation in response to an abnormality of the battery system. However, because Known appears to teach that only one logic circuit is necessary to generate a signal indicating that a controlling operation is needed, Known does not appear to teach/suggest a logic circuit configuration that corresponds to the claimed configuration. Kuki, also directed toward battery management system teaches using more than one logic circuit, and further teaches a logic circuit structure in which one logical sum circuit 48 is provided to generate a logical sum signal of the output signals of the logical product circuits 42 and 46 (Fig. 2; [0001];[0010];[0029 – 0030]). The logical circuits function to allow for selective discharge of cells with higher voltages based on a comparison between the voltage division values of the resistors 31 to 34 and the corresponding positive electrode potentials, without detecting the absolute values of the voltages of the battery cells Ci1 to Ci4 within the block (Fig. 2; [0031 – 0032]). However, while Kuki does teach using more than one logic circuit together, the logic circuits of Kuki do not function to produce a signal for the prediction if an abnormality based on signals from comparisons of multiple different parameters; thus Kuki does not appear to teach/suggest a logic circuit configuration that corresponds to the claimed configuration. Therefore, because of none of the cited prior art above teaches/suggests using logic circuity in the manner as claimed, and because none of the cited prior art particularly pertaining to predicting/detecting battery abnormalities appear to require such circuity to achieve predicting abnormal battery behavior, one with ordinary skill in the art would not have found it obvious/be motivated to include the claimed logic circuity in the systems taught above, and thus obtain the claimed method, for purpose of ensuring reliable prediction of thermal runaway/abnormal battery behavior as claimed and disclosed by the applicant (See Instant Specification: pg. 15, lines 5 – 8 and pg. 16, lines 1 – 19). Claims 8 – 9 would be allowable due to their dependency on Claim 7. Claim 10 would be allowable due to its dependency on claim 7 and if amended to properly overcome the 112b rejection of record. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARYANA Y ORTIZ whose telephone number is (571)270-5986. The examiner can normally be reached M-F 7:00 AM - 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jonathan Leong can be reached at (571) 270-1292. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.Y.O./Examiner, Art Unit 1751 /JONATHAN G LEONG/Supervisory Patent Examiner, Art Unit 1751 3/10/2026
Read full office action

Prosecution Timeline

Jul 28, 2021
Application Filed
Nov 27, 2024
Non-Final Rejection — §101, §112
Feb 26, 2025
Response Filed
May 28, 2025
Final Rejection — §101, §112
Aug 28, 2025
Request for Continued Examination
Sep 02, 2025
Response after Non-Final Action
Mar 10, 2026
Non-Final Rejection — §101, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
47%
Grant Probability
68%
With Interview (+21.0%)
3y 3m
Median Time to Grant
High
PTA Risk
Based on 45 resolved cases by this examiner. Grant probability derived from career allow rate.

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