Detailed Action
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is non-final and is in response to claims filed on 01/23/2026 via amendment. Claims 1, 3, 5-12 and 15-24 are pending for examination. Claims 1, 3, 5-12, and 15-20 are currently amended. Claims 21-24 are newly presented.
Response to Arguments
Rejections under 35 U.S.C. 112(b)
Applicant has amended the claim at issue, and, therefore, the previous rejection is withdrawn.
Rejections under 35 U.S.C. 101
Applicant’s arguments regarding the 35 U.S.C. 101 rejections have been fully considered. Regarding the rejection under 35 U.S.C. 101, Applicant argues “independent claim 1 requires a specific machine architecture and machine-executed operations-none of which are mental steps”. See Remarks 15 filed 01/23/2026.
Examiner respectfully disagrees with Applicant’s arguments. Merely adding general computing components is a clear “apply it” scenario using generic computer components. MPEP 2106.05(f). The processor, registers, execution unit, etc. do not denote any specific structure and is merely a generic circuit component performing the abstract ideas (subtracting the first and second numbers, determining if the difference is less than or equal to a threshold, identifying entries in a look-up table, determining the result, etc.).
Applicant further argues “Claim 1 requires the execution unit, "in response to the logarithmic addition opcode," to perform a sequence of hardware operations: a) "retrieve the first number from the first source specified in the logarithmic addition instruction;" b) "retrieve the second number from the second source specified in the logarithmic addition instruction;" c) "subtract the first number from the second number to determine a difference;" d) Conditional hardware table access: "if the determined difference is less than or equal to a predetermined threshold number, retrieve, from a logarithmic addition look-up table, a third number mapped to the determined difference, and add the third number to the first number to determine a resulting number;" e) Hardware max selection: "if the determined difference is greater than the predetermined threshold number, determine the resulting number to be the greatest of the first number and the second number;" f) "store the resulting number in the destination register specified in the logarithmic addition instruction." These claimed limitations cannot reasonably be performed in the human mind”.
Examiner respectfully disagrees with Applicant’s arguments. Points c-e are clearly mental processes and mathematical relationships that can be performed in one’s mind with the aid of pen and paper. The remaining limitations are clearly additional elements that are insignificant extra-solution activities and well-understood, routine, and conventional functions.
Further, merely adding general computing components is a clear “apply it” scenario using generic computer components. MPEP 2106.05(f). The processor, registers, execution unit, etc. do not denote any specific structure and is merely a generic circuit component performing the abstract ideas (subtracting the first and second numbers, determining if the difference is less than or equal to a threshold, identifying entries in a look-up table, determining the result, etc.).
Applicant further argues “The independent claims set forth an instruction-set-defined arithmetic framework executed by a specific processor architecture that uses register structures, a bias register, operand registers, and LUT storage to achieve efficient logarithmic arithmetic with defined overflow/underflow handling and square-root optimization. This is a concrete technological improvement to the processor's functioning that satisfies Step 2A, Prong Two”. See Remarks 19.
Examiner respectfully disagrees with Applicant’s arguments. As discussed above merely adding general computing components is a clear “apply it” scenario using generic computer components. MPEP 2106.05(f). As well as generally linking the use of the judicial exception to a particular technology environment. The present application is similar to Gottschalk v. Benson (See MPEP 2106), which “held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle’.
Further, it is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements. See the discussion of Diamond v. Diehr, 450 U.S. 175, 187 and 191-92, 209 USPQ 1, 10 (1981)) in subsection II, below. In addition, the improvement can be provided by the additional element(s) in combination with the recited judicial exception... However, it is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology...”. See MPEP 2106.05(a).
If Applicant can point to specific improvements recited in the specification and tie those improvements to specific hardware of the claim, that would help overcome the rejections under 35 U.S.C. 101.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, 3, 5-12 and 15-24 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract ideas without significantly more.
With regards to claim 1, at Step 1, the claim is directed to a machine, which is a statutory category of invention.
At Step 2A Prong 1, examiner notes that the claim is directed to mental processes and mathematical calculations. The claim language has been reproduced below:
A processor architecture comprising:
a plurality of registers, including:
a bias register for holding a bias; and
a plurality of operand registers each for holding a respective number, V, which together with the bias represents a respective value in a logarithmic number system as V =+/-bz-B, where z is an integer exponent and b is a base number (Mental process, evaluation); and
one or more registers that hold a pre-configured logarithmic addition look-up table, the pre-configured logarithmic addition look-up table comprising a plurality of entries, each entry comprising a respective target difference, y-x, (mental process, evaluation; mathematical relationship) mapped to a respective third number, (mental process, evaluation) each respective third number is equal to the value of 1 + bY-X rounded to the nearest value of bi, (mathematical calculation) and i being an integer, (mathematical concept) and
an execution unit configured to execute machine code instructions, each instruction being an instance of a predefined set of instruction types in an instruction set of the processor (mental process, evaluation), wherein the instruction set includes a logarithmic addition instruction defined by a corresponding opcode (mental process, evaluation), a first source operand field taking a first source operand specifying a first source holding a first number (mental process, observation), a second source operand field taking a second source operand specifying a second source holding a second number (mental process, observation), and a destination field taking a destination operand specifying one of said operand registers as a destination register (mental process, observation);
wherein the execution unit is configured to, in response to the logarithmic addition opcode:
retrieve the first number from the first source specified in the logarithmic addition instruction;
retrieve the second number from the second source specified in the logarithmic addition instruction;
subtract the first number from the second number to determine a difference, y-x (Mathematical calculation); and
if the determined difference is less than or equal to a predetermined threshold number, identify a respective entry in the logarithm addition look-up table that comprises a respective target difference corresponding to the determined difference, (mental process, evaluation; mathematical relationship) retrieve, from the one or more registers holding the pre-configured logarithmic addition look-up table, the third number mapped to the determined difference, (mental process, evaluation; mathematical relationship) and add the third number to the first number to determine a resulting number; and (mathematical calculation)
if the determined difference is greater than the predetermined threshold number, determine the resulting number to be the greatest of the first number and the second number (mental process, evaluation; mathematical relationship); and
store the resulting number in the destination register specified in the logarithmic addition instruction.
Each of the nonbolded limitations are mental processes and/or mathematical calculations. The “represents a respective value in a logarithmic number system” limitation is an evaluation mental process, that can be done by someone merely choosing a way to represent a number. The “the pre-configured logarithmic addition look-up table comprising” limitation is an evaluation mental process and mathematical concept that can be performed by creating a table using pen and paper. The “mapped to a respective third number” limitation is an evaluation mental process that can be performed by making another column in that table and writing down a third number mapped to the first. The “each respective third number is equal to” limitation is a mathematical calculation that can be performed by pen and paper, the equation 1 + by-x, and rounding bi to the nearest entry in the table. The “i being an integer” limitation is a mathematical concept that can be performed by rounding i to the nearest number using pen and paper. The “each instruction being an instance” limitation is an evaluation mental process, that can be performed by one choosing a set of instructions for one to calculate by hand. The “wherein the instruction set includes a logarithmic addition instruction limitation” is an evaluation mental process that can be performed by one choosing the types of instructions present and giving them a corresponding opcode. The “a first source operand field” limitation is an observation mental process that can be performed by one choosing a first operand to perform calculations with. The “a second source operand” limitation is an observation mental process that can be performed by one choosing a second operand to perform calculations with. The “and a destination field” limitation is an observation mental process that can be performed by one choosing where to store their calculations. The “subtract the first number” limitation is a mathematical concept that can be performed by one subtracting two numbers using a pen and paper. The “if the determined difference is less than or equal to a predetermined threshold number, identify a respective entry” limitation is an evaluation mental process and mathematical relationship that can be performed by one looking at the look-up table to identify a respective entry. The “the third number mapped to the determined difference” limitation is an evaluation mental process that can be performed by choosing what the third number is mapped to. The “add the third number to the first number” limitation is a mathematical calculation that can be performed by adding the first and third number by hand using pen and paper. The “if the determined difference is greater than” limitation is an evaluation mental process and mathematical concept that can be performed by one choosing the larger of two numbers.
At Step 2A Prong 2, the additional elements are bolded above. The “one or more registers that hold” limitation, as claimed under BRI, is an additional elements that is an insignificant extra-solution activity. For example, ‘hold’ in the context of this claim encompasses mere data gathering. The “retrieve the first number” and “retrieve the second number” limitations, as claimed under BRI, are additional elements that are insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed subtracting step. The “retrieve, from the one or more registers holding” limitation, as claimed under BRI, is an additional elements that is an insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering. The “store” limitation, as claimed under BRI, is an additional element that is insignificant extra-solution activity. For example, “store” in the context of this claim encompasses mere data gathering. See MPEP 2106.05(g). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
At Step 2B, the claim recites “one or more registers that hold a pre-configured logarithmic addition look-up table”, “retrieve the first number from the first source specified in the logarithmic addition instruction,” “retrieve the second number from the second source specified in the logarithmic addition instruction,” “retrieve, from the one or more registers holding the pre-configured logarithmic addition look-up table, the third number”, and “store the resulting number in the destination register specified in the logarithmic addition instruction” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to Claim 18, it recites similar language to claim 1 and is rejected for at least the same reasons therein. Herein claim 18 is directed towards the statutory category of a method, thus also satisfying step 1. Moreover, there are no additional elements to integrate the judicial exception into a practical application.
With regards to claim 3, at Step 1, the claim is directed to a machine, which is a statutory category of invention.
At Step 2A Prong 1, examiner notes that the claim is directed to mental processes and mathematical calculations. The claim language has been reproduced below:
The processor architecture according to claim 1, wherein the plurality of registers comprise one or more registers for holding a logarithmic subtraction look-up table, (mental process, evaluation) wherein the logarithmic subtraction look-up table comprises a pre-configured logarithmic subtraction look-up table, (mental process, evaluation) wherein the logarithmic subtraction look-up table comprises a plurality of entries, each entry comprising a respective target difference, y-x, (mental process, evaluation; mathematical relationship) mapped to a respective third number, (mental process, evaluation) wherein each respective third number is equal to the value of 1 + bY-X rounded to the nearest value of bi, (mathematical calculation) wherein i is an integer, (mathematical concept),
wherein the instruction set includes a logarithmic subtraction instruction defined by a corresponding opcode (mental process, evaluation), a first source operand field taking a first source operand specifying a first source holding a first number (mental process, observation), a second source operand field taking a second source operand specifying a second source holding a second number (mental process, observation), and a destination field taking a destination operand specifying one of said operand registers as a destination register (mental process, observation);
wherein the execution unit is configured to, in response to the logarithmic subtraction opcode:
retrieve the first number from the first source specified in the logarithmic subtraction instruction;
retrieve the second number from the second source specified in the logarithmic subtraction instruction;
subtract the first number from the second number to determine a difference (mathematical concept); and
if the determined difference is greater than or equal to a predetermined threshold number, identify a respective entry in the logarithmic subtraction look-up table that comprises a respective target difference corresponding to the determined difference, (mental process, evaluation; mathematical relationship) retrieve, from the one or more registers holding the logarithmic subtraction look-up table, a third number mapped to the determined difference, (mental process, evaluation; mathematical relationship) and add the third number to the first number to determine a resulting number (mental process, evaluation; mathematical concept); and
if the determined difference is less than the predetermined threshold number, determine the resulting number to be the greatest of the first number and the second number (mental process, evaluation; mathematical concept); and
store the resulting number in the destination register specified in the logarithmic subtraction instruction; and
if the first number is equal to the second number, determine the resulting number to be zero (mathematical concept); and
store the resulting number in the destination register specified in the logarithmic subtraction instruction.
Each of the nonbolded limitations are mental processes and/or mathematical calculations. The “wherein the plurality of registers comprise” limitation is an evaluation mental process that can be performed by choosing what the plurality of registers comprises. The “wherein the logarithmic subtraction look-up table comprises” limitation is an evaluation mental process that can be performed by choosing what the logarithmic subtraction look-up table comprises. The “wherein the logarithmic subtraction look-up table comprises a plurality of entries” limitation is an evaluation mental process and mathematical concept that can be performed by creating a table using pen and paper. The “mapped to a respective third number” limitation is an evaluation mental process that can be performed by making another column in that table and writing down a third number mapped to the first. The “each respective third number is equal to” limitation is a mathematical calculation that can be performed by pen and paper, the equation 1 + by-x, and rounding bi to the nearest entry in the table. The “wherein i is an integer” limitation is a mathematical concept that can be performed by rounding i to the nearest number using pen and paper. The “wherein the instruction set includes a logarithmic subtraction instruction” limitation is an evaluation mental process that can be performed by one choosing the types of instructions present and giving them a corresponding opcode. The “a first source operand field” limitation is an observation mental process that can be performed by one choosing a first operand to perform calculations with. The “a second source operand” limitation is an observation mental process that can be performed by one choosing a second operand to perform calculations with. The “and a destination field” limitation is an observation mental process that can be performed by one choosing where to store their calculations. The “subtract the first number” limitation is a mathematical concept that can be performed by one subtracting two numbers using pen and paper. The “if the determined difference is greater than or equal to a predetermined threshold number,” limitation is an evaluation mental process and mathematical relationship that can be performed by one looking at the look-up table to identify a respective entry. The “a third number mapped to the determined difference” limitation is an evaluation mental process that can be performed by choosing what the third number is mapped to. The “add the third number to the first number” limitation is a mathematical calculation that can be performed by adding the first and third number by hand using pen and paper. The “if the determined difference is less than” limitation is an evaluation mental process and mathematical concept that can be performed by one choosing the larger of two numbers. The “if the first number is equal to the second number” limitation is a mathematical concept that can be performed by using pen and paper and subtracting the two numbers.
At Step 2A Prong 2, the additional elements are bolded above. The “retrieve the first number” and “retrieve the second number” limitations, as claimed under BRI, are additional elements that are insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed subtracting step. The “retrieve, from the one or more registers holding the logarithmic subtraction look-up table” limitation, as claimed under BRI, is an additional elements that is an insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering. The “store” limitations, as claimed under BRI, is an additional element that is insignificant extra-solution activity. For example, “store” in the context of this claim encompasses mere data gathering. See MPEP 2106.05(g). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
At Step 2B, the claim recites “retrieve the first number from the first source specified in the logarithmic subtraction instruction,” “retrieve the second number from the second source specified in the logarithmic subtraction instruction,” “retrieve, from the one or more registers holding the logarithmic subtraction look-up table”, and “store the resulting number in the destination register specified in the logarithmic subtraction instruction” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
Regarding claim 5, at Step 1, the claim is directed to a machine, which is a statutory category of invention.
At Step 2A Prong 1, examiner notes that the claim is directed to mental processes and mathematical calculations. The claim language has been reproduced below:
The processor architecture according to claim 1, wherein the instruction set includes a logarithmic multiplication instruction defined by a corresponding opcode (mental process, evaluation), a first source operand field taking a first source operand specifying a first source holding a first number (mental process, observation), a second source operand field taking a second source operand specifying a second source holding a second number (mental process, observation), and a destination field taking a destination operand specifying one of said operand registers as a destination register (mental process, observation);
wherein the execution unit is configured to, in response to the logarithmic multiplication opcode:
retrieve the first number from the first source specified in the logarithmic multiplication instruction;
retrieve the second number from the second source specified in the logarithmic multiplication instruction;
retrieve the bias from the bias register;
determine the resulting number by adding the first and second numbers and subtracting the bias (mathematical concept);
and store the resulting number in the destination register specified in the logarithmic multiplication instruction.
Each of the nonbolded limitations are mental processes and/or mathematical calculations. The “wherein the instruction set includes a logarithmic multiplication instruction” limitation is an evaluation mental process that can be performed by one choosing the types of instructions present and giving them a corresponding opcode. The “a first source operand field” limitation is an observation mental process that can be performed by one choosing a first operand to perform calculations with. The “a second source operand” limitation is an observation mental process that can be performed by one choosing a second operand to perform calculations with. The “and a destination field” limitation is an observation mental process that can be performed by one choosing where to store their calculations. The “determine the resulting number” limitation is a mathematical concept that can be performed by one adding two numbers and then subtracting a third using pen and paper.
At Step 2A Prong 2, the additional elements are bolded above. The “retrieve the first number,” “retrieve the second number,” and “retrieve the bias” limitations, as claimed under BRI, are additional elements that are insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed subtracting and adding steps. The “store” limitation, as claimed under BRI, is an additional element that is insignificant extra-solution activity. For example, “store” in the context of this claim encompasses mere data gathering. See MPEP 2106.05(g). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
At Step 2B, the claim recites “retrieve the first number from the first source specified in the logarithmic multiplication instruction,” “retrieve the second number from the second source specified in the logarithmic multiplication instruction,” “retrieve the bias from the bias register,” and “store the resulting number in the destination register specified in the logarithmic multiplication instruction” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 6, at Step 1, the claim is directed to a machine, which is a statutory category of invention.
At Step 2A Prong 1, examiner notes that the claim is directed to mental processes and mathematical calculations. The claim language has been reproduced below:
The processor architecture according to claim 1, wherein the instruction set includes a logarithmic division instruction defined by a corresponding opcode (mental process, evaluation), a first source operand field taking a first source operand specifying a first source holding a first number (mental process, observation), a second source operand field taking a second source operand specifying a second source holding a second number (mental process, observation), and a destination field taking a destination operand specifying one of said operand registers as a destination register (mental process, observation);
wherein the execution unit is configured to, in response to the logarithmic division opcode:
retrieve the first number from the first source specified in the logarithmic division instruction;
retrieve the second number from the second source specified in the logarithmic division instruction;
retrieve the bias from the bias register;
determine the resulting number by subtracting the first and second numbers and adding the bias (mathematical concept);
and store the resulting number in the destination register specified in the logarithmic division instruction.
Each of the nonbolded limitations are mental processes and/or mathematical calculations. The “wherein the instruction set includes a logarithmic division instruction” limitation is an evaluation mental process that can be performed by one choosing the types of instructions present and giving them a corresponding opcode. The “a first source operand field” limitation is an observation mental process that can be performed by one choosing a first operand to perform calculations with. The “a second source operand” limitation is an observation mental process that can be performed by one choosing a second operand to perform calculations with. The “and a destination field” limitation is an observation mental process that can be performed by one choosing where to store their calculations. The “determine the resulting number” limitation is a mathematical concept that can be performed by one subtracting two numbers and then adding a third using pen and paper.
At Step 2A Prong 2, the additional elements are bolded above. The “retrieve the first number,” “retrieve the second number,” and “retrieve the bias” limitations, as claimed under BRI, are additional elements that are insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed subtracting and adding steps. The “store” limitation, as claimed under BRI, is an additional element that is insignificant extra-solution activity. For example, “store” in the context of this claim encompasses mere data gathering. See MPEP 2106.05(g). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
At Step 2B, the claim recites “retrieve the first number from the first source specified in the logarithmic division instruction,” “retrieve the second number from the second source specified in the logarithmic division instruction,” “retrieve the bias from the bias register,” and “store the resulting number in the destination register specified in the logarithmic division instruction” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 7, the claim is directed to a mental process, one can determine the amount of places that a number should be accurate to. The “store” limitation of claim 7, according to 2A Prong 2, is an additional element that is insignificant extra-solution activity. See MPEP 2106.05(g). Under step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claim 8, the claim is directed to a mental process, one can determine the amount of places that a number should be accurate to. The “store” limitation of claim 8, according to 2A Prong 2, is an additional element that is insignificant extra-solution activity. See MPEP 2106.05(g). Under step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claim 9, at Step 1, the claim is directed to a machine, which is a statutory category of invention.
At Step 2A Prong 1, examiner notes that the claim is directed to mental processes and mathematical calculations. The claim language has been reproduced below:
The processor architecture according to claim 1, wherein the instruction set includes a logarithmic square root instruction defined by a corresponding opcode (mental process, evaluation), a first source operand field taking a first source operand specifying a first source holding a first number (mental process), and a destination field taking a destination operand specifying one of said operand registers as a destination register (mental process, observation);
wherein the execution unit is configured to, in response to the logarithmic square root opcode:
retrieve the first number stored in the first source specified in the logarithmic square root instruction;
retrieve the bias from the bias register;
determine the resulting number by performing a right logical shift on the first number and adding half of the bias to the shifted first number (mathematical concept); and
store the resulting number in the destination register specified in the logarithmic square root instruction.
Each of the nonbolded limitations are mental processes and/or mathematical calculations. The “wherein the instruction set includes a logarithmic square root instruction limitation” is an evaluation mental process that can be performed by one choosing the types of instructions present and giving them a corresponding opcode. The “a first source operand field” limitation is an observation mental process that can be performed by one choosing a first operand to perform calculations with. The “and a destination field” limitation is an observation mental process that can be performed by one choosing where to store their calculations. The “determine the resulting number” limitation is a mathematical concept that can be performed by one either shifting the binary number right one place or dividing the number if it is In logarithmic form and then dividing the second number by two and adding it to the first using pen and paper.
At Step 2A Prong 2, the additional elements are bolded above. The “retrieve the first number” and “retrieve the bias” as claimed under BRI, are additional elements that are insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed shifting and addition steps. The “store” limitation, as claimed under BRI, is an additional element that is insignificant extra-solution activity. For example, “store” in the context of this claim encompasses mere data gathering. See MPEP 2106.05(g). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
At Step 2B, the claim recites “retrieve the first number from the first source specified in the logarithmic square root instruction,” “retrieve the bias from the bias register,” and “store the resulting number in the destination register specified in the logarithmic square root instruction” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 10, the claim is directed to mental processes. The “and a respective data location” limitation is and evaluation mental process that can be performed by one choosing a location to store data. The “a respective one of said operand registers” is a generic computer component that amounts to no more than components comprising mere instructions to apply the exception and does not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
With regards to claim 11, the claim is directed to an evaluation mental process, one can add a negative or positive sign to a number. Under steps 2A Prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claim 12, the claim is directed to an evaluation mental process, one can choose a bias for use in calculations with a pen and paper. Under steps 2A Prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claim 15, the claim is directed to mental processes and mathematical concepts. The “wherein b=21/k” limitation is a mathematical formula that can be performed using the equation b=21/k and pen and paper. The “wherein K is configurable” is an evaluation mental process that can be performed by choosing a number for K. Under steps 2A Prong 2 and 2B, the claims do not recite any additional elements that integrate the abstract idea into a practical application, nor do they amount to significantly more than the judicial exception.
With regards to claim 16, at Step 1, the claim is directed to an article of manufacture, which is a statutory category of invention.
At Step 2A Prong 1, examiner notes that the claim is directed to mental processes and mathematical calculations. The claim language has been reproduced below:
A non-transitory computer-readable storage medium comprising instructions which, when executed by a computer system comprising the processor architecture according to claim 1, cause the computer system to:
convert one or more respective values V stored in data memory into a respective number x, wherein the conversion is based on the logarithmic mapping V = bx-B, where B is the bias and b is a predetermined base number (mathematical concept);
supply the one or more respective numbers to the processor to be held in a respective one of the plurality of operand registers of the processor;
retrieve the resulting number held in the destination register from the processor;
and convert the resulting number into a resulting value (mathematical concept) to be stored in data memory based on the logarithmic mapping.
Each of the nonbolded limitations is directed to a mental process and/or mathematical concept. The “convert one or more respective values” limitation is a mathematical concept that can be performed by using the equation V = bx-B and a pen and paper. The “and convert the resulting number into a resulting value” limitation is a mathematical concept that can be performed with a pen and paper.
At Step 2A Prong 2, the additional elements are bolded above. The “supply the one” and “retrieve the resulting number” as claimed under BRI, are additional elements that are insignificant extra-solution activity. For example, ‘retrieve’ in the context of this claim encompasses mere data gathering based on generic testing to lead to a response used for the claimed conversion step. The “supply” in the context of the claim encompasses mere data gathering based on generic testing to lead to a response used in further calculating steps. The “stored” limitations, as claimed under BRI, is an additional element that is insignificant extra-solution activity. For example, “store” in the context of this claim encompasses mere data gathering. See MPEP 2106.05(g). The remaining bolded limitations are generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
At Step 2B, the claim recites “stored in data memory,” “supply the one or more respective numbers to the processor to be held in a respective one of the plurality of operand registers of the processor,” “retrieve the resulting number held in the destination register from the processor,” and “to be stored in data memory based on the logarithmic mapping” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 17, the claim is directed to a machine. Under steps 2A Prong 2 and 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor does it amount to significantly more than the judicial exception.
With regards to claim 19, it is directed to mental processes and/or mathematical concepts. The “wherein the destination register specified in the logarithmic multiplication” limitation is an evaluation mental process that can be performed by choosing the bit width of the register. The “wherein if the resulting number is larger than a maximum number that can” limitation is an evaluation mental process that can be performed by choosing what to store in the event of the result being larger than the maximum number. Under step 2A Prong 2, the “store” limitation, as claimed under BRI, are additional elements that are insignificant extra-solution activity. The ‘store’ in the context of the claim encompasses mere data gathering. None of the remaining additional elements regarding the generic computer components (i.e. the destination register, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
Under Step 2B, the claim recites “the execution unit is configured to store”, and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 20, it is directed to mental processes and/or mathematical concepts. The “wherein the destination register specified in the logarithmic division” limitation is an evaluation mental process that can be performed by choosing the bit width of the register. The “wherein if the resulting number is less than a minimum number” limitation is an evaluation mental process that can be performed by choosing what to store in the event of the result being smaller than the minimum number. Under step 2A Prong 2, the “store” limitation, as claimed under BRI, are additional elements that are insignificant extra-solution activity. The ‘store’ in the context of the claim encompasses mere data gathering. None of the remaining additional elements regarding the generic computer components (i.e. the destination register, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
Under Step 2B, the claim recites “the execution unit is configured to store”, and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 21, it is directed to mental processes and/or mathematical concepts. The “wherein the processor architecture further comprises” limitation is an evaluation mental process that can be performed by choosing what the processor architecture comprises. The “a register file that includes” limitation is an evaluation mental process that can be performed by choosing what the register file includes. Under step 2A Prong 2, none of the remaining additional elements regarding the generic computer components (i.e. the processor architecture, the register file, the plurality of registers, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f). Under step 2B, the claim does not recite any additional elements that integrate the abstract idea into a practical application, nor does it amount to significantly more than the judicial exception.
With regards to claim 22, it is directed to mental processes and/or mathematical concepts. The “further comprising:” limitation is an evaluation mental process that can be performed by choosing what the processor architecture comprises. The “a pipeline comprising:” limitation is an evaluation mental process that can be performed by choosing what the pipeline comprises. The “a fetch stage configured to” limitation is an evaluation mental process that can be performed by choosing what the fetch stage is configured to do. The “a decode stage configured to” limitation is an evaluation mental process that can be performed by choosing what the decode stage is configured to do. The “decode the fetched instruction” limitation is an evaluation mental process that can be performed by decoding the instruction by hand using pen and paper. The “a register read stage configured to” limitation is an evaluation mental process that can be performed by choosing what the register read stage is configured to do. The “at least one compute stage configured to” limitation is an evaluation mental process that can be performed by choosing what the compute stage is configured to do. The “perform arithmetic operations and look- up operations in the pre-configured logarithmic addition look-up table” limitation is an evaluation mental process and mathematical calculation that can be performed by performing the arithmetic operations and look- up operations by hand using pen and paper. The “and one or more memory access stages configured to” limitation is an evaluation mental process that can be performed by choosing what the memory access stage is configured to do. Under step 2A Prong 2, the “fetch” limitation, as claimed under BRI, are additional elements that are insignificant extra-solution activity. The ‘fetch’ in the context of the claim encompasses mere data gathering. The “read” limitation, as claimed under BRI, are additional elements that are insignificant extra-solution activity. The ‘read’ in the context of the claim encompasses mere data gathering. The “access” limitation, as claimed under BRI, are additional elements that are insignificant extra-solution activity. The ‘access’ in the context of the claim encompasses mere data gathering. None of the remaining additional elements regarding the generic computer components (i.e. the pipeline, the fetch stage, the instruction memory, the decode stage, the register read stage, the plurality of registers, the at least one compute stage, the one or more memory access stages, the data memory, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
Under Step 2B, the claim recites “a fetch stage configured to fetch the logarithm addition instruction from an instruction memory”, “a register read stage configured to read operands from the plurality of registers”, “and one or more memory access stages configured to access a data memory” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 23, it is directed to mental processes and/or mathematical concepts. The “wherein the register read stage is configured to” limitation is an evaluation mental process that can be performed by choosing what the register read stage is configured to do. Under step 2A Prong 2, the “read” limitation, as claimed under BRI, are additional elements that are insignificant extra-solution activity. The ‘read’ in the context of the claim encompasses mere data gathering. None of the remaining additional elements regarding the generic computer components (i.e. the register read stage, the bias register, the plurality of operand registers, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
Under Step 2B, the claim recites “the register read stage is configured to read a bias value from the bias register and operand values from the plurality of operand registers” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
With regards to claim 24, it is directed to mental processes and/or mathematical concepts. The “wherein the at least one compute stage is configured to” limitation is an evaluation mental process that can be performed by choosing what the at least one compute stage is configured to do. The “perform subtraction of the first number from the second number to determine y-x” limitation is a mathematical calculation that can be performed by subtracting the first number from the second number by hand using pen and paper. The “and perform addition of the retrieved third number” limitation is a mathematical calculation that can be performed by adding the third number to the first number by hand using pen and paper. Under step 2A Prong 2, the “retrieval” limitation, as claimed under BRI, are additional elements that are insignificant extra-solution activity. The ‘retrieval’ in the context of the claim encompasses mere data gathering. None of the remaining additional elements regarding the generic computer components (i.e. the at least one compute stage, etc.) are more than high level generic computer components that amount to no more than components comprising mere instructions to apply the exception and do not integrate the judicial exception into a practical application. See MPEP 2106.05(f).
Under Step 2B, the claim recites “perform conditional retrieval from the logarithmic addition look-up table based on y-x” and, per MPEP 2106.05(d) (Il), the courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity:
i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); and
iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.
Allowable Subject Matter
Claims 1, 3, 5-12 and 15-24 would be allowable if rewritten to overcome the rejections under 35 U.S.C. 101 and 35 U.S.C. 112 set forth in this Office action.
While prior art teaches of logarithmic number systems using look-up tables, prior art fails to teach that a respective third number of the look-up table is equal to the value of 1 + bY-X rounded to the nearest value of bi. Prior art also fails to teach that b=21/k, wherein K is configurable by the user.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/J.O.G./Examiner, Art Unit 2151
/James Trujillo/Supervisory Patent Examiner, Art Unit 2151
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