DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on November 20, 2025 has been entered.
Response to Amendment
This action is responsive to the amendment and remarks received November 20, 2025. Claims 1, 3, 5, 13, 17, and 18 are amended. Claims 2, 4, 15, and 16 are canceled. No claims are newly added. Claims 1, 3, 5-14, and 17-25 are currently pending in the application.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, and 5-7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Patent Pub. No. US 2020/0098736 A1 to Liao et al. (hereinafter "Liao").
In re claim 1, Liao discloses a package, see Figures 1-2, comprising:
a layer of glass (216a) having a first side and a second side opposite the first side;
one or more through glass vias (TGV) (218a) that extend from the first side of the layer
of glass (216a) to the second side of the layer of glass (216a), wherein the one or more TGV
(218A) include an electrically conductive material that electrically couples the first side of the
layer of glass (216a) with the second side of the layer of glass (216a); and
a photonic integrated circuit (PIC) (100a) physically coupled to the first side of the layer
of glass (216a) via hybrid bonding, wherein the PIC (100A) is electrically coupled with the one
or more TGV (218A); and
a die (210a) physically coupled with the second side of the layer of glass via hybrid bonding, wherein the die is electrically coupled with the one or more TGV (see figure 1C).
See paragraphs [0014]-[0039] of Liao for further details.
In re claim 3, Liao further discloses that the die (300a) may be an SRAM die (300a).
In re claim 5, as seen in FIG. 1A, the die (210a/300a) is a plurality of dies (210a, 300a), wherein the one or more TGV (218A) is a plurality of sets of one or more TGV (218A).
In re claim 6, as seen in FIG. 1A, the plurality of dies (210a, 300a) are directly physically
coupled with the first side of the glass layer (216a), and wherein at least one of the plurality of
dies (210a, 300a) is coupled with at least one of the plurality of sets of one or more TGV (218A) (the term "coupled" is interpreted in light of paragraph [0017] of applicant's specification).
In re claim 7, the particular limitations are implied in paragraph [0023] of Liao.
Claim(s) 1, 3, 5-8, 10, 13, 15-21, and 25 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Patent No. 10,267,990 to Yu et al. (hereinafter "Yu").
In re claim 1, Yu discloses a package, see Figures 2-13, comprising:
a layer of glass (silicon oxide layer 208) having a first side and a second side opposite the
first side (col. 4, lines 43-45);
one or more through glass vias (TGV) (212) that extend from the first side of the layer of glass (208) to the second side of the layer of glass (208) wherein the one or more TGV (212) include an electrically conductive material that electrically couples the first side of the layer of
glass (208) with the second side of the layer of glass (208) (col. 5, lines 1-3); and
a photonic integrated circuit (PIC) (112) physically coupled to the first side of the layer
of glass (208) via hybrid bonding, wherein the PIC (112) is electrically coupled with the one or
more TGV (212) (col. 5, lines 42-60);
a die (110) physically coupled with the second side of the layer of glass via hybrid bonding, wherein the die is electrically coupled with the one or more TGV (see figure 11B).
See col. 2, line 34 to col. 7, line 24 of Yu for further details.
In re claim 3, Yu further discloses that the die (108) may be an SRAM die (108).
In re claim 5, as seen in FIG. 12B, the die (108/110) is a plurality of dies (108, 110), wherein the one or more TGV (212) is a plurality of sets of one or more TGV (212).
In re claim 6, as seen in FIG. 12B, the plurality of dies (108, 110) are directly physically coupled with the first side of the glass layer (208), and wherein at least one of the plurality of dies (108, 110) is coupled with at least one of the plurality of sets of one or more TGV (212) (the term "coupled" is interpreted in light of paragraph [0017] of applicant's specification).
In re claim 7, at least one of the plurality of dies (108, 110) are physically coupled with a RDL (213, 214), the RDL (213, 214) placed between the at least one of the plurality of dies (108, 110) and the second side of the layer of glass (208), wherein the RDL (213, 214) electrically couples the at least one of the plurality of dies (108, 110), respectively, with at least one of the plurality of sets of one or more TGV (212).
In re claim 8, as seen in FIG. 12B, the PIC (112) forms a bridge that electrically couples at least one of the plurality of dies (108) or (110) with another of the plurality of dies (110) or (108).
In re claim 10, Yu further discloses an optical waveguide (204) within the layer of glass (208), the optical waveguide (204) optically coupled with the PIC (112).
In re claim 13, Yu discloses a method, see Figures 2-13, comprising:
identifying a layer of glass (208) with a first side and a second side opposite the first side
(col. 4, lines 43-45);
forming a plurality of TGV (212) extending from the first side of the layer of glass (208) to the second side of the layer of glass (208);
inserting electrically conductive material into the plurality of TGV (212), the electrically conductive material electrically coupling the first side of the layer of glass (208) with the second
side of the layer of glass (208) (col. 5, lines 1-3);
forming an optical waveguide (204) proximate to the first side of the layer of glass (208);
and coupling a PIC (112) to the first side of the layer of glass (208) using hybrid bonding,
wherein the PIC (112) is optically coupled to the optical waveguide (204) and electrically
coupled with the electrically conductive material within at least one of the plurality of TGV
(212) (col. 5, lines 42-60);
a die (110) physically coupled with the second side of the layer of glass via hybrid bonding, wherein the die is electrically coupled with the one or more TGV (see figure 11B).
See col. 2, line 34 to col. 7, line 24 of Yu for further details.
In re claim 17, as seen in FIG. 12B of Yu, at least two or more of the dies (108, 110) are
electrically coupled with the PIC (112) via interconnect (220).
In re claim 18, Yu discloses a package, see Figures 2-13, comprising:
a layer of glass (208) having a first side and a second side opposite the first side (col. 4,
lines 43-45);
a plurality of through glass vias (TGV) (212) that extend from the first side of the layer of
glass (208) to the second side of the layer of glass (208), wherein the plurality of TGV (212)
include an electrically conductive material that electrically couples the first side of the layer of
glass (208) with the second side of the layer of glass (208) (col. 5, lines 1-3);
a plurality of PICs (112) physically coupled to the first side of the layer of glass (208) via
hybrid bonding, wherein the plurality of PICs (112) are electrically coupled, respectively, with at
least one of the plurality of TGV (212) (col. 5, lines 42-60);
a plurality of optical waveguides (204) within the layer of glass (208), wherein the
plurality of optical waveguides (204) are optically coupled, respectively, with the plurality of
PICs (112); and
a plurality of dies (108, 110) physically coupled with the second side of the layer of glass
(208) via hybrid bonding, wherein the plurality of dies (108, 110) are electrically coupled, respectively, with at least one of the plurality of TGV (212) (col. 5, lines 42-60). See col. 2, line 34 to col. 7, line 24 of Yu
for further details.
In re claim 19, Yu further discloses the plurality of dies (108, 110) include a selected one or more of: a high-bandwidth memory die (108) or an SRAM die (108).
In re claim 20, as seen in FIG. 12B of Yu, one of the plurality of PIC (112) electrically couples a first of the plurality of dies (108, 110) and a second of the plurality of dies (108, 110) via interconnect (220), and wherein another of the plurality of PIC (112) electrically couples a third of the plurality of dies (108, 110) and a fourth of the plurality of dies (108, 110) via interconnect (220).
In re claim 21, as seen in FIG. 12B of Yu, the plurality of PIC (112) are within a layer of
molding (226), wherein the layer of molding (226) is coupled with the first side of the glass layer
(208).
In re claim 25, the plurality of waveguides (204) are optically coupled, respectively, to a
plurality of optical connectors (206) and/or (218) physically coupled with the layer of glass
(208).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 9 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu as applied to claim 1 above, and further in view of Patent No. 9,678,271 to Thacker et al. ("Thacker").
In re claim 9, Yu only differs in that he does not teach a cavity in the first side of the layer of glass (208) extending toward the second side of the layer of glass (208); and wherein the PIC
(112) is placed within the cavity. Thacker, on the other hand, teaches a cavity (158) in the first
side of a layer of glass (interposer 118-1) extending toward the second side of the layer of glass
(208); and wherein a PIC (OIC 126-1) is placed within the cavity (158). See columns 6-7 of
Thacker. In order to stack his dies (108, 110, 112) vertically on top of each other, the layer of
glass (208) of Yu would have been modified to include a cavity in order to hold his PIC (112),
using the teachings of Thacker, thereby obtaining the invention specified by claim 9. Therefore,
it would have been obvious to one ordinary skill in the art before the effective filing date of the
claimed invention to obtain the invention specified by claim 9 in view of Yu combined with
Thacker.
In re claim 12, Thacker further teaches that his glass layer (interposer 118-1) has a height (thickness) of between 100 µm and 1 mm. As seen in FIG. 1 of Thacker, the PIC (126-1) has a top surface that is flush or co-planar with the top surface of the interposer (118-1) and, therefore, the PIC (126-1) of Thacker would also have a height (z-height) on the order of between 100 µm and 1 mm. In order to use the same z-height used by Thacker, the PIC (112) of Yu would have been modified to have a z-height of 50 µm or greater, thereby obtaining the invention specified by claim 12. Therefore, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to obtain the invention specified by claim 12 in view of Yu combined with Thacker.
Claim(s) 11 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over
Yu as applied to claim 10 or 13 above, and further in view of the article titled "Glass
Substrate With Integrated Waveguides for Surface Mount Photonic Packaging" to
Brusberg et al. published in the JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 39,
NO. 4, FEBRUARY 15, 2021 (hereinafter "Brusberg"). Brusberg was provided by
applicant with the IDS.
In re claims 11 and 14, Yu only differs in that he does not teach his optical waveguide (204) is optically coupled with the PIC (112) with an evanescent coupling. Brusberg, on the other hand, disclosed that evanescent coupling methods are scalable to high optical port counts and can be automated by pick and place machines. See page 915, Section IV of Brusberg. Brusberg further taught that the optical quality of the top surface of a glass substrate hosting ion-exchanged (IOX) waveguides made it well suited for evanescent mode coupling to PIC waveguides. Id. In order to use a higher number of optical ports and/or to use a waveguide in his PIC (112), the optical waveguide (204) of Yu would have been optically coupled with the PIC (112) with an evanescent coupling, per the suggestion of Brusberg, thereby obtaining the invention specified by claims 11 and 14. Therefore, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to obtain the invention specified by claims 11 and 14 in view of Yu combined with Brusberg.
Claim(s) 22-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu as applied to claim 21 above, and further in view of Liao.
In re claim 22, Yu only differs in that he does not teach one more conductive pillars extending from a first side of the layer of molding (226) to the second side of the layer of molding (226) opposite the first side, and wherein the one or more conductive pillars are electrically coupled with one or more of the plurality of TGV (212). Liao, as previously discussed, teaches one more conductive pillars within vias (212a) extending from a first side of a circuit component (200a) to the second side of the circuit component (200a opposite the first side, and wherein the one or more conductive pillars within vias (212a) are electrically coupled with one or more of a plurality of TGV (218a/318a). See FIG. 2C and FIG. 1A of Liao. In order to stack additional electrical devices on top of his molding layer (226), one more conductive pillars would have been provided extending from a first side of the layer of molding (226) to the second side of the layer of molding (226) opposite the first side, and wherein the one or more conductive pillars would have electrically coupled with one or more of the plurality of TGV (212), using the teachings of Liao, thereby obtaining the invention specified by claim 22. Therefore, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to obtain the invention specified by claim 22 in view of Yu combined with Liao.
In re claim 23, as seen in FIG. 12B of Yu, the first side of the layer of molding (226) is coupled with the first side of the layer of glass (208). As seen in his FIG. 2C, Liao further teaches an RDL (500) coupled with the second side of his circuit component (200a), the RDL (5000) electrically coupled with the one or more conductive pillars within vias (212a). The RDL (500) of Liao would have also been coupled to the first side of the molding layer (226) of Yu in view of Liao and electrically coupled with the one or more conductive pillars for the same reasons mentioned with respect to claim 22.
In re claim 24, as seen in FIG. 2J of Liao, the RDL (500) is coupled with a plurality of
electrically conductive bumps (900). In order to connect additional electrical devices on top of
the RDL (500) of Yu in view of Liao, the RDL (500) would have also been coupled with the
electrically conductive bumps (900) of Liao, thereby obtain the invention specified by claim 24.
Response to Arguments
Applicant's arguments filed November 20, 2025 have been fully considered but they are not persuasive.
The applicant’s sole argument, see pages 8-11, is that Liao fails to disclose the limitations of claims 1, 13 and 18 as Liao discloses a structure including a PIC 100a bonded to a wafer W, and therefore does not disclose a die physically coupled with the second side of the layer. The examiner respectfully disagrees. First, other figures of Liao cited in the office action, for example figure 1C, shows the glass layer with dies on both sides thereof. Therefore, simply looking at fig. 1A and arguing against Liao with respect to just this single figure is not persuasive.
Secondly, applicant has not responded to the outstanding rejections under any of the other prior art other than Liao. Applicant’s arguments are therefore insufficient to overcome the outstanding rejection, or the rejection above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN M BEDTELYON whose telephone number is (571)270-1290. The examiner can normally be reached 8:00am - 4:30pm.
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/John Bedtelyon/Primary Examiner, Art Unit 2874