DETAILED ACTION
This action is in response to the amendments filed on Mar. 30th, 2026. A summary of this action:
Claims 1-4, 6-16, 18, 20-23 have been presented for examination.
Independent claims objected to
Claim 1-4, 6-11, 18, 21-23 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement
Claims 1-4, 6-16, 18, 20-23 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of both a mathematical concept and mental process without significantly more
This action is Final
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments/Amendments
Regarding the § 112 Rejection
Maintained, updated as necessitated by amendment.
With respect to the remarks regarding claim 1, as was discussed in the interview the amendment does not address the issue, however a potential direction of amendment was discussed that would likely resolve this issue. Final agreement was not reached on said amendment however during the interview.
With respect to the remarks regarding claim 9, the machine translation of global dossier’s JP document has the same issue as the as filed disclosure - see at ¶ 48: “converting the variable xi, which is a positive value, into+ 1 and converting the variable xi, which is a negative value, into - 1 in the first vector.” – which is verbatim what the as-filed disclosure states, and is indefinite as it requires xi to be both a positive value and negative value at the same time.
Furthermore, a certified copy is required because this 112(a) and now new matter issue is fundamentally a priority issue, i.e. does the JP publication sufficiently describe what is alleged, or what is in the as-filed disclosure. However, the as-filed disclosure, which the Examiner treats as the official English translation of record due to its accompanying inventors’ oaths that they had reviewed it (thereby certifying it for accuracy), does not sufficiently describe in a definite manner the amended subject matter, nor does the machine translation as noted above.
As discussed in the interview, to have a new translation of the paragraph in question be used to address the § 112(a) and new matter issues, the new translation needs to be accompanied by a certification of that translation, such as by at least one inventor, or by a qualified human translator. During the interview, it appears agreement was reached on this direction to address the issue at hand.
With respect to the remarks for dependent claims 21-23, as was discussed in the interview, the issue pointed to in the rejection was the act of retrieving was being limited by those claims, and the specification did not support that, but rather the opposite, i.e. that each processor retrieves all of the N variables of each vector, but then only uses a subset L of the variables for the calculations.
A direction of amendment was discussed in the interview and appeared to be the correct direction to address this issue, but final agreement was not reached.
Regarding the § 101 Rejection
Maintained, however as per the interview agreement was reached on amendments that, should they be entered into the record, would address the § 101 rejection by incorporate the subject matter of page 51, ¶ 3 into the claims, to capture the improvement to technology in that paragraph as well as the features that provide said improvement at prong 2.
With respect to the remarks, regarding the mental process, the limitations in question were treated as additional elements in part – i.e. those limitations were not part of the abstract idea.
With respect to the calculation remarks, the Examiner notes that the claims at issue do not convey any particularly complex series of calculations that would preclude a person, e.g. a mathematician, from mentally performing the abstract idea, but for the mere instructions to do it on a computer.
With respect to the remarks regarding the updating steps, see the rejection and the specification – i.e. “It is important to note that a mathematical concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula." In re Grams, 888 F.2d 835, 837 and n.1, 12 USPQ2d 1824, 1826 and n.1 (Fed. Cir. 1989).” (MPEP § 2106.04(a)(2)(I)) and “There is no particular word or set of words that indicates a claim recites a mathematical calculation. That is, a claim does not have to recite the word "calculating" in order to be considered a mathematical calculation. For example, a step of "determining" a variable or number using mathematical methods or "performing" a mathematical operation may also be considered mathematical calculations when the broadest reasonable interpretation of the claim in light of the specification encompasses a mathematical calculation.” (MPEP § 2106.04(a)(2)(I)(C)).
MPEP § 2111.01 to clarify: “However, the best source for determining the meaning of a claim term is the specification - the greatest clarity is obtained when the specification serves as a glossary for the claim terms. "Phillips v. AWH Corp., 415 F.3d 1303, 1315, 75 USPQ2d 1321, 1327 (Fed. Cir. 2005) (en banc) ("[T]he specification ‘is always highly relevant to the claim construction analysis. Usually, it is dispositive; it is the single best guide to the meaning of a disputed term.’" (quoting Vitronics Corp. v. Conceptronic Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996))”
With respect to prong 2 remarks, Examiner notes that “An inventive concept "cannot be furnished by the unpatentable law of nature (or natural phenomenon or abstract idea) itself." Genetic Techs. Ltd. v. Merial LLC, 818 F.3d 1369, 1376, 118 USPQ2d 1541, 1546 (Fed. Cir. 2016).” (MPEP § 2106.05(I)) – instead, it must be found in the additional elements (MPEP § 2106.05(a), as such see the direction of amendment discussed in the interview and noted above for what would overcome the rejection at prong 2.
With respect to 2B remarks, the WURC consideration of the additional elements in combination is of the additional elements alone, separate from the abstract idea, as the question is: “Alice Corp., 573 U.S. at 21-18, 110 USPQ2d at 1981 (citing Mayo, 566 U.S. at 78, 101 USPQ2d at 1968 (after determining that a claim is directed to a judicial exception, "we then ask, ‘[w]hat else is there in the claims before us?") (emphasis added));” (MPEP § 2106.05(I)), i.e. what else, besides the abstract idea itself, is recited and is that “else” conventional.
Evidence of record indicates that the “else” is conventional. Examiner suggests amending to what was discussed in the interview to overcome the rejection.
Specification
The amendment filed March 30th, 2026 is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows:
The original disclosure does not sufficiently convey what is in the amended specification, rather it conveys “xi, which is a positive value, into a +1 and a variable xi, which is a negative value, into -1 in the first vector”, i.e. xi “is” both, simultaneously, a positive and negative value, which is indefinite.
Per the discussion in the interview, the Examiner noted that a certified translator (e.g. by declaration/affidavit from a qualified translator or the instant inventors) of the original JP document for this portion of the disclosure would address the issue, should it be entered into the record.
Applicant is required to cancel the new matter in the reply to this Office Action.
Claim Objections
Independent claims objected to because of the following informalities:
Independent claims recite “N” but associate it as a reference character/variable for two distinct elements, and similar for the “L”, i.e. N = first variables = second variables, and similar for L.
In view of the specification, as discussed in the interview, at pages 51-52, also at 47-48, we discussed potential directions of amendment to clarify expressly on the scope of the claims to clearly reflect what is disclosed and address this objection.
Examiner noted that while the direction of amendment may appear verbose, the claim has been consistently interpreted in view of the specification and as such would not be substantial to claim scope, i.e. that N is referring to the number of elements in each of the first and second vectors (x and y; respectively), and both vectors have the same number N of elements.
Appropriate correction is required.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1-4, 6-11, 18, 21-23 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Dependent claims inherit the deficiency of the claims they depend upon.
MPEP § 2163(I) for Lockwood v. Amer. Airlines, Inc., 107 F.3d 1565, 1572, 41 USPQ2d 1961, 1966 (Fed. Cir. 1997) and MPEP § 2163(II)(A) for Hyatt v. Dudas, 492 F.3d 1365, 1371, 83 USPQ2d 1373, 1376-1377 (Fed. Cir. 2007): “For example, in Hyatt v. Dudas, 492 F.3d 1365, 1371, 83 USPQ2d 1373, 1376-1377 (Fed. Cir. 2007), the examiner made a prima facie case by clearly and specifically explaining why applicant’s specification did not support the particular claimed combination of elements, even though applicant’s specification listed each and every element in the claimed combination. The court found the "examiner was explicit that while each element may be individually described in the specification, the deficiency was lack of adequate description of their combination" and, thus, "[t]he burden was then properly shifted to [inventor] to cite to the examiner where adequate written description could be found or to make an amendment to address the deficiency." Id.;”
Independent claims 1 recites:
calculate a problem term using a plurality of the N first variables, and – wherein this is be to performed by “each of the plurality of processing circuits” wherein the updating steps prior to this are only being performed on a subset of the first/second variables
This is not sufficient described. See page 19, ¶ 4: “Note that at least one of the processes illustrated in the flowchart of FIG. 6 may be executed in parallel. For example, the processes of steps S104 to S106 may be executed in parallel such 10 that at least some of the N elements included in each of the first vector and the second vector are updated in parallel.” Then see the example beginning at the end of page 51, incl.: “it is possible to cause each of the processors to calculate L variables among the variables… Similarly, it is possible to cause each of the processors to calculate L variables among the variables Yi included in the second vector… The processor #j calculates a value of the problem term…” – wherein, the equations expressly convey this calculation is with “L” variables (i.e. each processor is calculating the problem term with the subset of the N variables), not the N variables.
To clarify, follow the notations in the specification at pages 51-52, i.e. each processor j of Q plurality of processors is to calculate a number L to variables of the first and second vector (which each vector has N total elements, i.e. each processor is calculating a subset of the vector of L elements of the N elements, i.e. the equations at ln. 30-32. Hence, the above rejection, as this specification at 52, ln. 25-30, conveys again that each process j calculates L number of elements (i.e. a vector array of size/length L, wherein the vectors were of size/length N).
Examiner suggests amending the claim to more expressly reflect what is disclosed.
Claim 9 recites, in part: calculate a solution vector by converting variables that are positive values of the selected searched vector into first values and converting variables that are negative values of the selected searched vector into second values smaller than the first values.
This is not sufficiently disclosed with the particularity recited in the present claims. See page 16-17, the paragraph split between the pages: “For example, when the value of the coefficient p(t) exceeds a predetermined value, a solution vector having the spin Si as an element can be obtained by converting a variable Xi, which is a positive value, into+ 1 and a variable Xi, which is a negative value, into -1 in the first vector” – in particular, this is converting the variable, and requiring the same variable “Xi” [note the “i”] in particular to be both a positive value and a negative value (see the prior § 112(b) rejection of claim 5). To further clarify, see page 19 for the description of step S109. Also see page 27 ¶ 1.
To clarify, see MPEP §2111.01(I): “Chef America, Inc. v. Lamb-Weston, Inc., 358 F.3d 1371, 1372, 69 USPQ2d 1857 (Fed. Cir. 2004) (Ordinary, simple English words whose meaning is clear and unquestionable, absent any indication that their use in a particular context changes their meaning, are construed to mean exactly what they say….” And MPEP § 2163(I) for Lockwood v. Amer. Airlines, Inc., 107 F.3d 1565, 1572, 41 USPQ2d 1961, 1966 (Fed. Cir. 1997) and MPEP § 2163(II)(A) for Hyatt v. Dudas, 492 F.3d 1365, 1371, 83 USPQ2d 1373, 1376-1377 (Fed. Cir. 2007).
Claims 21-23 recite (using claim 21 as representative):
The information processing device of claim 1 , wherein the number of N first variables retrieved by each of the processing circuits is the same, and the number of L second variables retrieved by each of the processing circuits is determined based upon the performance of the information processing device. See page 52, ¶ 1: “However, the number of elements (variables) of each of the first vector and the second vector to be calculated may be different depending on a processor. For example, in a case where there is a performance difference depending on a processor implemented in a calculation server, the number of variables to be calculated can be determined depending on the performance of the processor.” – this does not describe with sufficiently particularity what is presently claimed.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-4, 6-16, 18, 20-23 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of both a mathematical concept and mental process without significantly more.
Step 1
Claims 14-15 are directed towards the statutory category of a process.
Claims 1 and 12 are directed towards the statutory category of an apparatus.
Claim 16 is directed towards the statutory category of an article of manufacture.
Claims 12, 14-16, and the dependents thereof, are rejected under a similar rationale as representative claim 1, and the dependents thereof.
Step 2A – Prong 1
The claims recite an abstract idea of both a mental process and mathematical concept.
As an initial matter, the Examiner notes that the instant disclosure describes a math problem, wherein the disclosed invention is described as a mathematical solution to this math problem – see page 1, ¶¶ 3-4: “A combinatorial optimization problem is a problem of selecting a combination most suitable for a purpose from a plurality of combinations. Mathematically, combinatorial optimization problems are attributed to problems for maximizing functions including a plurality of discrete variables, called "objective functions", or minimizing the functions. Although combinatorial optimization problems are common problems in various fields including finance, logistics, transport, design, manufacture, and life science, it is not always possible to calculate an optimal solution due to so-called "combinatorial explosion" that the number of combinations increases in exponential orders of a problem size. In addition, it is difficult to even obtain an approximate solution close to the optimal solution in many cases. Development of a technique for calculating a solution for the combinatorial optimization problem within a practical time is required in order to solve problems in each field and promote social innovation and progress in science and technology” – wherein this disclosure also conveys that such a solution is applicable to a large number of “various fields” (i.e. generally linking to various fields of use, as discussed in MPEP § 2106.05(h)).
See MPEP § 2106.04(a)(2)(I): “The Court’s rationale for identifying these "mathematical concepts" as judicial exceptions is that a ‘‘mathematical formula as such is not accorded the protection of our patent laws,’’ Diehr, 450 U.S. at 191, 209 USPQ at 15 (citing Benson, 409 U.S. 63, 175 USPQ 673), and thus ‘‘the discovery of [a mathematical formula] cannot support a patent unless there is some other inventive concept in its application.’’ Flook, 437 U.S. at 594, 198 USPQ at 199. In the past, the Supreme Court sometimes described mathematical concepts as laws of nature, and at other times described these concepts as judicial exceptions without specifying a particular type of exception. See, e.g., Benson, 409 U.S. at 65, 175 USPQ2d at 674; Flook, 437 U.S. at 589, 198 USPQ2d at 197; Mackay Radio & Telegraph Co. v. Radio Corp. of Am., 306 U.S. 86, 94, 40 USPQ 199, 202 (1939) (‘‘[A] scientific truth, or the mathematical expression of it, is not patentable invention[.]’’)…”; also see MPEP § 2106.04(I): “The Supreme Court’s decisions make it clear that judicial exceptions need not be old or long-prevalent, and that even newly discovered or novel judicial exceptions are still exceptions. For example, the mathematical formula in Flook, the laws of nature in Mayo, and the isolated DNA in Myriad were all novel or newly discovered, but nonetheless were considered by the Supreme Court to be judicial exceptions because they were "‘basic tools of scientific and technological work’ that lie beyond the domain of patent protection." Myriad, 569 U.S. 576, 589, 106 USPQ2d at 1976, 1978 (noting that Myriad discovered the BRCA1 and BRCA1 genes and quoting Mayo, 566 U.S. 71, 101 USPQ2d at 1965); Flook, 437 U.S. at 591-92, 198 USPQ2d at 198 ("the novelty of the mathematical algorithm is not a determining factor at all"); Mayo, 566 U.S. 73-74, 78, 101 USPQ2d 1966, 1968 (noting that the claims embody the researcher's discoveries of laws of nature). The Supreme Court’s cited rationale for considering even "just discovered" judicial exceptions as exceptions stems from the concern that "without this exception, there would be considerable danger that the grant of patents would ‘tie up’ the use of such tools and thereby ‘inhibit future innovation premised upon them.’" Myriad, 569 U.S. at 589, 106 USPQ2d at 1978-79 (quoting Mayo, 566 U.S. at 86, 101 USPQ2d at 1971). See also Myriad, 569 U.S. at 591, 106 USPQ2d at 1979 ("Groundbreaking, innovative, or even brilliant discovery does not by itself satisfy the §101 inquiry."). The Federal Circuit has also applied this principle, for example, when holding a concept of using advertising as an exchange or currency to be an abstract idea, despite the patentee’s arguments that the concept was "new". Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 714-15, 112 USPQ2d 1750, 1753-54 (Fed. Cir. 2014). Cf. Synopsys, Inc. v. Mentor Graphics Corp., 839 F.3d 1138, 1151, 120 USPQ2d 1473, 1483 (Fed. Cir. 2016) ("a new abstract idea is still an abstract idea") (emphasis in original).”
See MPEP § 2106.04: “...In other claims, multiple abstract ideas, which may fall in the same or different groupings, or multiple laws of nature may be recited. In these cases, examiners should not parse the claim. For example, in a claim that includes a series of steps that recite mental steps as well as a mathematical calculation, an examiner should identify the claim as reciting both a mental process and a mathematical concept for Step 2A Prong One to make the analysis clear on the record. “
The mathematical concept recited in claim 1 is:
In the preamble, the intended use of repeatedly update a first vector, which has N first variables as elements, and a second vector, which has N second variables corresponding to the N first variables as elements – and the following limitations:
update L first variables from among the N first variables of the first vector by weighted addition of the corresponding L second variables to the L first variables,
update the second vector, by:
perform a weighting of the L first variables with a first coefficient that monotonically increases or monotonically decreases depending on a number of updates,
add the weighted L first variables to the corresponding L second variables,
calculate a problem term using a plurality of the N first variables,
add the problem term to the L second variables,
calculate a correction term including an inverse number of a distance between the first vector and the searched vector, and
add the correction term to the L second variables,
are a series of math calculations in textual form. To clarify, see instant fig. 6-8 and the accompanying description in the instant disclosure.
wherein the plurality of processing circuits are further configured to perform the updating of at least some of the first vector and at least some of the second vector in parallel. – but for the mere instructions to do it on a computer, this is merely conveying performing at least some of the above discussed math calculations in parallel, e.g. doing two calculations at the same time, which is still merely performing math calculations in textual form.
Under the broadest reasonable interpretation, the claim recites a mathematical concept – the above limitations are steps in a mathematical concept such as mathematical relationships, mathematical formulas or equations, and mathematical calculations. If a claim, under its broadest reasonable interpretation, is directed towards a mathematical concept, then it falls within the Mathematical Concepts grouping of abstract ideas. In addition, as per MPEP § 2106.04(a)(2): “It is important to note that a mathematical concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula." In re Grams, 888 F.2d 835, 837 and n.1, 12 USPQ2d 1824, 1826 and n.1 (Fed. Cir. 1989). See, e.g., SAP America, Inc. v. InvestPic, LLC, 898 F.3d 1161, 1163, 127 USPQ2d 1597, 1599 (Fed. Cir. 2018)”
See MPEP § 2106.04(a)(2).
The mental process recited in claim 1 is:
The above noted limitations in the math concept rejection are recited with such generality that, but for the mere instructions to do it on a computer/in a computer environment, are readily able to be done mentally, or with the use of physical aids (e.g. pen, paper, and/or a calculator). To clarify, it is a mental process, such as a mental process performed by a mathematician with the use of physical aids such as pen, paper, and/or a calculator, as a series of mental evaluations of simple equations, with simple vectors (e.g. 2x1 vectors), with a simple weighting scheme, e.g. a linear scaling term proportional to the number of updates.
With respect to a distance calculation, this is also reasonably simple enough to perform as part of a mental process, e.g. the distance between the vector (2,2) and (2,1) would be 1.
wherein the plurality of processing circuits are further configured to perform the updating of at least some of the first vector and at least some of the second vector in parallel - a mental evaluation, but for the mere instructions to do it on a computer, as a person is readily equipped to perform such a task, whether mentally or with physical aids, e.g. by using matrix math using pen, paper, and/or a calculator (or two calculators, as people typically have two hands to press the solve button on two calculators at once), e.g. representing each vector by a matrix (each matrix having a plurality of elements), and adding the matrices together. Or multiple people would readily be able to do this to be in parallel, e.g. 3 people each doing their own calculations in parallel, e.g. students in a math contest, or a team of engineers working together on a math problem.
In addition, claim 12 adds the following to the abstract idea:
a management server configured to convert a combinatorial optimization problem into a format that can be processed by a plurality of information processing devices - – but for the mere instructions to do it on a computer and/or in a computer environment, a mental process, e.g. a person mentally observing a math problem in the field of combinatorial optimization, and mentally evaluating/judging how to dividing the math problem into a series of smaller math problems to later be solved. E.g., suppose the math problem is what is known in the art as embarrassingly parallel, e.g. a simple calculation, e.g. A+B, is to be performed on a plurality input values for both A and B (e.g. 10 values), i.e. the person is simply tasked with performing the calculation of A+B for 10 values of both A+B. The person simply tabulate the values of A+B, and judges that each row in the table is to be calculated independently, thus being in a format for parallel calculations of each row. When doing this for more complex equations, it is still simple to mentally perform, e.g. mentally observe the equation to be solved, e.g. equation 6, recognize that there are numerous calculations to be performed by the index of “i” with its accompanying summation, mentally evaluate said equation to determine that in the summation over “i” there is no dependence on past or future “i” values (i.e. each summation for each value of “i” is embarrassingly parallel), and then judge to use a different calculator (or different computer) to perform the summation for each value of “i”. In other words, mentally convert eq. 6, using pen and paper, to a series of calculations, wherein for each calculation there is a different “i” value – such as by writing out this summation, and then judging to use a different computer or calculator in parallel to perform each summation, e.g. a sum for i = 1; another for i= 2, and so on.
Under the broadest reasonable interpretation, these limitations are process steps that cover mental processes including an observation, evaluation, judgment or opinion that could be performed in the human mind or with the aid of pencil and paper but for the recitation of a generic computer component. If a claim, under its broadest reasonable interpretation, covers a mental process but for the recitation of generic computer components, then it falls within the "Mental Process" grouping of abstract ideas. A person would readily be able to perform this process either mentally or with the assistance of pen and paper. See MPEP § 2106.04(a)(2).
The mathematical concept is claimed in such a generalized manner that the mathematical concept also encompasses a person mentally performing the math, see MPEP § 2106.04(a)(2) as well, including that for a mental process “Claims can recite a mental process even if they are claimed as being performed on a computer. The Supreme Court recognized this in Benson, determining that a mathematical algorithm for converting binary coded decimal to pure binary within a computer’s shift register was an abstract idea. The Court concluded that the algorithm could be performed purely mentally even though the claimed procedures "can be carried out in existing computers long in use, no new machinery being necessary." 409 U.S at 67, 175 USPQ at 675. “
To clarify, see the USPTO 101 training examples, available at https://www.uspto.gov/patents/laws/examination-policy/subject-matter-eligibility. In particular, with respect to the physical aids, see example # 45, analysis of claim 1 under step 2A prong 1, including: “Note that even if most humans would use a physical aid (e.g., pen and paper, a slide rule, or a calculator) to help them complete the recited calculation, the use of such physical aid does not negate the mental nature of this limitation.”; also see example # 49, analysis of claim 1, under step 2A prong 1: “Moreover, the recited mathematical calculation is simple enough that it can be practically performed in the human mind. Even if most humans would use a physical aid, like a pen and paper or a calculator, to make such calculations, the use of a physical aid would not negate the mental nature of this limitation.”.
With respect to math being simple enough to be performed mentally, see example 45, claim 1, analysis of limitation (b).
As such, the claims recite an abstract idea of both a mental process and mathematical concept.
Step 2A, prong 2
The claimed invention does not recite any additional elements that integrate the judicial exception into a practical application. Refer to MPEP §2106.04(d).
The following limitations are merely reciting the words "apply it" (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f), including the “Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more”:
Claim 1 (and the similar limitations in the other independent claims):
An information processing device configured to repeatedly update a first vector, which has N first variables as elements, and a second vector, which has N second variables corresponding to the N first variables as elements,
the information processing device comprising: a host bus adapter; a shared memory configured to store the N first variables and L second variables from among the N second variables; and a plurality of processing circuits, each of the plurality of processing circuits connected to the shared memory via a bus and configured to:
retrieve the N first variables and the L second variables from the shared memory;
… store the updated first vector in the shared memory as a searched vector, and
… read the searched vector from the shared memory,
wherein the plurality of processing circuits are further configured to perform the updating of at least some of the first vector and at least some of the second vector in parallel, and
wherein the information processing device is configured to transfer the N first variables after updating the first vector via the host bus adapter.
As well as the management server in claim 12 and its associated “transmitting…” feature
The following limitations are also generally linking to a particular field of use/technological environment, as discussed in MPEP § 2106.05(h):
The above noted limitations generally linking this abstract idea to implementation in a particular computer environment are considered as generally linking to a particular technological environment, akin to “Affinity Labs of Texas v. DirecTV, LLC, 838 F.3d 1253, 120 USPQ2d 1201 (Fed. Cir. 2016). In Affinity Labs, the claim recited a broadcast system in which a cellular telephone located outside the range of a regional broadcaster (1) requests and receives network-based content from the broadcaster via a streaming signal, (2) is configured to wirelessly download an application for performing those functions, and (3) contains a display that allows the user to select particular content. 838 F.3d at 1255-56, 120 USPQ2d at 1202. The court identified the claimed concept of providing out-of-region access to regional broadcast content as an abstract idea, and noted that the additional elements limited the wireless delivery of regional broadcast content to cellular telephones (as opposed to any and all electronic devices such as televisions, cable boxes, computers, or the like). 838 F.3d at 1258-59, 120 USPQ2d at 1204. Although the additional elements did limit the use of the abstract idea, the court explained that this type of limitation merely confines the use of the abstract idea to a particular technological environment (cellular telephones) and thus fails to add an inventive concept to the claims. 838 F.3d at 1259, 120 USPQ2d at 1204.” As discussed in MPEP § 2106.05(h)
To clarify on the above, see page 4, ¶ 1 to page 5 ¶ 2 of the instant disclosure: “In addition, the number of calculation servers used for solving the combinatorial optimization problem is not particularly limited. For example, the information processing system may include one calculation server… The calculation server may be a server installed in a data center or a desktop PC installed in an office…. For example, the calculation server may be a general- purpose computer, a dedicated electronic circuit, or a combination thereof.” – see MPEP § 2106.05(b)(I and II): “…It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014)…See, e.g., Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly")” and MPEP § 2106.05(f): “Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015).” – in sum, the instant disclosure conveys that only a single computer, e.g. a server, may be used to implement the abstract idea. The claimed features above are merely generally linking to a particular technical environment wherein more than one computer, and additional generic computer components, are used as a tool to implement the abstract idea instead of a single computer.
Also, page 13: “Therefore, it is also possible to solve the Ising problem using a widely-spread digital computer.”
The following limitations are adding insignificant extra-solution activity to the judicial exception, as discussed in MPEP § 2106.05(g):
The acts of “retrieving…”, “storing…”, “reading…, “transmitting….”, and “transferring…” recited in the independent claims are considered as mere data storage/gathering/transmission.
A claim that integrates a judicial exception into a practical application will apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that the claim is more than a drafting effort designed to monopolize the judicial exception. See MPEP § 2106.04(d).
The claimed invention does not recite any additional elements that integrate the judicial exception into a practical application. Refer to MPEP §2106.04(d).
Step 2B
The claimed invention does not recite any additional elements/limitations that amount to significantly more.
The following limitations are merely reciting the words "apply it" (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f), including the “Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more”:
Claim 1 (and the similar limitations in the other independent claims):
An information processing device configured to repeatedly update a first vector, which has N first variables as elements, and a second vector, which has N second variables corresponding to the N first variables as elements,
the information processing device comprising: a host bus adapter; a shared memory configured to store the N first variables and L second variables from among the N second variables; and a plurality of processing circuits, each of the plurality of processing circuits connected to the shared memory via a bus and configured to:
retrieve the N first variables and the L second variables from the shared memory;
… store the updated first vector in the shared memory as a searched vector, and
… read the searched vector from the shared memory,
wherein the plurality of processing circuits are further configured to perform the updating of at least some of the first vector and at least some of the second vector in parallel, and
wherein the information processing device is configured to transfer the N first variables after updating the first vector via the host bus adapter.
As well as the management server in claim 12 and its associated “transmitting…” feature
The following limitations are also generally linking to a particular field of use/technological environment, as discussed in MPEP § 2106.05(h):
The above noted limitations generally linking this abstract idea to implementation in a particular computer environment are considered as generally linking to a particular technological environment, akin to “Affinity Labs of Texas v. DirecTV, LLC, 838 F.3d 1253, 120 USPQ2d 1201 (Fed. Cir. 2016). In Affinity Labs, the claim recited a broadcast system in which a cellular telephone located outside the range of a regional broadcaster (1) requests and receives network-based content from the broadcaster via a streaming signal, (2) is configured to wirelessly download an application for performing those functions, and (3) contains a display that allows the user to select particular content. 838 F.3d at 1255-56, 120 USPQ2d at 1202. The court identified the claimed concept of providing out-of-region access to regional broadcast content as an abstract idea, and noted that the additional elements limited the wireless delivery of regional broadcast content to cellular telephones (as opposed to any and all electronic devices such as televisions, cable boxes, computers, or the like). 838 F.3d at 1258-59, 120 USPQ2d at 1204. Although the additional elements did limit the use of the abstract idea, the court explained that this type of limitation merely confines the use of the abstract idea to a particular technological environment (cellular telephones) and thus fails to add an inventive concept to the claims. 838 F.3d at 1259, 120 USPQ2d at 1204.” As discussed in MPEP § 2106.05(h)
To clarify on the above, see page 4, ¶ 1 to page 5 ¶ 2 of the instant disclosure: “In addition, the number of calculation servers used for solving the combinatorial optimization problem is not particularly limited. For example, the information processing system may include one calculation server… The calculation server may be a server installed in a data center or a desktop PC installed in an office…. For example, the calculation server may be a general- purpose computer, a dedicated electronic circuit, or a combination thereof.” – see MPEP § 2106.05(b)(I and II): “…It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014)…See, e.g., Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly")” and MPEP § 2106.05(f): “Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015).” – in sum, the instant disclosure conveys that only a single computer, e.g. a server, may be used to implement the abstract idea. The claimed features above are merely generally linking to a particular technical environment wherein more than one computer, and additional generic computer components, are used as a tool to implement the abstract idea instead of a single computer.
Also, page 13: “Therefore, it is also possible to solve the Ising problem using a widely-spread digital computer.”
The following limitations are adding insignificant extra-solution activity to the judicial exception, as discussed in MPEP § 2106.05(g):
The acts of “retrieving…”, “storing…”, “reading…, “transmitting….”, and “transferring…” recited in the independent claims are considered as mere data storage/gathering/transmission.
In addition, the above additional elements are also considered as well-understood, routine, and conventional activities, as discussed in MPEP § 2106.05(d), and for evidence see the following:
See MPEP § 2106.05(d)(II) of: “i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); …iii. Electronic recordkeeping, Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 225, 110 USPQ2d 1984 (2014) (creating and maintaining "shadow accounts"); Ultramercial, 772 F.3d at 716, 112 USPQ2d at 1755 (updating an activity log); iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93;”
The instant disclosure, as noted above, including page 13, last paragraph which discusses this is merely “using a widely-spread digital computer” to solve a math problem
Nvidia, “MPI Solutions for GPUs”, accessed via WayBack Machine, archive Date Feb. 15th, 2019, URL: developer(dot)nvidia(dot)com/mpi-solutions-gpus – “MPI (Message Passing Interface) is a standardized and portable API for communicating data via messages (both point-to-point & collective) between distributed processes. MPI is frequently used in HPC to build applications that can scale on multi-node computer clusters. MPI is fully compatible with CUDA, CUDA Fortran, and OpenACC, all of which are designed for parallel computing on a single computer or node. There are a number of reasons for wanting to combine the complementary parallel programming approaches of MPI & CUDA (/CUDA Fortran/OpenACC): To solve problems with a data size too large to fit into the memory of a single GPU To solve problems that would require unreasonably long compute time on a single node To accelerate an existing MPI application with GPUs To enable a single-node multi-GPU application to scale across multiple nodes Regular MPI implementations pass pointers to host memory, staging GPU buffers through host memory using cudaMemcopy. With CUDA-aware MPI, the MPI library can send and receive GPU buffers directly, without having to first stage them in host memory.”
Lawrence Livermore National Laboratory, “Introduction to Parallel Computing Tutorial”, accessed on July 19th, 2024, URL: hpc(dot)llnl(dot)gov/documentation/tutorials/introduction-parallel-computing-tutorial – see the abstract, see the section “Parallel computing” including: “In the simplest sense, parallel computing is the simultaneous use of multiple compute resources to solve a computational problem:” , see the section “Parallel computers” including: “Virtually all stand-alone computers today are parallel from a hardware perspective… Networks connect multiple stand-alone computers (nodes) to make larger parallel computer clusters. For example, the schematic below shows a typical LLNL parallel computer cluster… The majority of the world's large parallel computers (supercomputers) are clusters of hardware produced by a handful of (mostly) well known vendors…”, see the section “The Future” including: “During the past 20+ years, the trends indicated by ever faster networks, distributed systems, and multi-processor computer architectures (even at the desktop level) clearly show that parallelism is the future of computing.”, the section “Who is using Parallel Computing” including “During the past 20+ years, the trends indicated by ever faster networks, distributed systems, and multi-processor computer architectures (even at the desktop level) clearly show that parallelism is the future of computing… Today, commercial applications provide an equal or greater driving force in the development of faster computers. These applications require the processing of large amounts of data in sophisticated ways… Parallel computing is now being used extensively around the world, in a wide variety of applications….”, see the section “Flynn's Classical Taxonomy” including “There are a number of different ways to classify parallel computers. Examples are available in the references. One of the more widely used classifications, in use since 1966, is called Flynn's Taxonomy.” And see the subsections which detail this, then see the section “General Parallel Computing Terminology” Including “Like everything else, parallel computing has its own jargon. Some of the more commonly used terms associated with parallel computing are listed below. Most of these will be discussed in more detail later… A standalone "computer in a box." Usually comprised of multiple CPUs/processors/cores, memory, network interfaces, etc. Nodes are networked together to comprise a supercomputer… Breaking a task into steps performed by different processor units, with inputs streaming through, much like an assembly line; a type of parallel computing.”, then see the section “Distributed Memory / Message Passing Model” including: “Historically, a variety of message passing libraries have been available since the 1980s. These implementations differed substantially from each other making it difficult for programmers to develop portable applications. In 1992, the MPI Forum was formed with the primary goal of establishing a standard interface for message passing implementations. Part 1 of the Message Passing Interface (MPI) was released in 1994. Part 2 (MPI-2) was released in 1996 and MPI-3 in 2012. All MPI specifications are available on the web... MPI is the "de facto" industry standard for message passing, replacing virtually all other message passing implementations used for production work. MPI implementations exist for virtually all popular parallel computing platforms. Not all implementations include everything in MPI-1, MPI-2 or MPI-3.”
Also, see the section “Shared Memory Model”: “In this programming model, processes/tasks share a common address space, which they read and write to asynchronously…This is perhaps the simplest parallel programming model…An advantage of this model from the programmer's point of view is that the notion of data "ownership" is lacking, so there is no need to specify explicitly the communication of data between tasks. All processes see and have equal access to shared memory. Program development can often be simplified…” then see its bullet points on “implmentations”, then see the section “Threads Model” including the “For example” bullet points
Also, see the section “Data Parallel Model”: “A set of tasks work collectively on the same data structure, however, each task works on a different partition of the same data structure…Tasks perform the same operation on their partition of work,for example, "add 4 to every array element…On shared memory architectures, all tasks may have access to the data structure through global memory.” And its subsection “Implementations” – e.g. see the example “Parallel computing example of processing payroll” figure on page 3 of the PDF of record of LLNL – to clarify, see the terminology section for “Shared Memory”: “Describes a computer architecture where all processors have direct access to common physical memory. In a programming sense, it describes a model where parallel tasks all have the same "picture" of memory and can directly address and accessthe same logical memory locations regardless of where the physical memory actually exists.”
Also, see the section “General Parallel Computing Terminology” Including “Like everything else, parallel computing has its own jargon. Some of the more commonly used terms associated with parallel computing are listed below. Most of these will be discussed in more detail later… A standalone "computer in a box." Usually comprised of multiple CPUs/processors/cores, memory, network interfaces, etc. Nodes are networked together to comprise a supercomputer… Breaking a task into steps performed by different processor units, with inputs streaming through, much like an assembly line; a type of parallel computing
Also, see the section “General Parallel Computing Terminology” for “Communications” for “Parallel tasks typically need to exchange data. There are several ways this can be accomplished, such as through a shared memory bus or over a network.”
Also see section “Parallel Computing” in the Overview for its figure which shows that the problem is converted into a format for processing by each of the parallel processors, e.g. see the “Single Instruction, Multiple Data (SIMD)” subsection in the section “Concepts and Terminology” which visually shows how a math calculation is to be parallelized, and see the subsection “Hybrid Model” on page 24 of the PDF of record: “Another similar and increasingly popular example of a hybrid model is using MPI with CPU-GPU (graphics processingunit) programming. MPI tasks run on CPUs using local memory and communicating with each other over a network. Computationally intensive kernels are off-loaded to GPUs on-node. Data exchange between node-local memory and GPUs uses CUDA (or something equivalent).” – also, see the section” “Partitioning” including its subsections wherein this provides more details on how “One of the first steps in designing a parallel program is to break the problem into discrete "chunks" of work that can be distributed to multiple tasks. This is known as decomposition or partitioning. – then, see the section “Parallel Solution 2: Pool of Tasks” starting on page 38: “Master Process: Holds pool of tasks for worker processes to do …Sends worker a task when requested… Collects results from workers Worker Process: repeatedly does the following… Gets task from master process Performs computation… Sends results to master” – also see the example implementation of this starting on page 40 for the calculation of the value of pi: “Parallel strategy: divide the loop into equal portions that can be executed by the pool of tasks Each task independently performs its work A SPMD model is used One task acts as the master to collect results and compute the value of PI” – include seeing the pseudocode on page 41, including its aggregation and conversion steps of “receive from WORKERS their circle_counts compute PI (use MASTER and WORKER calculations)” – also see the example of the “1-D Wave Equation Parallel Solution” starting on page 43, including the pseudocode on page 44.
Parekh, Ojas, et al. "Benchmarking adiabatic quantum optimization for complex network analysis." arXiv preprint arXiv:1604.00319 (2016). § 6.3 including: “Of course other experts have also managed to creatively and deftly circumvent computing bottlenecks in the form of new paradigms such as massively parallel and cloud computing.”, and then see § 6.3.1 including: “More to the point, the assumption of solving many independent instances is precisely the type “embarrassingly parallel” task that is extremely well suited to current massively parallel classical systems”
Haribara, Yoshitaka. "Realization and Evaluation of Measurement Feedback Coherent Ising Machines for Combinatorial Optimization Problems." U. Tokyo dissertation (2017). Abstract including: “Many research efforts have been made to define the hardness of problems and construct efficient algorithms. In recent trends in semiconductor technologies, Moore’s law is slowing down mainly due to the limitation of micro-fabrication heat dissipation and communication bottleneck problems on a chip. More efforts to boost the processor performance directed to parallelized architectures including GPU, other multi/many-core processors, and neuromorphic hardware. In fact, many computationally heavy tasks such as deep learning and computational science run on GPU clusters or special purpose processors” then see §§ 1.1 and 7.3.1-7.3.2
Ralphs, Ted, et al. "Parallel solvers for mixed integer linear optimization." Handbook of parallel constraint reasoning (2018): 283-336. Section on “Master-Worker” starting on page 25 including: “The Master-Worker paradigm is a well-known and widely used paradigm for many parallel workloads. The basic scheme involves a single Master process that coordinates the efforts of a set of Workers… The Master coordinates distribution of the global collection of subproblem to Worker…” and see page 27 for the pseudocode algorithms
Holmqvist, K., Athanasios Migdalas, and Panos M. Pardalos. "Parallelized heuristics for combinatorial search." Parallel computing in optimization (1997): 269-294. Abstract, then see § 3.1 including: “In one of the more general strategies, the Master-Slave model, the current state is handled by a master processor which distributes this state to the remaining processors, the slaves. The slave processors generate one neighboring solution each and calculate the cost difference. If the new state is accepted, it is forwarded to the master processor, becomes the current state, and is distributed to the slaves…The division strategies are strategies where a fixed number of iterations are performed on each processor independently. When the processors have completed their run all current states are gathered and some selection method is used to select the best. In the next session of independent runs of sequential SAs, this state is used as the starting solution for all processors... Initially the clustering strategies are identical to the division strategies. A number of independent iterations are performed. As the temperature is lowered, fewer new stages are accepted, and two or more processors are clustered together and work together in a master-slave model based SA…”, also see §§ 4.1 and 5.1
Pabolu, Sivakumar V. "A Distributed Simulated Annealing framework for Engineering Optimization." (2003). Abstract, then see chapter 3 ¶ 1: “Several approaches have been taken by researchers to utilize parallelism at various levels of the simulated annealing process [2, 16, 19, 20, 21, 22]. All parallelizing strategies are based on the idea that multiple processors can be used to make concurrent moves in decision space at various degrees of independence from each other.”, then see § 3.1: “In a single search path strategy, a master processor initializes a solution, and disburses it to a number of slave processors. The slave processors each attempt a transition on this solution and report the new solution and change in cost to the master processor. The master processor decides which of these candidate solution transitions to accept and broadcasts the new solution to all the slave processors…”, also see § 3.2.1 including fig. 3.1 and 3.2
Calégari, Patrice Roger. Parallelization of population-based evolutionary algorithms for combinatorial optimization problems. No. 2046. EPFL, 1999. § 2.4.4 starting on page 26, in particular see the subsection “Farmer/worker model” on page 28
Wang, Z. G., et al. "Optimization of multi-pass milling using parallel genetic algorithm and parallel genetic simulated annealing." International Journal of Machine Tools and Manufacture 45.15 (2005): 1726-1734. § 3.2, including the last two paragraphs including: “In the master–slave/coarse-grained PGSA, the host program runs on the master processor, which decides on the global termination criterion. The whole population is equally divided into several sub-populations among the slave processors. Each slave processor runs a sequential GSA independently within its own sub-population on one processor”
Bendjoudi, Ahcene, Nordine Melab, and El-Ghazali Talbi. "An adaptive hierarchical master–worker (AHMW) framework for grids—Application to B&B algorithms." Journal of Parallel and Distributed Computing 72.2 (2012): 120-131. Abstract, then see § 1 including: “Real-world combinatorial optimization problems (COPs) are CPU time-intensive and require a huge amount of computing resources to be solved optimally… High performance computing such as grid-based parallel computing is required… Several applications and frameworks have been developed and adapted to large scale environments using the MW paradigm [4,18]. The MW paradigm consists in defining two entities: a single master and a pool of workers. The master decomposes an initial task into multiple smaller ones and distributes them among the workers. The workers, on their side, perform the execution of the different tasks. After a worker ends its calculation, it sends back the result to the master and asks for a new task. This simple mechanism makes the MW paradigm widely studied and successfully used for many parallel applications. Thus, many of sequential applications can be easily brought to the MW paradigm since all the algorithm control is done by the master. Indeed, users only have to find a way to suitably decompose the problem to be solved, to distribute tasks, to gather results and to terminate the calculation.” – then see § 2.1 including: “In the literature, most of applications developed for large scale environments are based on the MW paradigm…”
The host channel adapter is considered WURC as well, in view of the above evidence, incl. MPEP § 2106.05(d)(II) of: “i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network);” – also see the generic description of this feature on page 11, incl.: “The host bus adapter 35 is, for example, a host channel adaptor (HCA).” – which is WURC given the lack of particularity in the disclosure as the specification preferably omits what is well-known in the art (MPEP 2164.01, ¶ 1), also see:
Voltaire, “Host Channel Adapters (HCAs)”, Copyright 2009, URL: cw(dot)infinibandta(dot)org/files/showcase_product/090726(dot)192240(dot)411(dot)HCA-DS-WEB-052709(dot)pdf – see the Overview section, followed by the description of various products that were commercially available at the time this was published
Liu, Jiuxing, et al. "MPI over InfiniBand: Early experiences." Ohio State University Technical Report (2003). See the abstract, then see § 2 including fig. 1 – in particular, note in figure 1 that each “Host Platform” has a plurality of CPUs using a single shared “Mem [memory]” along with an “HCA” to data transmitting/receiving to/from each “Host Platform” – and this is “a typical system configuration with the InfiniBand Architecture”
The claimed invention is directed towards an abstract idea of both a mathematical concept and a mental process without significantly more.
Regarding the dependent claims
Claim 2 is reciting additional steps in both the mental process and the mathematical concept, but for the mere instructions to implement this abstract idea with a computer and generic computer components, and adding a insignificant extra-solution activities of data storage/retrieval wherein this is also considered WURC in view of the above discussed evidence for the independent claims, including the citation to MPEP § 2106.05(d)(II)
Claim 3 is adding another insignificant extra-solution activity of mere data gathering that is also WURC in view the evidence discussed above for the independent claims
Claim 4 is further limiting the mental process and the mathematical concept, but for the mere instructions to use a generic computer, and generic computer components, as a tool to implement the abstract idea and generally linking to a particular technological environment akin to similar limitations discussed above for the independent claims, and adding a nested insignificant extra-solution activity of data gathering/storage by the recitation of “ a stored…” wherein this is also considered WURC in view of the above discussed evidence for the independent claims
Claim 13 is rejected under a similar rationale
Claim 6 is adding another insignificant extra-solution activity of mere data storage that is considered WURC in view of the evidence discussed above for the similar recitation in the independent claims
Claim 7 recites repeating the updating steps which, as discussed above for the independent claims, is merely repeating the abstract idea and the mental process, wherein this also adds an additional insignificant extra-solution activity of mere data storage and data gathering that are WURC in view of the evidence discussed above for the similar recitation in the independent claims, followed by another step in both the math calculations in textual form and the mental process, but for the mere instructions to perform this step on a computer
Claim 8 is considered as a mental judgement, but for the mere instructions to perform this abstract idea on a computer
Claim 9 recites a mental judgement of a person mentally selecting a vector based on a mental observation of a value of the objective function, but for the mere instructions to use a computer, and generic computer components, as a tool to implement this step, followed by another step in both the math calculations in textual form and the mental process of a mental evaluations such as with the use of physical aids. The vectors being stored in the storage unit is merely nesting an insignificant extra-solution activity of mere data storage that is WURC in view of MPEP § 2106.05(d)(II) as discussed above, incl.: “iii. Electronic recordkeeping, Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 225, 110 USPQ2d 1984 (2014) (creating and maintaining "shadow accounts"); Ultramercial, 772 F.3d at 716, 112 USPQ2d at 1755 (updating an activity log); iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93;”
Claims 10-11 are further limiting the math concept – see page 12 of the instant disclosure to clarify; also see pages 46-48. In addition, should it be found that it is not further limiting the math concept, the Examiner notes that it would then be considered as generally linking to a field of use, wherein this is WURC in view of:
Bian, Zhengbing, et al. "The Ising model: teaching an old problem new tricks." D-wave systems 2 (2010): 1-32. § 2.1, ¶¶ 2-3: “One of the most widely used models in physics is called the Ising model. It was initially proposed in the mid 1920s by Ernst Ising and Wilhelm Lenz as a way to understand how magnetic materials work. The approach modeled a magnetic material as a collection of molecules, each of which has a spin which can align or anti-align with an applied magnetic field, and which interact through a pairwise term with each other [Bru67]…. Over time it was realized that Eq. (1) could be used to model many different physical systems. Any system that describes a set of individual elements (modeled by the spins sj ) interacting via pairwise interactions (the quadratic terms si sj ) can be described in this framework. In the period 1969 to 1997, more than 12,000 papers were published using the Ising model to describe systems in fields ranging from artificial intelligence to zoology.”
Djidjev, Hristo N., et al. "Efficient combinatorial optimization using quantum annealing." arXiv preprint arXiv:1801.08653 (2018). Abstract, then see §§ 1 – 2.2
Chapuis, Guillaume, et al. "Finding maximum cliques on a quantum annealer." Proceedings of the Computing Frontiers Conference. 2017. Abstract, §§ 1, 2.1.1-2.2, 3.1
Vyskocil, Tomas, and Hristo Djidjev. "Simple constraint embedding for quantum annealers." 2018 IEEE International Conference on Rebooting Computing (ICRC). IEEE, 2018. Abstract, §§ I-II
Zahedinejad, Ehsan, and Arman Zaribafiyan. "Combinatorial optimization on gate model quantum computers: A survey." arXiv preprint arXiv:1708.05294 (2017). Abstract, §§ 1-2, including equation 3
Parekh, Ojas, et al. "Benchmarking adiabatic quantum optimization for complex network analysis." arXiv preprint arXiv:1604.00319 (2016). Abstract, Nomenclature page including: “Ising – Classical Ising spin glass problem, which is equivalent to QUBO (Section 1.3)”, then see §§ 1.2-1.3, then §§ 2,-2.1 including fig. 2 on page 25, also fig. 5 on page 34
Venturelli, Davide, et al. "Quantum optimization of fully connected spin glasses." Physical Review X 5.3 (2015): 031040. Abstract, § 1 including: “One tantalizing approach to solve quadratic unconstrained binary optimizations (QUBOs), such as [1,2] in their Ising formulation, is provided by programmable quantum annealing.”
Haribara, Yoshitaka. "Realization and Evaluation of Measurement Feedback Coherent Ising Machines for Combinatorial Optimization Problems." U. Tokyo dissertation (2017). Abstract, §§ 1.4-1.5
Pistoia et al., US 2021/0150400, abstract,, ¶¶ 1-2
Chen et al., US 2020/0401650 - ¶ 155
Hastings, US 2019/0266213, abstract, ¶ 27
Macready, US 2008/0065573, abstract, ¶¶ 137-139
Venturelli et al., US 2019/0087388, abstract, ¶¶ 3-15, 17-26
Claims 18, 20 are considered as part of the mere instructions to apply a computer and generic computer components as a tool to implement the abstract idea; generally linking to a particular technological environment (as opposed to using a single computer with a single process as discussed above for the independent claims); and also considered as insignificant extra-solution activities of mere data gathering/data storage that are WURC in view of the evidence discussed above, including MPEP § 2106.05(d)(II): “i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network)… iii. Electronic recordkeeping, Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 225, 110 USPQ2d 1984 (2014) (creating and maintaining "shadow accounts"); Ultramercial, 772 F.3d at 716, 112 USPQ2d at 1755 (updating an activity log); iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93…” – for additional evidence, see the evidence discussed above for the independent claims, include seeing Lawrence Livermore National Laboratory (also referred to as LLNL), “Introduction to Parallel Computing Tutorial”, accessed on July 19th, 2024, URL: hpc(dot)llnl(dot)gov/documentation/tutorials/introduction-parallel-computing-tutorial - in particular, starting on page 18 of the PDF of record, section “Parallel Computer Memory Architectures”, subsection “Shared Memory”: “Shared memory parallel computers vary widely, but generally have in common the ability for all processors to access all memory as global address space. Multiple processors can operate independently but share the same memory resources. Changes in a memory location effected by one processor are visible to all other processors. Historically, shared memory machines have been classified as UMA and NUMA , based upon memory access times.” – then see the subsections describing both UMA and NUMA architectures, wherein as visibly depicted both have a plurality of processing units (the “CPUs”) that are sharing a single block of memory. Also, in LLNL, see Hybrid Distributed-Shared Memory subsection; see the “Parallel Programming Models” for its discussion of programming techniques using “Shared memory” for parallel processing/computing. Also see:
The above discussed NVIDIA article on “MPI Solutions for GPUs, in particular: “With CUDA-aware MPI, the MPI library can send and receive GPU buffers directly, without having to first stage them in host memory. Implementation of CUDA-aware MPI was simplified by Unified Virtual Addressing (UVA) in CUDA 4.0 – which enables a single address space for all CPU and GPU memory. [example of a shared memory for both CPUs and GPUs]”
Ralphs, Ted, et al. "Parallel solvers for mixed integer linear optimization." Handbook of parallel constraint reasoning (2018): 283-336. Section on “Master-Worker” starting on page 25 including: “The Master-Worker paradigm is a well-known and widely used paradigm for many parallel workloads. The basic scheme involves a single Master process that coordinates the efforts of a set of Workers… The Master coordinates distribution of the global collection of subproblem to Worker…” and see page 27 for the pseudocode algorithms, also see § 3, including page 9 ¶ 1: “For our purposes, the processors can be co-located on a single central processing unit (CPU) and communicate through memory or be located on physically distinct computers, with communication occurring over a network” and page 8 ¶ 1: “Today, there is a wide variety of commercial MILP solving software available, including Xpress [31], Gurobi [43], Cplex [18]. All of them providing a deterministic parallelization for shared memory systems” – and § 3.3.1 incl. ¶¶ 4-6 including: “We generally divide platform into two broad categories: shared memory and distributed memory, though the distinction is not as defined on modern architectures as it was historically. In a shared memory architecture, all processors have access to a common memory and data does not need to be physically moved in order for different cores to make use of it.” And page 22: “MPI: an interface standard and a set of associated libraries for allowing separate processes running either on the same computer or on remotely located computers to communicate with each other either through shared memory or over an associated communication network (the precise conduit depends on the details of the implementation of the MPI library used).” – for relevance, see the instant disclosure, page 47 ¶ 1
Calégari, Patrice Roger. Parallelization of population-based evolutionary algorithms for combinatorial optimization problems. No. 2046. EPFL, 1999. § 2.4.4 starting on page 26, in particular see the subsection “Farmer/worker model” on page 28; also see page 22: “Parallel computers also divide into two categories depending on their memory architecture…Shared memory SM architecture computers have a unique large memory that can be accessed by every PE. Communication between PEs is done through memory accesses by writing and reading information in the common memory. Memory access problems can be solved at two levels….” – and see § 4.1.1 ¶ 2 as well
Claims 21-23 are considered as an abstract idea, but to do it on a computer, wherein at prong 2 and 2B this is considered as generally linking to a particular technological environment; an insignificant extra-solution activity of an insignificant computer implementation nominal/tangential to the primary process of the claimed invention, and part of the mere instructions to invoke a computer and generic computer components as a tool to perform the abstract idea. This is also WURC in view of the below cited evidence. To clarify, this is the abstract idea of load balancing, e.g. suppose a project manager has five engineers working for them performing design calculations, wherein some engineers are slower at doing the calculations then others – the project manager would readily be able to distribute/balance the calculations between the engineers, e.g. tasking the calculations to be performed so that the faster engineers do more calculations, and the slower engineers do less calculations, so as to complete the set of design calculations in a timely manner. This is conventional as well in computer environments, see LLNL as cited above for its section on “Load Balancing”: “Load balancing refers to the practice of distributing approximately equal amounts of work among tasks so that all tasks are kept busy all of the time. It can be considered a minimization of task idle time” then subsection “How to achieve Load Balance”: ”If a heterogeneous mix of machines with varying performance characteristics are being used, be sure to use some type of performance analysis tool to detect any load imbalances. Adjust work accordingly.” and parallel solution two: “If you have a load balance problem (some tasks work faster than others), you may benefit by using a "pool of tasks"scheme.”: “Dynamic load balancing occurs at run time: the faster tasks will get more work to do.”
Ralphs et al., 2018, as cited above – see § 3.2.5 for its subsection “Dynamic Load Balancing”
Bendjoudi et al., 2012, as cited above, § 1 ¶ 2
The claimed invention is directed towards an abstract idea of both a mathematical concept and a mental process without significantly more.
Conclusion
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/David A Hopkins/Primary Examiner, Art Unit 2188
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