DETAILED ACTION
This action is in response to the amendments filed on Dec. 12th, 2025. A summary of this action:
Claims 1-10, 12-14, 16-21 have been presented for examination.
Claims 12-13 and 18-21 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement
Claims 1-10, 12-14, 16-21 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of both a mathematical concept and mental process without significantly more.
Claims not rejected under § 102/103, as no combination of art fairly teaches the particular ordered combination of math calculations recited in the claims (“the updating…to the increase…” including the limitations later recited that further limit these steps).
This action is Final
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments/Amendments
Regarding the § 112(a) Rejection
Updated as necessitated by amendment.
With respect to the remarks for claim 12, as discussing the prior remarks (page 13 of the June 2025 remarks), a machine translation is not sufficient to show that there was a translation issue with the instant disclosure, and to remedy it.
The instant disclosure as filed was accompanied by an inventor oath (Sept. 28th, 2021, wherein the inventor stated, in the oath: “As a below named inventor, I have reviewed and understand the contents of the application…”
MPEP §2304.01: “If no certified translation is in the official record for the application, the examiner must require the applicant to file a certified translation. The applicant should provide the required translation if applicant wants the application to be accorded benefit of the non-English language application. Any showing of priority that relies on a non-English language application is prima facie insufficient if no certified translation of the application is on file.”
37 CFR 1.55(g)(4): “(4) If an English language translation of a non-English language foreign application is required, it must be filed together with a statement that the translation of the certified copy is accurate.”
Thus, without a certification of the machine translation as being a certified translation, it is not sufficient to overcome the instant as filed disclosure, which, in the inventor’s oath, was accompanied by a statement that conveys it was accurate.
See MPEP § 216: “Applicant cannot rely upon the certified copy of the foreign priority application to overcome this rejection because a translation of said application has not been made of record in accordance with 37 CFR 1.55. When an English language translation of a non-English language foreign application is required, the translation must be that of the certified copy (of the foreign application as filed) submitted together with a statement that the translation of the certified copy is accurate. See MPEP §§ 215 and 216.”
The Examiner does note however that should such a certification accompanying the machine translation into the file wrapper, this matter would require only a cursory review to overcome the rejection, in view of what the machine translation states. Furthermore, given that such an certified translation would be to correct both the claims and the disclosure, the Examiner further suggests that such a translation also be used to amend the specification to remove the issue in the as-filed disclosure, which again would only require cursory review.
Both of these would require cursory review because what is alleged about the machine translation does appear to address the rejection, however the required evidence is lacking (the certification accompanying the translation per 37 CFR 115(g)(4)), so the Examiner suggests to include the requisite evidence such as in the after-final process.
MPEP § 2272(II): “It should be kept in mind that a patent owner cannot, as a matter of right, amend any finally rejected claims, add new claims after a final rejection, or reinstate previously canceled claims. For an amendment filed after final rejection and prior to the appeal brief, a showing under 37 CFR 1.116(b) is required and will be evaluated by the examiner for all proposed amendments after final rejection except where an amendment merely cancels claims, adopts examiner’s suggestions, removes issues for appeal, or in some other way requires only a cursory review by the examiner.”
With respect to the remarks for claims 18-21, see the rejection which cited to this paragraph, and noted it did not describe with “sufficient[] particularity” what is claimed.
Page 42, ¶ 1 conveys that “However, the number of variables of the first vector and the second vector to be calculated may be different depending on the processor. For example, in a case where there is a performance difference depending on a processor implemented in a calculation server, the number of variables to be calculated can be determined depending on the performance of the processor”
Note: it merely states “the number of variables of the first vector and second vector” and only for the calculations of these variables.
The claim recites “information processing device” not the processor. The claim further recites “wherein the number of N first variables retrieved by each of the processing circuits is the same, and the number of L second variables retrieved by each of the processing circuits”
Furthermore, independent claims require: “retrieve the N first variables and the L second variables from the shared memory,” and several other steps to be performed for “each of the processing circuits is configured to:”.
At issue is that the disclosure at page 42, ¶ 1, taken in view of the paragraph at the bottom of page 41, point to only a few of the specific calculations of the variables themselves being done based performance of the processor.
This is not what the claim requires, rather the claims are modifying the number of variables retrieved act, and every later step/calculation. Such a combination is not sufficiently described for their particularity, given what pages 41-42 disclose on this feature.
To further clarify, page 42, ¶ 2: “Values of all the components of the first vector (x1, x2, ···, XN) are required in order to update the value of the variable Yi…Therefore, the values of all the components of the first vector (x1, x2, • ··, XN) can be shared by the Q processors using the Allgather function. Although it is necessary to share the values between the processors regarding the first vector”
Followed by the steps such as “calculates a value of the problem term” (page 42, second to last paragraph.
Regarding the § 101 Rejection
Maintained.
With respect to the prong 1 remarks, the generic computer elements pointed to (bolding in the claims in the remarks) were not considered as part of the abstract idea itself.
As to the additional elements, see MPEP § 2106.04(a)(2)(III)(C): “The Supreme Court recognized this in Benson, determining that a mathematical algorithm for converting binary coded decimal to pure binary within a computer’s shift register was an abstract idea. The Court concluded that the algorithm could be performed purely mentally even though the claimed procedures "can be carried out in existing computers long in use, no new machinery being necessary." 409 U.S at 67, 175 USPQ at 675.”
See SAP America, Inc. v. InvestPic, LLC, 898 F.3d 1161, 1163, 127 USPQ2d 1597, 1599 (Fed. Cir. 2018) for its discussion of the parallel processing in claim 22.
See MPEP § 2106.04(d): “Gottschalk v. Benson ‘‘held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle’’).”
To further clarify, see “i. Performing clinical tests on individuals to obtain input for an equation, In re Grams, 888 F.2d 835, 839-40; 12 USPQ2d 1824, 1827-28 (Fed. Cir. 1989);” per MPEP § 2106.05(g), wherein in the opinion:
“As stated in In re Christensen, 478 F.2d 1392, 1394, 178 USPQ 35, 37-38 (CCPA 1973): Given that the method of solving a mathematical equation may not be the subject of patent protection, it follows that the addition of the old and necessary antecedent steps of establishing values for the variables in the equation cannot convert the unpatentable method to patentable subject matter.5 Accord In re Chatfield, 545 F.2d 152, 158, 191 USPQ 730, 736 (CCPA 1976), cert. denied, 434 U.S. 875, 98 S.Ct. 226, 54 L.Ed.2d 155 (1977). The reason for this was explained in In re Sarkar, 588 F.2d at 1335, 200 USPQ at 139: No mathematical equation can be used, as a practical matter, without establishing and substituting values for the variables expressed therein. Substitution of values dictated by the formula has thus been viewed as a form of mathematical step. If the steps of gathering and substituting values were alone sufficient, every mathematical equation, formula, or algorithm having any practical use would be per se subject to patenting as a "process" under § 101. Consideration of whether the substitution of specific values is enough to convert the disembodied ideas present in the formula into an embodiment of those ideas, or into an application of the formula, is foreclosed by the current state of the law. [*840] See also In re Richman, 563 F.2d 1026, 1030, 195 USPQ 340, 343 (CCPA 1977) ("[N]otwithstanding that the antecedent steps are novel and unobvious, they merely determine values for the variables used in the mathematical formulae used in making the calculations. [They] do not suffice to render the claimed methods, considered as a whole, statutory subject matter."). Accord In re Meyer, 688 F.2d 789, 794, 215 USPQ 193, 197 (CCPA 1982) ("[data-gathering]”)
See MPEP § 2106.05(b)(II): “Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly")”
Then see the rejection, including its discussion of the additional elements, including its citation to the disclosure which clarify a generic computer may also be used to perform this math concept.
Note: the “retrieving…”, per the rejection, was also considered an additional element of mere data gathering, as “CyberSource v. Retail Decisions, 654 F.3d 1366, 1370, 99 USPQ2d 1690 (Fed. Cir. 2011) (citations omitted) ("[N]othing in claim 3 requires an infringer to use the Internet to obtain that data. The Internet is merely described as the source of the data. We have held that mere ‘[data-gathering] step[s] cannot make an otherwise nonstatutory claim statutory.’" 654 F.3d at 1375, 99 USPQ2d at 1694 (citation omitted))” (MPEP § 2106.05(b)(III).
With respect to claims 18-21, see the rejection for clarity on the detailed rationale relied upon for this rejection, as the remarks are not addressing it.
With respect to prong 2, and Ex parte Desjardins, the Examiner respectfully disagrees. The claim is not directed to machine learning technology, so Ex parte Desjardin is not reasonably analogous. Analogous case law was cited above, and in the rejection.
The alleged improvement is merely faster math calculations, and no such particular computer is even required by the disclosure to implement the invention. Page 5: “The calculation server may be a server installed in a data center or a desktop PC installed in an office” – wherein this is singular.
There is no improvement to computing technology itself, e.g. a new architecture for a supercomputer, and even if there was it would not be a practical application of the abstract idea of the math itself, but rather would have to be considered at 2B for significantly more. MPEP § 2106.05(I): “Alice Corp., 573 U.S. at 21-18, 110 USPQ2d at 1981 (citing Mayo, 566 U.S. at 78, 101 USPQ2d at 1968 (after determining that a claim is directed to a judicial exception, "we then ask, ‘[w]hat else is there in the claims before us?") (emphasis added)); RecogniCorp, LLC v. Nintendo Co., 855 F.3d 1322, 1327, 122 USPQ2d 1377 (Fed. Cir. 2017)”
MPEP § 2106.04(a)(2)(III)(C): “The Supreme Court recognized this in Benson, determining that a mathematical algorithm for converting binary coded decimal to pure binary within a computer’s shift register was an abstract idea. The Court concluded that the algorithm could be performed purely mentally even though the claimed procedures "can be carried out in existing computers long in use, no new machinery being necessary." 409 U.S at 67, 175 USPQ at 675.” See MPEP § 2106.04(d): “Gottschalk v. Benson ‘‘held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle’’).” – emphasis by the Examiner on “new” and “existing”, i.e. this is a 2B question of whether or not, for a claim directed to a math concept, the machinery used to perform the math calculations/implement the math concept is “new” or “existing”, i.e. conventional, or unconventional. For: “Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly" in MPEP § 2106.05(b)(II).
And the specification discloses, as cited in the rejection, such machinery as claimed is not required to perform the claim method, i.e. does NOT “play a significant part in permitting the claimed method to be performed”.
For claims 18-21, these do not address the rationale relied upon in the rejection, and also see the above discussion.
With respect to the 2B remarks, these are not responsive to the rationale of the rejection for they allege unconventionality but do not address the WURC evidence of record (to clarify, this is akin to generally alleging something is nonobvious in view of § 103, without addressing the evidence relied upon to make the § 103 rejection, as the WURC consideration is similarly a question of evidence/fact), and alleges that the novelty of the math concept matters (MPEP § 2106.04(I) for Flook, 437 U.S. at 591-92, 198 USPQ2d at 198 ("the novelty of the mathematical algorithm is not a determining factor at all")). To clarify further, MPEP § 2106.04(I): “Alice Corp., 573 U.S. at 216, 110 USPQ2d at 1980. The Court has held that a claim may not preempt abstract ideas, laws of nature, or natural phenomena, even if the judicial exception is narrow (e.g., a particular mathematical formula such as the Arrhenius equation). See, e.g., Mayo, 566 U.S. at 79-80, 86-87, 101 USPQ2d at 1968-69, 1971 (claims directed to "narrow laws that may have limited applications" held ineligible); Flook, 437 U.S. at 589-90, 198 USPQ at 197 (claims that did not "wholly preempt the mathematical formula" held ineligible). This is because such a patent would "in practical effect [] be a patent on the [abstract idea, law of nature or natural phenomenon] itself." Benson, 409 U.S. at 71- 72, 175 USPQ at 676. The concern over preemption was expressed as early as 1852. See Le Roy v. Tatham, 55 U.S. (14 How.) 156, 175 (1852) ("A principle, in the abstract, is a fundamental truth; an original cause; a motive; these cannot be patented, as no one can claim in either of them an exclusive right.")”
To clarify, the 2B WURC analysis does not include the abstract idea, as these remarks imply. See BSG Tech LLC v. Buyseasons, Inc., 899 F.3d 1281, 1287-88, 127 USPQ2d 1688, 1693-94 (Fed. Cir. 2018), such as cited to in MPEP § 2106.05(a)(I), in the opinion: “It has been clear since Alice that a claimed invention’s use of the ineligible concept to which it is directed cannot supply the inventive concept that renders the invention “significantly more” than that ineligible concept… After determining that those claims were directed to the abstract idea of intermediated settlement, the Court considered whether the recitation of a generic computer added “significantly more” to the claims. Id. at 2357. Critically, the Court did not consider whether it was well-understood, routine, and conventional to execute the claimed intermediated settlement method on a generic computer. Instead, the Court only assessed whether the claim limitations other than the invention’s use of the ineligible concept to which it was directed were well-understood, routine and conventional. Id. at 2359–60.”
To further clarify on this, OPTIS CELLULAR TECHNOLOGY, LLC v. Apple Inc., 139 F. 4th 1363(Fed. Cir. 2025), footnote 11, citing to and quoting BSG (emphasis by Examiner): “If on remand the district court chooses to have the jury decide whether what Optis alleges is the inventive concept is well-understood, routine, and conventional, then the jury should be instructed what the abstract idea is (i.e., a mathematical formula) and that the abstract idea cannot contribute to the inventive concept. “[T]he relevant inquiry is not whether the claimed invention as a whole is unconventional or non-routine,” but “whether the claim limitations other than the invention’s use of the ineligible concept to which it was directed were well-understood, routine and conventional.” BSG Tech LLC v. Buyseasons, Inc., 899 F.3d 1281, 1290 (Fed. Cir. 2018).”
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 12-13 and 18-21 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The dependent claims inherit the deficiencies of the claims they depend upon.
Claim 12 recites: The information processing device according to claim 1, wherein each one of the processing circuits is further configured to calculate a solution by converting the first variables that are positive values into +1 and converting the first variables that are negative values into -1.
This is not sufficiently described. See pages 33-34: “…In step S152, the solution vector can be obtained, for example, in the first vector by converting the variable Xi which is the positive value into + 1 and the variable Xi which is the negative value into -1…” and page 16, ¶ 2: “In the case of calculating the time evolution, a solution vector having the spin Si as an element can be obtained by converting the variable Xi which is a positive value into +1 and the variable Xi which is a negative value into -1 in the first vector when the value of the coefficient p(t) exceeds a predetermined 10 value.” – also see page 19 ¶ 1, page 25 ¶ 1, page 30, ¶ 2. The instant disclosure only discloses what was originally claimed, i.e. there is a singular first variable which simultaneously is somehow both a “positive value” and a “negative value”, which is indefinite because it is either a “positive value” or a “negative value” (positive being greater than zero, negative being less than zero).
As such, the instant disclose does not sufficiently describe what is presently claimed.
Claims 18-21 recite:
The information processing device according to claim 1, wherein the number of N first variables retrieved by each of the processing circuits is the same, and the number of L second variables retrieved by each of the processing circuits is determined based upon the performance of the information processing device.
See MPEP 2163(II)(A): "For example, in Hyatt v. Dudas, 492 F.3d 1365, 1371, 83 USPQ2d 1373, 1376-1377 (Fed. Cir. 2007), the examiner made a prima facie case by clearly and specifically explaining why applicant’s specification did not support the particular claimed combination of elements, even though applicant’s specification listed each and every element in the claimed combination. The court found the "examiner was explicit that while each element may be individually described in the specification, the deficiency was lack of adequate description of their combination" and, thus, "[t]he burden was then properly shifted to [inventor] to cite to the examiner where adequate written description could be found or to make an amendment to address the deficiency.""
Also, see MPEP 2163(I) for Lockwood v. Amer. Airlines, Inc., 107 F.3d 1565, 1572, 41 USPQ2d 1961, 1966 (Fed. Cir. 1997).
See page 42, ¶ 1: “However, the number of variables of the first vector and the second vector to be calculated may be different depending on the processor. For example, in a case where there is a performance difference depending on a processor implemented in a calculation server, the number of variables to be calculated can be determined depending on the performance of the processor.” – this does not describe with sufficiently particularity what is presently claimed.
For further clarity, note page 42, ¶ 1 discusses only the calculation step of those variables, per page 41, last paragraph for its calculations.
The present claims, in ordered combination, are not just further limiting that step alone, but rather the ordered combination as a whole as “each of the processing circuits is configured to:” to perform several steps as recited in the claims, and claim 21 is limiting the retrieval step itself not the calculation.
This ordered combination is not sufficiently described with the requisite particularity. Page 42, ¶ 2 further clarifies: “Although it is necessary to share the values between the processors regarding the first vector”.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-10, 12-14, 16-21 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of both a mathematical concept and mental process without significantly more.
Step 1
Claim 16 is directed towards the statutory category of a process.
Claim 1, 14 is directed towards the statutory category of an apparatus.
Claim 17 is directed towards the statutory category of an article of manufacture.
Claims 14, 16 and 17 the dependents thereof, are rejected under a similar rationale as representative claim 1, and the dependents thereof.
Step 2A – Prong 1
The claims recite an abstract idea of both a mental process and mathematical concept.
See MPEP § 2106.04: “...In other claims, multiple abstract ideas, which may fall in the same or different groupings, or multiple laws of nature may be recited. In these cases, examiners should not parse the claim. For example, in a claim that includes a series of steps that recite mental steps as well as a mathematical calculation, an examiner should identify the claim as reciting both a mental process and a mathematical concept for Step 2A Prong One to make the analysis clear on the record. “
The mathematical concept recited in claim 1 is:
update L first variables from among the N first variables based on the L second variables corresponding to the L first variables, weight the L first variables with a first coefficient and add the weighted L first variables to the corresponding L second variables, - mathematical calculations/equations/relationships in textual form. See fig. 6, # S104, as discussed on page 18: “Next, the calculation server updates the first vector by performing weighted addition on the element Yi of the second vector corresponding to the element Xi of the first vector (step S104 )…” and see the equations used for this step, also see figures 10-12 for their “update” steps and the corresponding descriptions in the disclosure
calculate a problem term using the N first variables, - math calculations in textual form. See page 22, equation 10, as described: “In (9), a term of the following [equation] (10) is derived from the Ising energy. Since a format of this term is determined depending on a problem to be solved, the term is referred to as a problem term.”, also pages 37-38: “…The problem term Zi of (21) takes a format in which the second expression of (20) is partially differentiated with respect to any variable Xi (element of the first vector…The problem terms described above are merely examples of a problem term that can be used by the information processing device according to the present embodiment. Therefore, a format of the problem term used in the calculation may be different from these”, page 40: “In the algorithm of (23), a continuous variable x is used in 5 the problem term instead of a discrete variable”
add the problem term to the L second variables, calculate a first correction term including a first product of a constraint term and a second coefficient, add the first correction term to the L second variables- math calculations/equations/relationships in textual form. See the above citations, including page 22: “On the other hand, the following term (11) in (9) corresponds to a first correction term of the variable Yi…Formula 11…“
and increase absolute values of the first coefficient and the second coefficient depending on a number of updates, merely performing the above calculations repetitively with a recitation of a desired result (i.e. that the calculations result in the absolute values being increased as the calculations are updated/repeated), in addition this can also be considered as a math calculation on its own as it does not specify what the update is (e.g. adding a value to the absolute values for each update). See page 15: “Values of the variables Xi and Yi (i = 1, 2, • ··, N) can be repeatedly updated to obtain the spin Si (i = 1, 2, ···, N) of the Ising model by calculating the time evolution of the simulated bifurcation algorithm. That is, when the time evolution is calculated, a value of the element of the first vector and a value of the element of the second vector are repeatedly updated… When the time evolution of the simulated bifurcation algorithm is calculated, a value of the coefficient p(t) monotonically increases depending 25 on the number of updates…”, page 21, “In Formula (6), c9(t) is a coefficient that monotonically increases depending on the number of updates, for example”, page 23: “When the coefficient c9 (t) defined in (12) is used, a value of the correction term of (11) increases depending on the number of updates.”, page 28: “When the constraint condition is not satisfied, a value of gm is relatively large. Therefore, an increase rate of the coefficient Am of a Lagrange term of (17) becomes high in a period in which the constraint condition is not satisfied”, fig. 11 as discussed on pages 31-32.
the constraint term is based on a constraint function representing a plurality of constraint conditions and has the first variables as an argument,- – part of the math calculations/relationships/equations in textual form. Page 20: “Here, gm(x1, x2, • • ·, XN) (m = 1, 2 • • ·, M) represents a function (constraint function) expressing each of M constraint conditions.” Page 23: “The processing circuit of the information processing device 30 may be configured to calculate a function (constraint term) including a product of a constraint function and a derivative obtained by differentiating the constraint function with respect to any element (first variable) of the first vector.” See eq. 6-11, as discussed on page 24: “Here, the above-described function gm is an example of the constraint function”
update at least a part of the first vector and at least a part of the second vector in parallel – math calculations in textual form, see the above discussion of the updating steps, then see page 4 ¶ 3: “…may share and execute some steps of calculation processes, or may execute similar calculation processes for different variables in parallel…” – to clarify, see pages 9-10, the paragraph split between the pages, and page 19, ¶¶ 3-4, and page 44, ¶ 4: “The GPUs can calculate the product of the tensor … necessary to update the variable Yi and the first vector (x1, x2, • ··, XN) in parallel” – i.e. this is merely reciting to perform math calculations in parallel
To clarify, as described in the instant disclosure: “A combinatorial optimization problem is a problem of selecting a combination most suitable for a purpose from a plurality of combinations. Mathematically, combinatorial optimization problems are attributed to problems for maximizing functions including a plurality of discrete variables, called "objective functions", or minimizing the functions. …Development of a technique for calculating a solution for the combinatorial optimization problem within a practical time is required in order to solve problems in each field and promote social innovation and progress in science and technology” (page 1, ¶¶ 2-3), i.e. a mathematical solution to a mathematical problem.
To clarify, see MPEP § 2106.04(i): “The Supreme Court’s decisions make it clear that judicial exceptions need not be old or long-prevalent, and that even newly discovered or novel judicial exceptions are still exceptions. For example, the mathematical formula in Flook, the laws of nature in Mayo, and the isolated DNA in Myriad were all novel or newly discovered, but nonetheless were considered by the Supreme Court to be judicial exceptions because they were "‘basic tools of scientific and technological work’ that lie beyond the domain of patent protection." Myriad, 569 U.S. 576, 589, 106 USPQ2d at 1976, 1978 (noting that Myriad discovered the BRCA1 and BRCA1 genes and quoting Mayo, 566 U.S. 71, 101 USPQ2d at 1965); Flook, 437 U.S. at 591-92, 198 USPQ2d at 198 ("the novelty of the mathematical algorithm is not a determining factor at all"); Mayo, 566 U.S. 73-74, 78, 101 USPQ2d 1966, 1968 (noting that the claims embody the researcher's discoveries of laws of nature). The Supreme Court’s cited rationale for considering even "just discovered" judicial exceptions as exceptions stems from the concern that "without this exception, there would be considerable danger that the grant of patents would ‘tie up’ the use of such tools and thereby ‘inhibit future innovation premised upon them.’" Myriad, 569 U.S. at 589, 106 USPQ2d at 1978-79 (quoting Mayo, 566 U.S. at 86, 101 USPQ2d at 1971). See also Myriad, 569 U.S. at 591, 106 USPQ2d at 1979 ("Groundbreaking, innovative, or even brilliant discovery does not by itself satisfy the §101 inquiry."). The Federal Circuit has also applied this principle, for example, when holding a concept of using advertising as an exchange or currency to be an abstract idea, despite the patentee’s arguments that the concept was "new". Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 714-15, 112 USPQ2d 1750, 1753-54 (Fed. Cir. 2014). Cf. Synopsys, Inc. v. Mentor Graphics Corp., 839 F.3d 1138, 1151, 120 USPQ2d 1473, 1483 (Fed. Cir. 2016) ("a new abstract idea is still an abstract idea") (emphasis in original).”
In addition, claim 14 adds the following steps to the math concept:
aggregate the calculation results, and convert the aggregated calculation result into a solution of the combinatorial optimization problem – math calculations/relationships/equations in textual form, akin to “iv. organizing information and manipulating information through mathematical correlations, Digitech Image Techs., LLC v. Electronics for Imaging, Inc., 758 F.3d 1344, 1350, 111 USPQ2d 1717, 1721 (Fed. Cir. 2014). The patentee in Digitech claimed methods of generating first and second data by taking existing information, manipulating the data using mathematical functions, and organizing this information into a new form. The court explained that such claims were directed to an abstract idea because they described a process of organizing information through mathematical correlations, like Flook's method of calculating using a mathematical formula. 758 F.3d at 1350, 111 USPQ2d at 1721.” As discussed in MPEP § 2106.04(a)(2)(I)(A)
To clarify, these limitations are merely aggregating the results of the prior math calculations, and the organizing/converting them into a mathematical solution to a mathematical problem (“the combinatorial optimization problem”). Page 4, ¶ 3: “…In this manner, the user can obtain the solution to the combinatorial optimization problem. It is assumed that the solution of the combinatorial optimization problem includes an optimal solution and an approximate solution close to the optimal solution.” And page 1, ¶ 3: “…Mathematically, combinatorial optimization problems are attributed to problems for maximizing functions including a plurality of discrete variables, called "objective functions", or minimizing the functions….”
Under the broadest reasonable interpretation, the claim recites a mathematical concept – the above limitations are steps in a mathematical concept such as mathematical relationships, mathematical formulas or equations, and mathematical calculations. If a claim, under its broadest reasonable interpretation, is directed towards a mathematical concept, then it falls within the Mathematical Concepts grouping of abstract ideas. In addition, as per MPEP § 2106.04(a)(2): “It is important to note that a mathematical concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula." In re Grams, 888 F.2d 835, 837 and n.1, 12 USPQ2d 1824, 1826 and n.1 (Fed. Cir. 1989). See, e.g., SAP America, Inc. v. InvestPic, LLC, 898 F.3d 1161, 1163, 127 USPQ2d 1597, 1599 (Fed. Cir. 2018)”
See MPEP § 2106.04(a)(2).
The mental process recited in claim 1 is:
update L first variables from among the N first variables based on the L second variables corresponding to the L first variables, weight the L first variables with a first coefficient and add the weighted L first variables to the corresponding L second variables, calculate a problem term using the N first variables, add the problem term to the L second variables, calculate a first correction term including a first product of a constraint term and a second coefficient, add the first correction term to the L second variables, and increase absolute values of the first coefficient and the second coefficient depending on a number of updates, the constraint term is based on a constraint function representing a plurality of constraint conditions and has the first variables as an argument,… update at least a part of the first vector and at least a part of the second vector in parallel. – a mental process, but for the mere instructions to do it on a computer, given the generality recited in the claims, as the claims do not limit this process to any particular set of mathematical equations to complex to preclude mental evaluation, such as one with physical aids of pen, paper, and/or a calculator (or, to do calculations in parallel, simply use two side-by-side calculators, or use a computer as a tool to perform parallel calculations; the claim recites with no particular how the parallel calculations are performed in any particular technological manner that removes this step from the realm of abstract ideas, but for the mere instructions to do it on a computer). As a second example, the parallel processing may readily be performed mentally by two or more people working in parallel using physical aids.
For example, a person, such as an engineer, would readily be able to perform this mental process such as with the use of physical aids like pen, paper, and/or a calculator.
The person would readily be able to update a first variable based on the second variable, such as by a mental judgment/opinion being rendered, or by mentally evaluating the second variable with pen and paper and simple formulas, e.g. let A be the first variable, B be the second variable, and let C1 be a first coefficient, a person would readily be able to evaluate A(updated) = A(old)*C1 +B (e.g. y=mx+b which is the formula for representing a line in x-y coordinates).
They would then readily be able to perform a math calculation using a plurality of the first variables, e.g. A(updated) + A(old) = problem term, such as by a mental evaluation with pen and paper, and then mentally add it to the second variable, i.e. problem term + B, and mentally perform further evaluations using simple formulas, e.g. calculate, with pen and paper to aid a mental evaluation, Correction term = Constraint*C2 (C2 being a second coefficient), etc.
The present claims do not recite with any specificity what the calculations are (i.e. what the math equations/relationships used in the calculations are), as such a person would readily be able to use simple equations with a series of mental evaluations and judgements, such as aided by pen, paper, and/or a calculator/slide rule, to perform the steps of this claimed invention, but for the mere instructions to use a computer to perform these calculations (MPEP § 2106.04(a)(III)(C): “Claims can recite a mental process even if they are claimed as being performed on a computer. The Supreme Court recognized this in Benson, determining that a mathematical algorithm for converting binary coded decimal to pure binary within a computer’s shift register was an abstract idea. The Court concluded that the algorithm could be performed purely mentally even though the claimed procedures "can be carried out in existing computers long in use, no new machinery being necessary." 409 U.S at 67, 175 USPQ at 675. See also Mortgage Grader, 811 F.3d at 1324, 117 USPQ2d at 1699”; MPEP § 2106.05(f): “Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015).”)
In addition, claim 14 adds the following steps to the mental process:
a management server configured to convert a combinatorial optimization problem into a format that can be processed by a plurality of information processing devices – but for the mere instructions to do it on a computer, a mental process, e.g. a person mentally observing a math problem in the field of combinatorial optimization, and mentally evaluating/judging how to dividing the math problem into a series of smaller math problems to later be solved. E.g., suppose the math problem is what is known in the art as embarrassingly parallel, e.g. a simple calculation, e.g. A+B, is to be performed on a plurality input values for both A and B (e.g. 10 values), i.e. the person is simply tasked with performing the calculation of A+B for 10 values of both A+B. The person simply tabulate the values of A+B, and judges that each row in the table is to be calculated independently, thus being in a format for parallel calculations of each row. When doing this for more complex equations, it is still simple to mentally perform, e.g. mentally observe the equation to be solved, e.g. equation 6, recognize that there are numerous calculations to be performed by the index of “i” with its accompanying summation, mentally evaluate said equation to determine that in the summation over “i” there is no dependence on past or future “i” values (i.e. each summation for each value of “i” is embarrassingly parallel), and then judge to use a different calculator (or different computer) to perform the summation for each value of “i”. In other words, mentally convert eq. 6, using pen and paper, to a series of calculations, wherein for each calculation there is a different “i” value – such as by writing out this summation, and then judging to use a different computer or calculator in parallel to perform each summation, e.g. a sum for i = 1; another for i= 2, and so on.
A person would readily be able to also mentally judge how to further subdivide the eq. 6, or similar such equations (e.g. 19), for parallel processing – e.g. mentally observing a similar independence of the calculations on the “j” and “m” indices, and thus mentally judging that a separate computer, or calculator, may be used for each calculation of each respective triplet of values of i, j, and m. This step does not require the actual calculation, but merely a mental judgement of how to break down a math problem into a series of smaller math problems for later calculation.
aggregate the calculation results, and convert the aggregated calculation result into a solution of the combinatorial optimization problem – a mental process, given the high level of generality recited herein, but for the mere instructions to do it on a computer, akin to “a claim to "collecting information, analyzing it, and displaying certain results of the collection and analysis," where the data analysis steps are recited at a high level of generality such that they could practically be performed in the human mind, Electric Power Group v. Alstom, S.A., 830 F.3d 1350, 1353-54, 119 USPQ2d 1739, 1741-42 (Fed. Cir. 2016);” as discussed in MPEP § 2106.04(a)(2)(III)(A).
For example, a person may readily observe results from a series of calculations, e.g. one the displays of computers or calculators, or on paper, and aggregate these results, e.g. by writing down the results in a tabular form, and mentally perform the conversion process, e.g. by summing along the rows and columns of the pen and paper table, such as aided by a calculator. Neither the claims nor the instant disclosure (page 4, ¶ 3; page 6, ¶ 1) provide any great detail on how these steps are performed in a technological manner, rather, they are discussed with such generality that it is merely a mental process with mere instructions to do it on a computer and with generic computer components.
Under the broadest reasonable interpretation, these limitations are process steps that cover mental processes including an observation, evaluation, judgment or opinion that could be performed in the human mind or with the aid of pencil and paper but for the recitation of a generic computer component. If a claim, under its broadest reasonable interpretation, covers a mental process but for the recitation of generic computer components, then it falls within the "Mental Process" grouping of abstract ideas. A person would readily be able to perform this process either mentally or with the assistance of pen and paper. See MPEP § 2106.04(a)(2).
As such, the claims recite an abstract idea of both a mental process and mathematical concept.
Step 2A, prong 2
The claimed invention does not recite any additional elements that integrate the judicial exception into a practical application. Refer to MPEP §2106.04(d).
The following limitations are merely reciting the words "apply it" (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f), including the “Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more”:
Claim 1 - An information processing device comprising: a host bus adapter; a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being_ connected to the shared memory via a bus, wherein: each of the processing circuits is configured to;… retrieve the N first variables and the L second variables from the shared memory, and the information processing device is configured to transfer the N first variables after the update via the host bus adapter - and the similar recitations in the other independent claims - see page 6, ¶ 2 of the instant disclosure which describes the use of generic “storage”, e.g. “The storage unit 14 may be a volatile memory, a non-volatile memory, or a combination thereof. Examples of the volatile memory include a DRAM and an SRAM. Examples of the non-volatile 20 memory include a NANO flash memory, a NOR flash memory, a ReRAM, or an MRAM. In addition, a hard disk, an optical disk, a magnetic tape, or an external storage device may be used as the storage unit 14.”, and see pages 3-4 which describe the use of generic computers to perform the abstract idea, e.g. “servers” with “processors”. Also, see page 36, ¶ 1: “Further, a storage medium may be a non-transitory computer-readable storage medium that stores the program”, and see figures 1-4. And page 8, ¶ 3: “The shared memory 32 is a memory accessible 25 from the processors 33A to 33D. Examples of the shared memory 32 include a volatile memory such as a DRAM and an SRAM.” And page 11 ¶ 2: “The host bus adapter 35 implements data communication between the calculation servers. The host bus adapter 35 is connected to the switch 5 via the cable 4a. The host bus adapter 35 is, for example, a host channel adaptor (HCA).” – i.e. the specification merely conveys the use of off-the-shelf generic computer components. As a further point of clarity, MPEP § 2106.04(d): “The Supreme Court has long distinguished between principles themselves (which are not patent eligible) and the integration of those principles into practical applications (which are patent eligible). See, e.g., Mayo Collaborative Servs. v. Prometheus Labs., Inc., 566 U.S. 66, 80, 84, 101 USPQ2d 1961, 1968-69, 1970 (2012) (noting that the Court in Diamond v. Diehr found ‘‘the overall process patent eligible because of the way the additional steps of the process integrated the equation into the process as a whole,’’ but the Court in Gottschalk v. Benson ‘‘held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle’’). Similarly, in a growing body of decisions, the Federal Circuit has distinguished between claims that are ‘‘directed to’’ a judicial exception (which require further analysis to determine their eligibility) and those that are not (which are therefore patent eligible), e.g., claims that improve the functioning of a computer or other technology or technological field. See Diamond v. Diehr, 450 U.S. 175, 209 USPQ 1 (1981); Gottschalk v. Benson, 409 U.S. 63, 175 USPQ 673 (1972). See, e.g., MPEP § 2106.06(b) (summarizing Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 118 USPQ2d 1684 (Fed. Cir. 2016), McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 120 USPQ2d 1091 (Fed. Cir. 2016), and other cases that were eligible as improvements to technology or computer functionality instead of being directed to abstract ideas).”
and the plurality of processing circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel – should this be found not to be part of the abstract idea but for mere instructions to do it on a computer, then this would be part of the mere instructions to use a computer, and generic computer components, as a tool to implement the abstract idea.
To clarify, see the instant disclosure, page 4, last paragraph: “Parallel processing and/or distributed processing can be performed to solve a combinatorial optimization problem…” then see SAP America, Inc. v. InvestPic, LLC, 898 F.3d 1161, 1163, 127 USPQ2d 1597, 1599 (Fed. Cir. 2018) as partly discussed in MPEP § 2106.04(a)(2)(I) for “holding that claims to a ‘‘series of mathematical calculations based on selected information’’ are directed to abstract ideas”, wherein in the opinion: “Some of the claims require various databases and processors, which are in the physical realm of things. But it is clear, from the claims themselves and the specification, that these limitations require no improved computer resources InvestPic claims to have invented, just already available [*1170] computers, with their already available basic functions, to use as tools in executing the claimed process. Although counsel for InvestPic contended at oral argument that the inclusion of a "parallel processing" computing architecture in claim 22 (now also in added claims 32-40) should render the claim patent eligible, Oral Arg. at 13:10-13:45, neither the claims nor the specification call for any parallel processing architectures different from those available in existing systems. Rather, to the extent that parallel processing is discussed in the specification, it is characterized as generic parallel processing components—not even asserted to be an invention of InvestPic—on which the claimed method could run. '291 patent, col. 14, lines 50-61.”
Claim 14 – the use of the management server is merely adding generic computers and generic computer components as part of using a computer as a tool to implement the abstract idea.
In claim 14, should the steps performed by the management server not be considered as part of the abstract idea, then these steps would merely be part of the mere instructions to apply a computer, and generic computer components, as a tool to implement the abstract idea.
The following limitations are generally linking to a particular technological environment/field of use, as discussed in MPEP § 2106.05(h):
The independent claims, using claim 1 as representative, recite: and the plurality of processing circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel. – should the parallel processing feature not be found to be part of the abstract idea, then this would merely be generally linking to a particular technological environment, akin to “Affinity Labs of Texas v. DirecTV, LLC, 838 F.3d 1253, 120 USPQ2d 1201 (Fed. Cir. 2016). In Affinity Labs, the claim recited a broadcast system in which a cellular telephone located outside the range of a regional broadcaster (1) requests and receives network-based content from the broadcaster via a streaming signal, (2) is configured to wirelessly download an application for performing those functions, and (3) contains a display that allows the user to select particular content. 838 F.3d at 1255-56, 120 USPQ2d at 1202. The court identified the claimed concept of providing out-of-region access to regional broadcast content as an abstract idea, and noted that the additional elements limited the wireless delivery of regional broadcast content to cellular telephones (as opposed to any and all electronic devices such as televisions, cable boxes, computers, or the like). 838 F.3d at 1258-59, 120 USPQ2d at 1204. Although the additional elements did limit the use of the abstract idea, the court explained that this type of limitation merely confines the use of the abstract idea to a particular technological environment (cellular telephones) and thus fails to add an inventive concept to the claims. 838 F.3d at 1259, 120 USPQ2d at 1204.” As discussed in MPEP § 2106.05(h)
Claim 1 - An information processing device comprising: a host bus adapter; a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being_ connected to the shared memory via a bus, wherein: each of the processing circuits is configured to;… retrieve the N first variables and the L second variables from the shared memory, and the information processing device is configured to transfer the N first variables after the update via the host bus adapter – generally linking the abstract idea to a particular technological environment, wherein page 5, ¶ 1 of the instant disclosure conveys a single generic computer is readily usable as a tool to implement this abstract idea
Claim 14 - a management server configured to convert a combinatorial optimization problem into a format that can be processed by a plurality of information processing devices, …; … and the management server is further configured to …, aggregate the calculation results, and convert the aggregated calculation result into a solution of the combinatorial optimization problem – similar to the above feature, this is merely generally linking the abstract idea to a particular technological environment
To clarify on the above, see page 5, ¶ 1 of the instant disclosure: “In addition, the number of calculation servers used for solving the combinatorial optimization problem is not particularly limited. For example, the information processing system may include one calculation server… The calculation server may be a server installed in a data center or a desktop PC installed in an office…. For example, the calculation server may be a general- purpose computer, a dedicated electronic circuit, or a combination thereof.” – see MPEP § 2106.05(b)(I and II): “…It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014)…See, e.g., Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly")” and MPEP § 2106.05(f): “Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015).” – in sum, the instant disclosure conveys that only a single computer, e.g. a server, may be used to implement the abstract idea. The claimed features above are merely generally linking to a particular technical environment wherein more than one computer, and additional generic computer components, are used as a tool to implement the abstract idea instead of a single computer.
The following limitations are adding insignificant extra-solution activity to the judicial exception, as discussed in MPEP § 2106.05(g):
a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being connected to the shared memory via a bus, wherein: each of the processing circuits is configured to; retrieve the N first variables and the L second variables from the shared memory - mere data storage and retrieval using generic computer components in their ordinary capacity
a host bus adapter… and the information processing device is configured to transfer the N first variables after the update via the host bus adapter. – mere data transmission in a generic manner using generic computer components in their ordinary capacity.
Claim 14 - a management server configured to …transmit the converted problem to the plurality of information processing devices; - mere data transmission
Claim 14 - and the management server is further configured to acquire calculation results from the plurality of information processing devices - mere data gathering
A claim that integrates a judicial exception into a practical application will apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that the claim is more than a drafting effort designed to monopolize the judicial exception. See MPEP § 2106.04(d).
The claimed invention does not recite any additional elements that integrate the judicial exception into a practical application. Refer to MPEP §2106.04(d).
Step 2B
The claimed invention does not recite any additional elements/limitations that amount to significantly more.
The following limitations are merely reciting the words "apply it" (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f), including the “Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more”:
Claim 1 - An information processing device comprising: a host bus adapter; a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being_ connected to the shared memory via a bus, wherein: each of the processing circuits is configured to;… retrieve the N first variables and the L second variables from the shared memory, and the information processing device is configured to transfer the N first variables after the update via the host bus adapter - and the similar recitations in the other independent claims - see page 6, ¶ 2 of the instant disclosure which describes the use of generic “storage”, e.g. “The storage unit 14 may be a volatile memory, a non-volatile memory, or a combination thereof. Examples of the volatile memory include a DRAM and an SRAM. Examples of the non-volatile 20 memory include a NANO flash memory, a NOR flash memory, a ReRAM, or an MRAM. In addition, a hard disk, an optical disk, a magnetic tape, or an external storage device may be used as the storage unit 14.”, and see pages 3-4 which describe the use of generic computers to perform the abstract idea, e.g. “servers” with “processors”. Also, see page 36, ¶ 1: “Further, a storage medium may be a non-transitory computer-readable storage medium that stores the program”, and see figures 1-4. And page 8, ¶ 3: “The shared memory 32 is a memory accessible 25 from the processors 33A to 33D. Examples of the shared memory 32 include a volatile memory such as a DRAM and an SRAM.” And page 11 ¶ 2: “The host bus adapter 35 implements data communication between the calculation servers. The host bus adapter 35 is connected to the switch 5 via the cable 4a. The host bus adapter 35 is, for example, a host channel adaptor (HCA).” – i.e. the specification merely conveys the use of off-the-shelf generic computer components. As a further point of clarity, MPEP § 2106.04(d): “The Supreme Court has long distinguished between principles themselves (which are not patent eligible) and the integration of those principles into practical applications (which are patent eligible). See, e.g., Mayo Collaborative Servs. v. Prometheus Labs., Inc., 566 U.S. 66, 80, 84, 101 USPQ2d 1961, 1968-69, 1970 (2012) (noting that the Court in Diamond v. Diehr found ‘‘the overall process patent eligible because of the way the additional steps of the process integrated the equation into the process as a whole,’’ but the Court in Gottschalk v. Benson ‘‘held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle’’). Similarly, in a growing body of decisions, the Federal Circuit has distinguished between claims that are ‘‘directed to’’ a judicial exception (which require further analysis to determine their eligibility) and those that are not (which are therefore patent eligible), e.g., claims that improve the functioning of a computer or other technology or technological field. See Diamond v. Diehr, 450 U.S. 175, 209 USPQ 1 (1981); Gottschalk v. Benson, 409 U.S. 63, 175 USPQ 673 (1972). See, e.g., MPEP § 2106.06(b) (summarizing Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 118 USPQ2d 1684 (Fed. Cir. 2016), McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 120 USPQ2d 1091 (Fed. Cir. 2016), and other cases that were eligible as improvements to technology or computer functionality instead of being directed to abstract ideas).”
and the plurality of processing circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel – should this be found not to be part of the abstract idea but for mere instructions to do it on a computer, then this would be part of the mere instructions to use a computer, and generic computer components, as a tool to implement the abstract idea.
To clarify, see the instant disclosure, page 4, last paragraph: “Parallel processing and/or distributed processing can be performed to solve a combinatorial optimization problem…” then see SAP America, Inc. v. InvestPic, LLC, 898 F.3d 1161, 1163, 127 USPQ2d 1597, 1599 (Fed. Cir. 2018) as partly discussed in MPEP § 2106.04(a)(2)(I) for “holding that claims to a ‘‘series of mathematical calculations based on selected information’’ are directed to abstract ideas”, wherein in the opinion: “Some of the claims require various databases and processors, which are in the physical realm of things. But it is clear, from the claims themselves and the specification, that these limitations require no improved computer resources InvestPic claims to have invented, just already available [*1170] computers, with their already available basic functions, to use as tools in executing the claimed process. Although counsel for InvestPic contended at oral argument that the inclusion of a "parallel processing" computing architecture in claim 22 (now also in added claims 32-40) should render the claim patent eligible, Oral Arg. at 13:10-13:45, neither the claims nor the specification call for any parallel processing architectures different from those available in existing systems. Rather, to the extent that parallel processing is discussed in the specification, it is characterized as generic parallel processing components—not even asserted to be an invention of InvestPic—on which the claimed method could run. '291 patent, col. 14, lines 50-61.”
Claim 14 – the use of the management server is merely adding generic computers and generic computer components as part of using a computer as a tool to implement the abstract idea.
In claim 14, should the steps performed by the management server not be considered as part of the abstract idea, then these steps would merely be part of the mere instructions to apply a computer, and generic computer components, as a tool to implement the abstract idea.
The following limitations are generally linking to a particular technological environment/field of use, as discussed in MPEP § 2106.05(h):
The independent claims, using claim 1 as representative, recite: and the plurality of processing circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel. – should the parallel processing feature not be found to be part of the abstract idea, then this would merely be generally linking to a particular technological environment, akin to “Affinity Labs of Texas v. DirecTV, LLC, 838 F.3d 1253, 120 USPQ2d 1201 (Fed. Cir. 2016). In Affinity Labs, the claim recited a broadcast system in which a cellular telephone located outside the range of a regional broadcaster (1) requests and receives network-based content from the broadcaster via a streaming signal, (2) is configured to wirelessly download an application for performing those functions, and (3) contains a display that allows the user to select particular content. 838 F.3d at 1255-56, 120 USPQ2d at 1202. The court identified the claimed concept of providing out-of-region access to regional broadcast content as an abstract idea, and noted that the additional elements limited the wireless delivery of regional broadcast content to cellular telephones (as opposed to any and all electronic devices such as televisions, cable boxes, computers, or the like). 838 F.3d at 1258-59, 120 USPQ2d at 1204. Although the additional elements did limit the use of the abstract idea, the court explained that this type of limitation merely confines the use of the abstract idea to a particular technological environment (cellular telephones) and thus fails to add an inventive concept to the claims. 838 F.3d at 1259, 120 USPQ2d at 1204.” As discussed in MPEP § 2106.05(h)
Claim 1 - An information processing device comprising: a host bus adapter; a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being_ connected to the shared memory via a bus, wherein: each of the processing circuits is configured to;… retrieve the N first variables and the L second variables from the shared memory, and the information processing device is configured to transfer the N first variables after the update via the host bus adapter – generally linking the abstract idea to a particular technological environment, wherein page 5, ¶ 1 of the instant disclosure conveys a single generic computer is readily usable as a tool to implement this abstract idea
Claim 14 - a management server configured to convert a combinatorial optimization problem into a format that can be processed by a plurality of information processing devices, …; … and the management server is further configured to …, aggregate the calculation results, and convert the aggregated calculation result into a solution of the combinatorial optimization problem – similar to the above feature, this is merely generally linking the abstract idea to a particular technological environment
To clarify on the above, see page 5, ¶ 1 of the instant disclosure: “In addition, the number of calculation servers used for solving the combinatorial optimization problem is not particularly limited. For example, the information processing system may include one calculation server… The calculation server may be a server installed in a data center or a desktop PC installed in an office…. For example, the calculation server may be a general- purpose computer, a dedicated electronic circuit, or a combination thereof.” – see MPEP § 2106.05(b)(I and II): “…It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014)…See, e.g., Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly")” and MPEP § 2106.05(f): “Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015).” – in sum, the instant disclosure conveys that only a single computer, e.g. a server, may be used to implement the abstract idea. The claimed features above are merely generally linking to a particular technical environment wherein more than one computer, and additional generic computer components, are used as a tool to implement the abstract idea instead of a single computer.
The following limitations are adding insignificant extra-solution activity to the judicial exception, as discussed in MPEP § 2106.05(g):
a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being connected to the shared memory via a bus, wherein: each of the processing circuits is configured to; retrieve the N first variables and the L second variables from the shared memory - mere data storage and retrieval using generic computer components in their ordinary capacity
a host bus adapter… and the information processing device is configured to transfer the N first variables after the update via the host bus adapter. – mere data transmission in a generic manner using generic computer components in their ordinary capacity.
Claim 14 - a management server configured to …transmit the converted problem to the plurality of information processing devices; - mere data transmission
Claim 14 - and the management server is further configured to acquire calculation results from the plurality of information processing devices - mere data gathering
In addition, the above insignificant extra-solution activities are also considered as well-understood, routine, and conventional activities, as discussed in MPEP § 2106.05(d):
a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being connected to the shared memory via a bus, wherein: each of the processing circuits is configured to; retrieve the N first variables and the L second variables from the shared memory; - this is considered similar to the example WURC activity as discussed in MPEP § 2106.05(d)(II) of: “i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); …iii. Electronic recordkeeping, Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 225, 110 USPQ2d 1984 (2014) (creating and maintaining "shadow accounts"); Ultramercial, 772 F.3d at 716, 112 USPQ2d at 1755 (updating an activity log); iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93;”
Claim 14 - a management server configured to …transmit the converted problem to the plurality of information processing devices… and the management server is further configured to acquire calculation results from the plurality of information processing devices - MPEP § 2106.05(d)(II): “i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network);”
a host bus adapter… and the information processing device is configured to transfer the N first variables after the update via the host bus adapter this is considered similar to the example WURC activity as discussed in MPEP § 2106.05(d)(II) of: “i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network);” – also see the generic description of this feature on page 11, ¶ 2, incl.: “The host bus adapter 35 is, for example, a host channel adaptor (HCA).” – which is WURC given the lack of particularity in the disclosure as the specification preferably omits what is well-known in the art (MPEP 2164.01, ¶ 1), also see:
Voltaire, “Host Channel Adapters (HCAs)”, Copyright 2009, URL: cw(dot)infinibandta(dot)org/files/showcase_product/090726(dot)192240(dot)411(dot)HCA-DS-WEB-052709(dot)pdf – see the Overview section, followed by the description of various products that were commercially available at the time this was published
Liu, Jiuxing, et al. "MPI over InfiniBand: Early experiences." Ohio State University Technical Report (2003). See the abstract, then see § 2 including fig. 1 – in particular, note in figure 1 that each “Host Platform” has a plurality of CPUs using a single shared “Mem [memory]” along with an “HCA” to data transmitting/recieveing to/from each “Host Platform” – and this is “a typical system configuration with the InfiniBand Architecture”
In addition, the following is also considered WURC as part as part of “Parallel processing and/or distributed processing can be performed to solve a combinatorial optimization problem.” (page 4, ¶ 3):
An information processing device comprising: a host bus adapter; a shared memory, the shared memory being configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; and a plurality of processing circuits, each of the processing circuits being_ connected to the shared memory via a bus, wherein: each of the processing circuits is configured to; retrieve the N first variables and the L second variables from the shared memory,… the plurality of processing circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel and the information processing device is configured to transfer the N first variables after the update via the host bus adapter. – WURC in view of SAP America, Inc. v. InvestPic, LLC, 898 F.3d 1161, 1163, 127 USPQ2d 1597, 1599 (Fed. Cir. 2018) as discussed above, also see:
Liu, Jiuxing, et al. "MPI over InfiniBand: Early experiences." Ohio State University Technical Report (2003). See the abstract, then see § 2 including fig. 1 – in particular, note in figure 1 that each “Host Platform” has a plurality of CPUs using a single shared “Mem [memory]” along with an “HCA” to data transmitting/recieveing to/from each “Host Platform” – and this is “a typical system configuration with the InfiniBand Architecture”
Nvidia, “MPI Solutions for GPUs”, accessed via WayBack Machine, archive Date Feb. 15th, 2019, URL: developer(dot)nvidia(dot)com/mpi-solutions-gpus – “MPI (Message Passing Interface) is a standardized and portable API for communicating data via messages (both point-to-point & collective) between distributed processes. MPI is frequently used in HPC to build applications that can scale on multi-node computer clusters. MPI is fully compatible with CUDA, CUDA Fortran, and OpenACC, all of which are designed for parallel computing on a single computer or node. There are a number of reasons for wanting to combine the complementary parallel programming approaches of MPI & CUDA (/CUDA Fortran/OpenACC): To solve problems with a data size too large to fit into the memory of a single GPU To solve problems that would require unreasonably long compute time on a single node To accelerate an existing MPI application with GPUs To enable a single-node multi-GPU application to scale across multiple nodes Regular MPI implementations pass pointers to host memory, staging GPU buffers through host memory using cudaMemcopy. With CUDA-aware MPI, the MPI library can send and receive GPU buffers directly, without having to first stage them in host memory.”
Lawrence Livermore National Laboratory, “Introduction to Parallel Computing Tutorial”, accessed on July 19th, 2024, URL: hpc(dot)llnl(dot)gov/documentation/tutorials/introduction-parallel-computing-tutorial – see the abstract, see the section “Parallel computing” including: “In the simplest sense, parallel computing is the simultaneous use of multiple compute resources to solve a computational problem:” , see the section “Parallel computers” including: “Virtually all stand-alone computers today are parallel from a hardware perspective… Networks connect multiple stand-alone computers (nodes) to make larger parallel computer clusters. For example, the schematic below shows a typical LLNL parallel computer cluster… The majority of the world's large parallel computers (supercomputers) are clusters of hardware produced by a handful of (mostly) well known vendors…”, see the section “The Future” including: “During the past 20+ years, the trends indicated by ever faster networks, distributed systems, and multi-processor computer architectures (even at the desktop level) clearly show that parallelism is the future of computing.”, the section “Who is using Parallel Computing” including “During the past 20+ years, the trends indicated by ever faster networks, distributed systems, and multi-processor computer architectures (even at the desktop level) clearly show that parallelism is the future of computing… Today, commercial applications provide an equal or greater driving force in the development of faster computers. These applications require the processing of large amounts of data in sophisticated ways… Parallel computing is now being used extensively around the world, in a wide variety of applications….”, see the section “Flynn's Classical Taxonomy” including “There are a number of different ways to classify parallel computers. Examples are available in the references. One of the more widely used classifications, in use since 1966, is called Flynn's Taxonomy.” And see the subsections which detail this, then see the section “General Parallel Computing Terminology” Including “Like everything else, parallel computing has its own jargon. Some of the more commonly used terms associated with parallel computing are listed below. Most of these will be discussed in more detail later… A standalone "computer in a box." Usually comprised of multiple CPUs/processors/cores, memory, network interfaces, etc. Nodes are networked together to comprise a supercomputer… Breaking a task into steps performed by different processor units, with inputs streaming through, much like an assembly line; a type of parallel computing.”, then see the section “Distributed Memory / Message Passing Model” including: “Historically, a variety of message passing libraries have been available since the 1980s. These implementations differed substantially from each other making it difficult for programmers to develop portable applications. In 1992, the MPI Forum was formed with the primary goal of establishing a standard interface for message passing implementations. Part 1 of the Message Passing Interface (MPI) was released in 1994. Part 2 (MPI-2) was released in 1996 and MPI-3 in 2012. All MPI specifications are available on the web... MPI is the "de facto" industry standard for message passing, replacing virtually all other message passing implementations used for production work. MPI implementations exist for virtually all popular parallel computing platforms. Not all implementations include everything in MPI-1, MPI-2 or MPI-3.”
Note, § C.i of LLNL discusses “Shared Memory” as one of the “Parallel Computer Memory Architectures”
Parekh, Ojas, et al. "Benchmarking adiabatic quantum optimization for complex network analysis." arXiv preprint arXiv:1604.00319 (2016). § 6.3 including: “Of course other experts have also managed to creatively and deftly circumvent computing bottlenecks in the form of new paradigms such as massively parallel and cloud computing.”, and then see § 6.3.1 including: “More to the point, the assumption of solving many independent instances is precisely the type “embarrassingly parallel” task that is extremely well suited to current massively parallel classical systems”
Haribara, Yoshitaka. "Realization and Evaluation of Measurement Feedback Coherent Ising Machines for Combinatorial Optimization Problems." U. Tokyo dissertation (2017). Abstract including: “Many research efforts have been made to define the hardness of problems and construct efficient algorithms. In recent trends in semiconductor technologies, Moore’s law is slowing down mainly due to the limitation of micro-fabrication heat dissipation and communication bottleneck problems on a chip. More efforts to boost the processor performance directed to parallelized architectures including GPU, other multi/many-core processors, and neuromorphic hardware. In fact, many computationally heavy tasks such as deep learning and computational science run on GPU clusters or special purpose processors” then see §§ 1.1 and 7.3.1-7.3.2
Claim 14 – a management server configured to convert a combinatorial optimization problem into a format that can be processed by a plurality of information processing devices, and transmit the converted problem to the plurality of information processing devices;… and the management server is further configured to acquire calculation results from the plurality of information processing devices, aggregate the calculation results, and convert the aggregated calculation result into a solution of the combinatorial optimization problem. – see the above discussed evidence for the parallel processing feature, include seeing the above citations in Lawrence Livermore National Laboratory, “Introduction to Parallel Computing Tutorial”, accessed on July 19th, 2024, URL: hpc(dot)llnl(dot)gov/documentation/tutorials/introduction-parallel-computing-tutorial – also see section “Parallel Computing” in the Overview for its figure which shows that the problem is converted into a format for processing by each of the parallel processors, e.g. see the “Single Instruction, Multiple Data (SIMD)” subsection in the section “Concepts and Terminology” which visually shows how a math calculation is to be parallelized, and see the subsection “Hybrid Model” on page 24 of the PDF of record: “Another similar and increasingly popular example of a hybrid model is using MPI with CPU-GPU (graphics processingunit) programming. MPI tasks run on CPUs using local memory and communicating with each other over a network. Computationally intensive kernels are off-loaded to GPUs on-node. Data exchange between node-local memory and GPUs uses CUDA (or something equivalent).” – also, see the section” “Partitioning” including its subsections wherein this provides more details on how “One of the first steps in designing a parallel program is to break the problem into discrete "chunks" of work that can be distributed to multiple tasks. This is known as decomposition or partitioning. – then, see the section “Parallel Solution 2: Pool of Tasks” starting on page 38: “Master Process: Holds pool of tasks for worker processes to do …Sends worker a task when requested… Collects results from workers Worker Process: repeatedly does the following… Gets task from master process Performs computation… Sends results to master” – also see the example implementation of this starting on page 40 for the calculation of the value of pi: “Parallel strategy: divide the loop into equal portions that can be executed by the pool of tasks Each task independently performs its work A SPMD model is used One task acts as the master to collect results and compute the value of PI” – include seeing the pseudocode on page 41, including its aggregation and conversion steps of “receive from WORKERS their circle_counts compute PI (use MASTER and WORKER calculations)” – also see the example of the “1-D Wave Equation Parallel Solution” starting on page 43, including the pseudocode on page 44. For additional evidence, see
Ralphs, Ted, et al. "Parallel solvers for mixed integer linear optimization." Handbook of parallel constraint reasoning (2018): 283-336. Section on “Master-Worker” starting on page 25 including: “The Master-Worker paradigm is a well-known and widely used paradigm for many parallel workloads. The basic scheme involves a single Master process that coordinates the efforts of a set of Workers… The Master coordinates distribution of the global collection of subproblem to Worker…” and see page 27 for the pseudocode algorithms
Holmqvist, K., Athanasios Migdalas, and Panos M. Pardalos. "Parallelized heuristics for combinatorial search." Parallel computing in optimization (1997): 269-294. Abstract, then see § 3.1 including: “In one of the more general strategies, the Master-Slave model, the current state is handled by a master processor which distributes this state to the remaining processors, the slaves. The slave processors generate one neighboring solution each and calculate the cost difference. If the new state is accepted, it is forwarded to the master processor, becomes the current state, and is distributed to the slaves….The division strategies are strategies where a fixed number of iterations are performed on each processor independently. When the processors have completed their run all current states are gathered and some selection method is used to select the best. In the next session of independent runs of sequential SAs, this state is used as the starting solution for all processors... Initially the clustering strategies are identical to the division strategies. A number of independent iterations are performed. As the temperature is lowered, fewer new stages are accepted, and two or more processors are clustered together and work together in a master-slave model based SA…”, also see §§ 4.1 and 5.1
Pabolu, Sivakumar V. "A Distributed Simulated Annealing framework for Engineering Optimization." (2003). Abstract, then see chapter 3 ¶ 1: “Several approaches have been taken by researchers to utilize parallelism at various levels of the simulated annealing process [2, 16, 19, 20, 21, 22]. All parallelizing strategies are based on the idea that multiple processors can be used to make concurrent moves in decision space at various degrees of independence from each other.”, then see § 3.1: “In a single search path strategy, a master processor initializes a solution, and disburses it to a number of slave processors. The slave processors each attempt a transition on this solution and report the new solution and change in cost to the master processor. The master processor decides which of these candidate solution transitions to accept and broadcasts the new solution to all the slave processors…”, also see § 3.2.1 including fig. 3.1 and 3.2
Calégari, Patrice Roger. Parallelization of population-based evolutionary algorithms for combinatorial optimization problems. No. 2046. EPFL, 1999. § 2.4.4 starting on page 26, in particular see the subsection “Farmer/worker model” on page 28
Wang, Z. G., et al. "Optimization of multi-pass milling using parallel genetic algorithm and parallel genetic simulated annealing." International Journal of Machine Tools and Manufacture 45.15 (2005): 1726-1734. § 3.2, including the last two paragraphs including: “In the master–slave/coarse-grained PGSA, the host program runs on the master processor, which decides on the global termination criterion. The whole population is equally divided into several sub-populations among the slave processors. Each slave processor runs a sequential GSA independently within its own sub-population on one processor”
Bendjoudi, Ahcene, Nordine Melab, and El-Ghazali Talbi. "An adaptive hierarchical master–worker (AHMW) framework for grids—Application to B&B algorithms." Journal of Parallel and Distributed Computing 72.2 (2012): 120-131. Abstract, then see § 1 including: “Real-world combinatorial optimization problems (COPs) are CPU time-intensive and require a huge amount of computing resources to be solved optimally… High performance computing such as grid-based parallel computing is required… Several applications and frameworks have been developed and adapted to large scale environments using the MW paradigm [4,18]. TheMW paradigm consists in defining two entities: a single master and a pool of workers. The master decomposes an initial task into multiple smaller ones and distributes them among the workers. The workers, on their side, perform the execution of the different tasks. After a worker ends its calculation, it sends back the result to the master and asks for a new task. This simple mechanism makes theMWparadigm widely studied and successfully used for many parallel applications. Thus, many of sequential applications can be easily brought to the MW paradigm since all the algorithm control is done by the master. Indeed, users only have to find a way to suitably decompose the problem to be solved, to distribute tasks, to gather results and to terminate the calculation.” – then see § 2.1 including: “In the literature, most of applications developed for large scale environments are based on the MW paradigm…”
The claimed invention is directed towards an abstract idea of both a mathematical concept and a mental process without significantly more.
Regarding the dependent claims
Claims 2-8, 12 are further limiting both the mental process and mathematical concept, including by adding additional math calculations/relationships/equations in textual form which are recited in a general enough manner that a person may readily perform this calculation, such as with physical aids as discussed above, with mere instructions to use a computer as a tool to implement the abstract idea.
Claim 9-10 are considered as further limiting the mathematical concept to a particular mathematical problem (see equation 1 on page 12 for the “Ising model”; equation 19 as discussed on pages 36-37 of the “Many-Body Interaction” including: “Formula (19) corresponds to the energy of the Ising model including a many-body interaction.”). This is also considered as generally linking the mental process as discussed above to a particular field of use of a particular field of mathematics, i.e. should it be found that this is not further limiting the math concept, then this is merely generally linking to a field of use that is WURC in view of:
Bian, Zhengbing, et al. "The Ising model: teaching an old problem new tricks." D-wave systems 2 (2010): 1-32. § 2.1, ¶¶ 2-3: “One of the most widely used models in physics is called the Ising model. It was initially proposed in the mid 1920s by Ernst Ising and Wilhelm Lenz as a way to understand how magnetic materials work. The approach modeled a magnetic material as a collection of molecules, each of which has a spin which can align or anti-align with an applied magnetic field, and which interact through a pairwise term with each other [Bru67]…. Over time it was realized that Eq. (1) could be used to model many different physical systems. Any system that describes a set of individual elements (modeled by the spins sj ) interacting via pairwise interactions (the quadratic terms si sj ) can be described in this framework. In the period 1969 to 1997, more than 12,000 papers were published using the Ising model to describe systems in fields ranging from artificial intelligence to zoology.”
Djidjev, Hristo N., et al. "Efficient combinatorial optimization using quantum annealing." arXiv preprint arXiv:1801.08653 (2018). Abstract, then see §§ 1 – 2.2
Chapuis, Guillaume, et al. "Finding maximum cliques on a quantum annealer." Proceedings of the Computing Frontiers Conference. 2017. Abstract, §§ 1, 2.1.1-2.2, 3.1
Vyskocil, Tomas, and Hristo Djidjev. "Simple constraint embedding for quantum annealers." 2018 IEEE International Conference on Rebooting Computing (ICRC). IEEE, 2018. Abstract, §§ I-II
Zahedinejad, Ehsan, and Arman Zaribafiyan. "Combinatorial optimization on gate model quantum computers: A survey." arXiv preprint arXiv:1708.05294 (2017). Abstract, §§ 1-2, including equation 3
Parekh, Ojas, et al. "Benchmarking adiabatic quantum optimization for complex network analysis." arXiv preprint arXiv:1604.00319 (2016). Abstract, Nomenclature page including: “Ising – Classical Ising spin glass problem, which is equivalent to QUBO (Section 1.3)”, then see §§ 1.2-1.3, then §§ 2,-2.1 including fig. 2 on page 25, also fig. 5 on page 34
Venturelli, Davide, et al. "Quantum optimization of fully connected spin glasses." Physical Review X 5.3 (2015): 031040. Abstract, § 1 including: “One tantalizing approach to solve quadratic unconstrained binary optimizations (QUBOs), such as [1,2] in their Ising formulation, is provided by programmable quantum annealing.”
Haribara, Yoshitaka. "Realization and Evaluation of Measurement Feedback Coherent Ising Machines for Combinatorial Optimization Problems." U. Tokyo dissertation (2017). Abstract, §§ 1.4-1.5
Pistoia et al., US 2021/0150400, abstract,, ¶¶ 1-2
Chen et al., US 2020/0401650 - ¶ 155
Hastings, US 2019/0266213, abstract, ¶ 27
Macready, US 2008/0065573, abstract, ¶¶ 137-139
Venturelli et al., US 2019/0087388, abstract, ¶¶ 3-15, 17-26
Claim 13 is considered as a mental step of a mental judgement, such as a person observing the results of math calculations (either performed with physical aids such as pen/pencil/a calculator, or on the display of a computer performing the math), and making a mental judgement to perform a calculation. This is also considered as a math calculation/equation/relationship in textual form, in textual form, when read in view of page 16, ¶ 2 of the instant disclosure: “In the case of calculating the time evolution, a solution vector having the spin Si as an element can be obtained by converting the variable Xi which is a positive value into +1 and the variable Xi which is a negative value into -1 in the first vector when the value of the coefficient p(t) exceeds a predetermined 10 value. This solution vector corresponds to the solution of the Ising problem. Note that it may be determined whether to obtain a solution vector by executing the above-described conversion based on the number of updates of the first vector and the second vector.” And page 18, last paragraph: “Then, 30 the calculation server determines whether the number of updates of the first vector and the second vector is smaller than the threshold (step S108). When the number of updates is smaller than the threshold (YES in step S108), the calculation server executes the processes of steps S104 to S107 again. When the 35 number of updates is equal to or larger than the threshold (NO in step S108), the spin Si, which is the element of the solution vector, is obtained based on the element Xi of the first vector (step S109).” – i.e. the math relationship of comparing two numbers, e.g. Is X>Y?, and performing a calculation to check for this, e.g. Is max(X, Y) > Y?
Claims 18-21 are considered as an abstract idea, but to do it on a computer, wherein at prong 2 and 2B this is considered as generally linking to a particular technological environment; an insignificant extra-solution activity of an insignificant computer implementation nominal/tangential to the primary process of the claimed invention, and part of the mere instructions to invoke a computer and generic computer components as a tool to perform the abstract idea. This is also WURC in view of the below cited evidence. To clarify, this is the abstract idea of load balancing, e.g. suppose a project manager has five engineers working for them performing design calculations, wherein some engineers are slower at doing the calculations then others – the project manager would readily be able to distribute/balance the calculations between the engineers, e.g. tasking the calculations to be performed so that the faster engineers do more calculations, and the slower engineers do less calculations, so as to complete the set of design calculations in a timely manner. This is conventional as well – see LLNL, 2024, as cited above, for its section on “Load Balancing”: “Load balancing refers to the practice of distributing approximately equal amounts of work among tasks so that all tasks are kept busy all of the time. It can be considered a minimization of task idle time.” – also see:
Ralphs et al., 2018, as cited above – see § 3.2.5 for its subsection “Dynamic Load Balancing”
Bendjoudi et al., 2012, as cited above, § 1 ¶ 2
The claimed invention is directed towards an abstract idea of both a mathematical concept and a mental process without significantly more.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
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/David A Hopkins/Primary Examiner, Art Unit 2188