DETAILED ACTION
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on June 30th, 2025 has been entered.
This action is in response to the amendments filed on June 30th, 2025. A summary of this action:
Claims 1-20 have been presented for examination.
Claim 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of both a mathematical concept and mental process without significantly more.
This action is non-final
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments/Amendments
Regarding the claim objections
Withdrawn in view of the amendments.
Regarding the § 112(a) Rejection
Withdrawn in view of the amendments. New grounds below as necessitated by amendment.
Regarding the § 112(b) Rejection
Withdrawn in view of the amendments.
Regarding the § 101 Rejection
Maintained and updated below as necessitated by amendment.
With respect to the prong 1 remarks, the Examiner respectfully disagrees, because akin to the shift register of Gottschalk v. Benson (MPEP § 2106.04(a)(2)(III)(C): “The Supreme Court recognized this in Benson, determining that a mathematical algorithm for converting binary coded decimal to pure binary within a computer’s shift register was an abstract idea. The Court concluded that the algorithm could be performed purely mentally even though the claimed procedures "can be carried out in existing computers long in use, no new machinery being necessary." 409 U.S at 67, 175 USPQ at 675. “) additional elements of generic computing components used in their ordinary capacity are not considered at prong 1, but rather as additional elements to the abstract idea. To further clarify, see the discussion of TLI Communications in MPEP § 2106.05(f).
To further clarify, see the discussion of BASCOM in MPEP § 2106.05(d)(I): “For example, in BASCOM, even though the court found that all of the additional elements in the claim recited generic computer network or Internet components, the elements in combination amounted to significantly more because of the non-conventional and non-generic arrangement that provided a technical improvement in the art. BASCOM Global Internet Servs. v. AT&T Mobility LLC, 827 F.3d 1341, 1350-51, 119 USPQ2d 1236, 1243-44 (2016).” And MPEP § 2106.04(a)(2)(II)(C): “i. filtering content, BASCOM Global Internet v. AT&T Mobility, LLC, 827 F.3d 1341, 1345-46, 119 USPQ2d 1236, 1239 (Fed. Cir. 2016) (finding that filtering content was an abstract idea under step 2A, but reversing an invalidity judgment of ineligibility due to an inadequate step 2B analysis); “
In addition, with respect to the remarks regarding there being no abstract idea recited in this claim, the Examiner respectfully disagrees. Calculating terms are math calculations in textual form, and updating variables in the particular manner claimed, e.g. by use of a weighted addition operation, are math calculations in textual form, recited in such generality that a person is readily able to do this. The claims do not limit this abstract idea to a data environment with “high-dimensional data” as alleged, but rather include the performance of this abstract idea with simple data.
With respect to the newly added limitations, see below for how they are considered in the § 101 analysis.
With respect to the remarks at prong 2, see Gottschalk v. Benson, see TLI communications, and see BASCOM as discussed above. There is no practical application of the abstract idea itself in these claims, for the claims do not integrate the abstract idea into a practical application, but rather merely invoke a computer and generic computing elements as a tool to perform the abstract idea. To clarify, MPEP § 2106.04(d): “See, e.g., Mayo Collaborative Servs. v. Prometheus Labs., Inc., 566 U.S. 66, 80, 84, 101 USPQ2d 1961, 1968-69, 1970 (2012) (noting that the Court in Diamond v. Diehr found ‘‘the overall process patent eligible because of the way the additional steps of the process integrated the equation into the process as a whole,’’ but the Court in Gottschalk v. Benson ‘‘held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle’’).”
MPEP § 2106.04(d)(1): “While the courts usually evaluate "improvements" as part of the "directed to" inquiry in part one of the Alice/Mayo test (equivalent to Step 2A), they have also performed this evaluation in part two of the Alice/Mayo test (equivalent to Step 2B). See, e.g., BASCOM Global Internet v. AT&T Mobility LLC, 827 F.3d 1341, 1349-50, 119 USPQ2d 1236, 1241-42 (Fed. Cir. 2016).” And MPEP § 2106.05(I): “An inventive concept "cannot be furnished by the unpatentable law of nature (or natural phenomenon or abstract idea) itself." Genetic Techs. Ltd. v. Merial LLC, 818 F.3d 1369, 1376, 118 USPQ2d 1541, 1546 (Fed. Cir. 2016). See also Alice Corp., 573 U.S. at 21-18, 110 USPQ2d at 1981 (citing Mayo, 566 U.S. at 78, 101 USPQ2d at 1968 (after determining that a claim is directed to a judicial exception, "we then ask, ‘[w]hat else is there in the claims before us?") (emphasis added)); RecogniCorp, LLC v. Nintendo Co., 855 F.3d 1322, 1327, 122 USPQ2d 1377 (Fed. Cir. 2017) ("Adding one abstract idea (math) to another abstract idea (encoding and decoding) does not render the claim non-abstract"). Instead, an "inventive concept" is furnished by an element or combination of elements that is recited in the claim in addition to (beyond) the judicial exception, and is sufficient to ensure that the claim as a whole amounts to significantly more than the judicial exception itself. Alice Corp., 573 U.S. at 27-18, 110 USPQ2d at 1981 (citing Mayo, 566 U.S. at 72-73, 101 USPQ2d at 1966).
To clarify, with respect to the alleged improvement consideration, what is disclosed in the instant disclosure, as per MPEP § 2106.05(a): “That is, the disclosure must provide sufficient details such that one of ordinary skill in the art would recognize the claimed invention as providing an improvement.” – see page 1 of the disclosure, i.e. what is described in the instant disclosure as the improvement is merely “Development of a technique for calculating a solution for the combinatorial optimization problem within a practical time is required in order to solve problems in each field and promote social innovation and progress in science and technology.” – which simply conveys this is seeking to allegedly improve, in a conclusory manner, on a technique for performing faster math calculations. Such an alleged improvement is squarely an improvement only in the abstract idea itself, and not an improvement to technology. Gottschalk v. Benson ‘‘held that simply implementing a mathematical principle on a physical machine, namely a computer, was not a patentable application of that principle’’).” And Parker v. Flook (MPEP § 2106.04(I)): “Flook, 437 U.S. at 591-92, 198 USPQ2d at 198 ("the novelty of the mathematical algorithm is not a determining factor at all");” as Synopsys, Inc. v. Mentor Graphics Corp., 839 F.3d 1138, 1151, 120 USPQ2d 1473, 1483 (Fed. Cir. 2016) ("a new abstract idea is still an abstract idea") (emphasis in original).
As a further point of clarity, these remarks further invoke an improvements consideration of the additional elements, however the specification does not disclose such improvement such as “reduces latency” and the like, i.e. MPEP § 2145: “Arguments presented by applicant cannot take the place of evidence in the record. See In re De Blauwe, 736 F.2d 699, 705, 222 USPQ 191, 196 (Fed. Cir. 1984); In re Schulze, 346 F.2d 600, 602, 145 USPQ 716, 718 (CCPA 1965); In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997) ("An assertion of what seems to follow from common experience is just attorney argument and not the kind of factual evidence that is required to rebut a prima facie case of obviousness.")” – to clarify, the improvements consideration is an evidence based consideration starting at the instant disclosure. MPEP § 2106.05(a): “If the examiner concludes the disclosed invention does not improve technology, the burden shifts to applicant to provide persuasive arguments supported by any necessary evidence to demonstrate that one of ordinary skill in the art would understand that the disclosed invention improves technology. Any such evidence submitted under 37 CFR 1.132 must establish what the specification would convey to one of ordinary skill in the art and cannot be used to supplement the specification.”
With respect to the remarks regarding 2B, the Examiner respectfully disagrees for similar reasons as discussed above, and for more clarity see the 2B WURC consideration below as was updated as necessitated by amendment.
No remarks were submitted regarding the WURC evidence of record for consideration, rather these remarks merely allege that this is unconventional but do not address the evidence demonstrating that these additional elements, in combination, are conventional. As such, the remarks at 2B do not address the prior rejection’s rationale.
With respect to the newly added limitations, see below for how these are considered under § 101.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Dependent claims inherit the deficiency of the claims they depend upon.
MPEP §2111.01(I): “Chef America, Inc. v. Lamb-Weston, Inc., 358 F.3d 1371, 1372, 69 USPQ2d 1857 (Fed. Cir. 2004) (Ordinary, simple English words whose meaning is clear and unquestionable, absent any indication that their use in a particular context changes their meaning, are construed to mean exactly what they say….” And MPEP § 2163(I) for Lockwood v. Amer. Airlines, Inc., 107 F.3d 1565, 1572, 41 USPQ2d 1961, 1966 (Fed. Cir. 1997) and MPEP § 2163(II)(A) for Hyatt v. Dudas, 492 F.3d 1365, 1371, 83 USPQ2d 1373, 1376-1377 (Fed. Cir. 2007): “For example, in Hyatt v. Dudas, 492 F.3d 1365, 1371, 83 USPQ2d 1373, 1376-1377 (Fed. Cir. 2007), the examiner made a prima facie case by clearly and specifically explaining why applicant’s specification did not support the particular claimed combination of elements, even though applicant’s specification listed each and every element in the claimed combination. The court found the "examiner was explicit that while each element may be individually described in the specification, the deficiency was lack of adequate description of their combination" and, thus, "[t]he burden was then properly shifted to [inventor] to cite to the examiner where adequate written description could be found or to make an amendment to address the deficiency." Id.;”
The independent claims 1 and 10, 12-14, using claim 1 as representative, recite:
calculating a problem term using the N first variables, and – wherein this is be to performed by “each of the plurality of processing circuits” wherein the updating steps prior to this are only being performed on a subset of the first/second variables
This is not sufficient described. See page 19, ¶ 2: “Note that at least one of the processes illustrated in the flowchart of FIG. 6 may be executed in parallel. For example, the processes of steps S104 to S106 may be executed in parallel such 10 that at least some of the N elements included in each of the first vector and the second vector are updated in parallel.” Then see the example beginning at the end of page 43, incl.: “it is possible to cause each of the processors to calculate L variables among the variables… Similarly, it is possible to cause each of the processors to calculate L variables among the variables Yi included in the second vector… The processor #j calculates a value of the problem term…” – wherein, the equations expressly convey this calculation is with “L” variables (i.e. each processor is calculating the problem term with the subset of the N variables), not the N variables.
Claims 15-20 recite (using claim 15 as representative):
The information processing device of claim 1, wherein the number of N first variables retrieved by each of the processing circuits is the same, and the number of L second variables retrieved by each of the processing circuits is determined based upon the performance of the information processing device.
See page 44, ¶ 3: “However, the number of variables of the first vector and the second vector to be calculated may be different depending on the processor. For example, in a case where there is a performance difference depending on a processor implemented in a calculation server, the number of variables to be calculated can be determined depending on the performance of the processor.” – this does not describe with sufficiently particularity what is presently claimed.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of both a mathematical concept and mental process without significantly more.
Step 1
Claims 12-13 are directed towards the statutory category of a process.
Claims 1 and 10 are directed towards the statutory category of an apparatus.
Claim 14 is directed towards the statutory category of an article of manufacture.
Claims 10, 12-14, and the dependents thereof, are rejected under a similar rationale as representative claim 1, and the dependents thereof.
Step 2A – Prong 1
The claims recite an abstract idea of both a mental process and mathematical concept.
As a point of clarity, as an initial matter, see page 1 last paragraph of the instant disclosure, as filed, which describes that this disclosed invention is “a technique for calculating a solution for the combinatorial optimization problem…”, i.e. a mathematical solution to a mathematical problem
See MPEP § 2106.04: “...In other claims, multiple abstract ideas, which may fall in the same or different groupings, or multiple laws of nature may be recited. In these cases, examiners should not parse the claim. For example, in a claim that includes a series of steps that recite mental steps as well as a mathematical calculation, an examiner should identify the claim as reciting both a mental process and a mathematical concept for Step 2A Prong One to make the analysis clear on the record. “
The mathematical concept recited in claim 1 is:
repeatedly update the first vector and the second vector….update L first variables from among the N first variables based on the corresponding L second variables, weight the L first variables with one of a plurality of first coefficients respectively corresponding to the plurality of arithmetic circuits, and add the L weighted first variables to the corresponding L second variables, calculate a problem term using the N first variables, and add the problem term to the L second variables, the first coefficients in the respective arithmetic circuits have different values, – a series of math calculations in textual form, but done in a computer environment using a computer and generic computer components as a tool to perform the abstract idea. To clarify on the BRI of these limitations, see the instant disclosure including fig. 6, 9-11, and their accompanying descriptions.
… update at least a part of the first vector and at least a part of the second vector in parallel…. – math calculations in textual form, see the above discussed figures, then see page 4 last paragraph: “similar calculation processes for different variables in parallel”; page 11 second to last paragraph: “parallel calculation processes”, page 14 ¶ 3: “parallel Calculation”; page 19, ¶¶ 2-3: “Note that at least one of the processes illustrated in the 5 flowchart of FIG. 6 may be executed in parallel… For example, the calculation process of the problem term may be executed in parallel with other processes including the process of updating the variable Xi….”
Claims 10 and 12 (using claim 10 as representative) adds the following to the abstract idea:
aggregate the calculation results, and convert the aggregated calculation result into a solution of the combinatorial optimization problem. – math calculations/relationships/equations in textual form, akin to “iv. organizing information and manipulating information through mathematical correlations, Digitech Image Techs., LLC v. Electronics for Imaging, Inc., 758 F.3d 1344, 1350, 111 USPQ2d 1717, 1721 (Fed. Cir. 2014). The patentee in Digitech claimed methods of generating first and second data by taking existing information, manipulating the data using mathematical functions, and organizing this information into a new form. The court explained that such claims were directed to an abstract idea because they described a process of organizing information through mathematical correlations, like Flook's method of calculating using a mathematical formula. 758 F.3d at 1350, 111 USPQ2d at 1721.” As discussed in MPEP § 2106.04(a)(2)(I)(A)
To clarify, these limitations are merely aggregating the results of the prior math calculations, and the organizing/converting them into a mathematical solution to a mathematical problem (“the combinatorial optimization problem”). Page 4-5, paragraph split between the pages: “…In this manner, the user can obtain the solution to the combinatorial optimization problem. It is assumed that the solution of the combinatorial optimization problem includes an optimal solution and an approximate solution close to the optimal solution.” And page 1, ¶ 3: “…Mathematically, combinatorial optimization problems are attributed to problems for maximizing functions including a plurality of discrete variables, called "objective functions", or minimizing the functions….”
Under the broadest reasonable interpretation, the claim recites a mathematical concept – the above limitations are steps in a mathematical concept such as mathematical relationships, mathematical formulas or equations, and mathematical calculations. If a claim, under its broadest reasonable interpretation, is directed towards a mathematical concept, then it falls within the Mathematical Concepts grouping of abstract ideas. In addition, as per MPEP § 2106.04(a)(2): “It is important to note that a mathematical concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula." In re Grams, 888 F.2d 835, 837 and n.1, 12 USPQ2d 1824, 1826 and n.1 (Fed. Cir. 1989). See, e.g., SAP America, Inc. v. InvestPic, LLC, 898 F.3d 1161, 1163, 127 USPQ2d 1597, 1599 (Fed. Cir. 2018)”
See MPEP § 2106.04(a)(2).
The mental process recited in claim 1 is:
repeatedly update the first vector and the second vector….update L first variables from among the N first variables based on the corresponding L second variables, weight the L first variables with one of a plurality of first coefficients respectively corresponding to the plurality of arithmetic circuits, and add the L weighted first variables to the corresponding L second variables, calculate a problem term using the N first variables, and add the problem term to the L second variables, the first coefficients in the respective arithmetic circuits have different values… update at least a part of the first vector and at least a part of the second vector in parallel…. – a mental process, but for the mere instructions to do it on a computer, given the generality recited in the claims, as the claims do not limit this process to any particular set of mathematical equations too complex to preclude mental evaluation, such as one with physical aids of pen, paper, and/or a calculator (or, to do calculations in parallel, simply use two side-by-side calculators, or use a computer as a tool to perform parallel calculations; the claim recites with no particularity how the parallel calculations are performed in any particular technological manner that removes this step from the realm of abstract ideas, but for the mere instructions to do it on a computer). As a second example, the parallel processing may readily be performed mentally by two or more people working in parallel using physical aids.
To clarify, this is a mental process such as one performed by a mathematician with the use of physical aids such as pen, paper, and/or a calculator, as a series of mental evaluations of simple equations, with simple vectors (e.g. 2x1 vectors), with a simple weighting scheme, e.g. a linear scaling term.
Claims 10 and 12 (using claim 10 as representative) adds the following to the abstract idea:
a management server configured to convert a combinatorial optimization problem into a format that can be processed by a plurality of information processing devices, – but for the mere instructions to do it on a computer, a mental process, e.g. a person mentally observing a math problem in the field of combinatorial optimization, and mentally evaluating/judging how to dividing the math problem into a series of smaller math problems to later be solved. E.g., suppose the math problem is what is known in the art as embarrassingly parallel, e.g. a simple calculation, e.g. A+B, is to be performed on a plurality input values for both A and B (e.g. 10 values), i.e. the person is simply tasked with performing the calculation of A+B for 10 values of both A+B. The person simply tabulate the values of A+B, and judges that each row in the table is to be calculated independently, thus being in a format for parallel calculations of each row. When doing this for more complex equations, it is still simple to mentally perform, e.g. mentally observe the equation to be solved, e.g. equation 6, recognize that there are numerous calculations to be performed by the index of “i” with its accompanying summation, mentally evaluate said equation to determine that in the summation over “i” there is no dependence on past or future “i” values (i.e. each summation for each value of “i” is embarrassingly parallel), and then judge to use a different calculator (or different computer) to perform the summation for each value of “i”. In other words, mentally convert eq. 6, using pen and paper, to a series of calculations, wherein for each calculation there is a different “i” value – such as by writing out this summation, and then judging to use a different computer or calculator in parallel to perform each summation, e.g. a sum for i = 1; another for i= 2, and so on.
A person would readily be able to also mentally judge how to further subdivide the eq. 6, or similar such equations (e.g. 19), for parallel processing – e.g. mentally observing a similar independence of the calculations on the “j” and “m” indices, and thus mentally judging that a separate computer, or calculator, may be used for each calculation of each respective triplet of values of i, j, and m. This step does not require the actual calculation, but merely a mental judgement of how to break down a math problem into a series of smaller math problems for later calculation.
aggregate the calculation results, and convert the aggregated calculation result into a solution of the combinatorial optimization problem. – a mental process, given the high level of generality recited herein, but for the mere instructions to do it on a computer, akin to “a claim to "collecting information, analyzing it, and displaying certain results of the collection and analysis," where the data analysis steps are recited at a high level of generality such that they could practically be performed in the human mind, Electric Power Group v. Alstom, S.A., 830 F.3d 1350, 1353-54, 119 USPQ2d 1739, 1741-42 (Fed. Cir. 2016);” as discussed in MPEP § 2106.04(a)(2)(III)(A).
For example, a person may readily observe results from a series of calculations, e.g. one the displays of computers or calculators, or on paper, and aggregate these results, e.g. by writing down the results in a tabular form, and mentally perform the conversion process, e.g. by summing along the rows and columns of the pen and paper table, such as aided by a calculator. Neither the claims nor the instant disclosure (page 4, ¶ 3; page 6, ¶ 1) provide any great detail on how these steps are performed in a technological manner, rather, they are discussed with such generality that it is merely a mental process with mere instructions to do it on a computer and with generic computer components.
Under the broadest reasonable interpretation, these limitations are process steps that cover mental processes including an observation, evaluation, judgment or opinion that could be performed in the human mind or with the aid of pencil and paper but for the recitation of a generic computer component. If a claim, under its broadest reasonable interpretation, covers a mental process but for the recitation of generic computer components, then it falls within the "Mental Process" grouping of abstract ideas. A person would readily be able to perform this process either mentally or with the assistance of pen and paper. See MPEP § 2106.04(a)(2).
The mathematical concept is claimed in such a generalized manner that the mathematical concept also encompasses a person mentally performing the math, see MPEP § 2106.04(a)(2) as well, including that for a mental process “Claims can recite a mental process even if they are claimed as being performed on a computer. The Supreme Court recognized this in Benson, determining that a mathematical algorithm for converting binary coded decimal to pure binary within a computer’s shift register was an abstract idea. The Court concluded that the algorithm could be performed purely mentally even though the claimed procedures "can be carried out in existing computers long in use, no new machinery being necessary." 409 U.S at 67, 175 USPQ at 675. “
To clarify, see the USPTO 101 training examples, available at https://www.uspto.gov/patents/laws/examination-policy/subject-matter-eligibility. In particular, with respect to the physical aids, see example # 45, analysis of claim 1 under step 2A prong 1, including: “Note that even if most humans would use a physical aid (e.g., pen and paper, a slide rule, or a calculator) to help them complete the recited calculation, the use of such physical aid does not negate the mental nature of this limitation.”; also see example # 49, analysis of claim 1, under step 2A prong 1: “Moreover, the recited mathematical calculation is simple enough that it can be practically performed in the human mind. Even if most humans would use a physical aid, like a pen and paper or a calculator, to make such calculations, the use of a physical aid would not negate the mental nature of this limitation.”.
With respect to math being simple enough to be performed mentally, see example 45, claim 1, analysis of limitation (b).
As such, the claims recite an abstract idea of both a mental process and mathematical concept.
Step 2A, prong 2
The claimed invention does not recite any additional elements that integrate the judicial exception into a practical application. Refer to MPEP §2106.04(d).
The following limitations are merely reciting the words "apply it" (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f), including the “Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more”:
Claim 1 – An information processing device comprising: a host bus adapter; a shared memory configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; a plurality of arithmetic circuits connected to the shared memory via a bus, each of the arithmetic circuits being configured to repeatedly update the first vector and the second vector; and a data exchange circuit connected to the shared memory via the bus, wherein each of the arithmetic circuits is configured to… and the information processing device is configured to transfer the N first variables after the update via the host bus adapter. - and the similar recitations in the other independent claims (e.g. the “calculators” in claim 10”, the “non-transitory computer-readable storage medium” in claim 14, etc.)
Claim 10 - a management server configured to – and the similar recitation found in claim 12
In claim 1, and the other independent claims (using claim 1 as representative): update at least a part of the first vector and at least a part of the second vector in parallel – should this be found not to be part of the abstract idea, then this would be part of the mere instructions to use a computer, and generic computer components, as a tool to implement the abstract idea.
To clarify, see the instant disclosure, page 4, last paragraph: “Parallel processing and/or distributed processing can be performed to solve a combinatorial optimization problem…” and page 14 ¶ 2: “Therefore, it is also possible to solve the Ising problem using a widely-spread digital computer.”
To clarify, these elements are described in a generic functional manner with no particular structure to the elements disclosed. See the instant disclosure, page 10, ¶ 2 including: “In addition, the number of processors allocated to the arithmetic circuit or data exchange circuit is not particularly limited. The same processor may also serve as the arithmetic circuit and the data exchange circuit as will be described later. In a case where plural types of processors 25 (for example, a CPU, a GPU, and an FPGA) are implemented in the calculation server, different types of processors may be allocated to the arithmetic circuit and the data exchange circuit” , also see page 37 ¶ 2, also see figures 1-2, and 4, and their accompanying descriptions.
The following limitations are generally linking to a particular technological environment/field of use, as discussed in MPEP § 2106.05(h):
and the plurality of arithmetic circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel – The above noted limitations reciting a litany of generic computer components, as well as the parallel updating limitation on the processing circuits in parallel are also be generally linking to a particular technological environment, akin to “Affinity Labs of Texas v. DirecTV, LLC, 838 F.3d 1253, 120 USPQ2d 1201 (Fed. Cir. 2016). In Affinity Labs, the claim recited a broadcast system in which a cellular telephone located outside the range of a regional broadcaster (1) requests and receives network-based content from the broadcaster via a streaming signal, (2) is configured to wirelessly download an application for performing those functions, and (3) contains a display that allows the user to select particular content. 838 F.3d at 1255-56, 120 USPQ2d at 1202. The court identified the claimed concept of providing out-of-region access to regional broadcast content as an abstract idea, and noted that the additional elements limited the wireless delivery of regional broadcast content to cellular telephones (as opposed to any and all electronic devices such as televisions, cable boxes, computers, or the like). 838 F.3d at 1258-59, 120 USPQ2d at 1204. Although the additional elements did limit the use of the abstract idea, the court explained that this type of limitation merely confines the use of the abstract idea to a particular technological environment (cellular telephones) and thus fails to add an inventive concept to the claims. 838 F.3d at 1259, 120 USPQ2d at 1204.” As discussed in MPEP § 2106.05(h)
To clarify on the above, see page 5, ¶ 1 to page 6 ¶ 2 of the instant disclosure: “In addition, the number of calculation servers used for solving the combinatorial optimization problem is not particularly limited. For example, the information processing system may include one calculation server… The calculation server may be a server installed in a data center or a desktop PC installed in an office…” – see MPEP § 2106.05(b)(I and II): “…It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014)…See, e.g., Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly")” and MPEP § 2106.05(f): “Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015).” – in sum, the instant disclosure conveys that only a single computer, e.g. a server, may be used to implement the abstract idea. The claimed features above are merely generally linking to a particular technical environment wherein more than one computer, and additional generic computer components, are used as a tool to implement the abstract idea instead of a single computer.
The use of the management server in claims 10 and 12 is also considered as generally linking to a particular technological environment for similar reasons as discussed above.
The following limitations are adding insignificant extra-solution activity to the judicial exception, as discussed in MPEP § 2106.05(g):
Representative claim 1 - a shared memory configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; a plurality of arithmetic circuits connected to the shared memory via a bus, …; and a data exchange circuit connected to the shared memory via the bus, wherein each of the arithmetic circuits is configured to retrieve the N first variables and the L second variables from the shared memory via the bus, … and the information processing device is configured to transfer the N first variables after the update via the host bus adapter. – mere data storage, data retrieval/gathering, and data transmitting
Claim 1 - the data exchange circuit is configured to execute at least one of a first exchange of the first vector and the second vector or a second exchange of the first coefficients between the arithmetic circuits; and similar recitations in the other independent claims – mere data gathering and/or transmission
Claims 10 and 12 (claim 10 as representative): the management server and its associated acts of transmitting and acquiring data are considered as mere data gathering/transmission
A claim that integrates a judicial exception into a practical application will apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that the claim is more than a drafting effort designed to monopolize the judicial exception. See MPEP § 2106.04(d).
The claimed invention does not recite any additional elements that integrate the judicial exception into a practical application. Refer to MPEP §2106.04(d).
Step 2B
The claimed invention does not recite any additional elements/limitations that amount to significantly more.
The following limitations are merely reciting the words "apply it" (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f), including the “Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more”:
Claim 1 – An information processing device comprising: a host bus adapter; a shared memory configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; a plurality of arithmetic circuits connected to the shared memory via a bus, each of the arithmetic circuits being configured to repeatedly update the first vector and the second vector; and a data exchange circuit connected to the shared memory via the bus, wherein each of the arithmetic circuits is configured to… and the information processing device is configured to transfer the N first variables after the update via the host bus adapter. - and the similar recitations in the other independent claims (e.g. the “calculators” in claim 10”, the “non-transitory computer-readable storage medium” in claim 14, etc.)
Claim 10 - a management server configured to – and the similar recitation found in claim 12
In claim 1, and the other independent claims (using claim 1 as representative): update at least a part of the first vector and at least a part of the second vector in parallel – should this be found not to be part of the abstract idea, then this would be part of the mere instructions to use a computer, and generic computer components, as a tool to implement the abstract idea.
To clarify, see the instant disclosure, page 4, last paragraph: “Parallel processing and/or distributed processing can be performed to solve a combinatorial optimization problem…” and page 14 ¶ 2: “Therefore, it is also possible to solve the Ising problem using a widely-spread digital computer.”
To clarify, these elements are described in a generic functional manner with no particular structure to the elements disclosed. See the instant disclosure, page 10, ¶ 2 including: “In addition, the number of processors allocated to the arithmetic circuit or data exchange circuit is not particularly limited. The same processor may also serve as the arithmetic circuit and the data exchange circuit as will be described later. In a case where plural types of processors 25 (for example, a CPU, a GPU, and an FPGA) are implemented in the calculation server, different types of processors may be allocated to the arithmetic circuit and the data exchange circuit” , also see page 37 ¶ 2, also see figures 1-2, and 4, and their accompanying descriptions.
The following limitations are generally linking to a particular technological environment/field of use, as discussed in MPEP § 2106.05(h):
and the plurality of arithmetic circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel – The above noted limitations reciting a litany of generic computer components, as well as the parallel updating limitation on the processing circuits in parallel are also be generally linking to a particular technological environment, akin to “Affinity Labs of Texas v. DirecTV, LLC, 838 F.3d 1253, 120 USPQ2d 1201 (Fed. Cir. 2016). In Affinity Labs, the claim recited a broadcast system in which a cellular telephone located outside the range of a regional broadcaster (1) requests and receives network-based content from the broadcaster via a streaming signal, (2) is configured to wirelessly download an application for performing those functions, and (3) contains a display that allows the user to select particular content. 838 F.3d at 1255-56, 120 USPQ2d at 1202. The court identified the claimed concept of providing out-of-region access to regional broadcast content as an abstract idea, and noted that the additional elements limited the wireless delivery of regional broadcast content to cellular telephones (as opposed to any and all electronic devices such as televisions, cable boxes, computers, or the like). 838 F.3d at 1258-59, 120 USPQ2d at 1204. Although the additional elements did limit the use of the abstract idea, the court explained that this type of limitation merely confines the use of the abstract idea to a particular technological environment (cellular telephones) and thus fails to add an inventive concept to the claims. 838 F.3d at 1259, 120 USPQ2d at 1204.” As discussed in MPEP § 2106.05(h)
To clarify on the above, see page 5, ¶ 1 to page 6 ¶ 2 of the instant disclosure: “In addition, the number of calculation servers used for solving the combinatorial optimization problem is not particularly limited. For example, the information processing system may include one calculation server… The calculation server may be a server installed in a data center or a desktop PC installed in an office…” – see MPEP § 2106.05(b)(I and II): “…It is important to note that a general purpose computer that applies a judicial exception, such as an abstract idea, by use of conventional computer functions does not qualify as a particular machine. Ultramercial, Inc. v. Hulu, LLC, 772 F.3d 709, 716-17, 112 USPQ2d 1750, 1755-56 (Fed. Cir. 2014)…See, e.g., Versata Development Group v. SAP America, 793 F.3d 1306, 1335, 115 USPQ2d 1681, 1702 (Fed. Cir. 2015) (explaining that in order for a machine to add significantly more, it must "play a significant part in permitting the claimed method to be performed, rather than function solely as an obvious mechanism for permitting a solution to be achieved more quickly")” and MPEP § 2106.05(f): “Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015).” – in sum, the instant disclosure conveys that only a single computer, e.g. a server, may be used to implement the abstract idea. The claimed features above are merely generally linking to a particular technical environment wherein more than one computer, and additional generic computer components, are used as a tool to implement the abstract idea instead of a single computer.
The use of the management server in claims 10 and 12 is also considered as generally linking to a particular technological environment for similar reasons as discussed above.
The following limitations are adding insignificant extra-solution activity to the judicial exception, as discussed in MPEP § 2106.05(g):
Representative claim 1 - a shared memory configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; a plurality of arithmetic circuits connected to the shared memory via a bus, …; and a data exchange circuit connected to the shared memory via the bus, wherein each of the arithmetic circuits is configured to retrieve the N first variables and the L second variables from the shared memory via the bus, … and the information processing device is configured to transfer the N first variables after the update via the host bus adapter. – mere data storage, data retrieval/gathering, and data transmitting
Claim 1 - the data exchange circuit is configured to execute at least one of a first exchange of the first vector and the second vector or a second exchange of the first coefficients between the arithmetic circuits; and similar recitations in the other independent claims – mere data gathering and/or transmission
Claims 10 and 12 (claim 10 as representative): the management server and its associated acts of transmitting and acquiring data are considered as mere data gathering/transmission
In addition, the above insignificant extra-solution activities are also considered as well-understood, routine, and conventional activities, as discussed in MPEP § 2106.05(d):
Representative claim 1 - An information processing device comprising: a host bus adapter; a shared memory configured to store N first variables which are elements of a first vector and L second variables among N second variables which are corresponding elements of a second vector; a plurality of arithmetic circuits connected to the shared memory via a bus, each of the arithmetic circuits being configured to repeatedly update the first vector and the second vector; and a data exchange circuit connected to the shared memory via the bus, wherein each of the arithmetic circuits is configured to… the data exchange circuit is configured to execute at least one of a first exchange of the first vector and the second vector or a second exchange of the first coefficients between the arithmetic circuits, and the plurality of arithmetic circuits are configured to update at least a part of the first vector and at least a part of the second vector in parallel …and the information processing device is configured to transfer the N first variables after the update via the host bus adapter – and similar limitations in the other independent claims, as well as in claims 10 and 12 the management server and its associated actions this is considered similar to the example WURC activity as discussed in MPEP § 2106.05(d)(II) of: “i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); …iii. Electronic recordkeeping, Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 225, 110 USPQ2d 1984 (2014) (creating and maintaining "shadow accounts"); Ultramercial, 772 F.3d at 716, 112 USPQ2d at 1755 (updating an activity log); iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93;” – and then see the below additional evidence
See the instant disclosure as discussed above, also see pages 43-46 including: “For example, the parallel calculation can be executed even in a configuration in which memories are arranged to be distributed in a plurality of calculation servers as in the information processing system 100 by using a message passing interface (MPI) in the PC cluster” and fig. 15, then see:
Nvidia, “MPI Solutions for GPUs”, accessed via WayBack Machine, archive Date Feb. 15th, 2019, URL: developer(dot)nvidia(dot)com/mpi-solutions-gpus – “MPI (Message Passing Interface) is a standardized and portable API for communicating data via messages (both point-to-point & collective) between distributed processes. MPI is frequently used in HPC to build applications that can scale on multi-node computer clusters. MPI is fully compatible