DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the amendment filed on Jan. 2nd 2026. The amendments are linked to the original application filed on Oct. 1st, 2021.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on Jan. 2nd, 2026 has been entered.
Response to Amendment
The Examiner thanks the applicant for the remarks, edits and arguments.
Regarding Claim Rejections – U.S.C. 112(b)
Applicant Remarks:
The applicant has cancelled Claim 13 and has amended claim 25 to no longer recite indefinite subject matter. The applicant believes the current amended claims comply with U.S.C. 112 and therefore request the rejection under U.S.C. 112(b) be withdrawn.
Examiner Response:
The examiner has reviewed the current amended claims and has noted the cancellation of claim 13 and amendments made to Claim 25. The examiner would also recognize that the current amended claims still recite Claim 23. Claim 23 appears to be a mirror claim of cancelled Claim 13 and Claim 23 has not been cancelled or amended. Claim 23 recites similar subject matter as the previously proposed claim 13 and therefore, the examiner has rejected Claim 23 for the previously stated reasons as Claim 13.
Claim 25 has been amended and the examiner believes the claim complies with U.S.C. 112(b) and no longer recites indefinite subject matter. Therefore, the examiner has withdrawn the 112(b) rejection for Claim 25. However, as stated above, the 112(b) rejection is still upheld for Claim 23.
Regarding Claim Rejections – U.S.C. 101
Applicant Remarks:
Regarding Step 2A Prong 1 of the Alice/Mayo Test, the applicant states they have amended claims to no longer recite abstract ideas or mental concepts. Further the applicant argues that the limitations in the independent claims cannot practically be performed by a human mind alone. The applicant argues the claims recite a process which includes using a hardware model and translates values from software to hardware, which a human cannot perform in the mind alone.
Regarding Step 2A Prong 2 of the Alice/Mayo Test, the applicant argues that even if the claims recite mental concepts or abstract ideas, they still recite a judicial exception which integrates into a practical application. According to the applicant, this is disclosed in the specification and the claims which reflect an improvement to a computing system or technical field. The applicant provides paragraph sections from the specification which they believe discloses the proposed improvements to a technical field or computing device. Further the applicant argues the improvements and technical process is reflected in the independent claims and cites limitations that disclose the inventive concept and improvements. For these reasons the applicant argues that the current claims comply with U.S.C. 101 and the rejection under U.S.C. 101 should be withdrawn.
Examiner Response:
The applicant argues that the amended claims no longer recite abstract ideas because limitations in the independent claims cannot be performed in a human mind. The Examiner would like to point to MPEP 2106.04(a)(2)(III)(C) which states, “In evaluating whether a claim that requires a computer recites a mental process, examiners should carefully consider the broadest reasonable interpretation of the claim in light of the specification. For instance, examiners should review the specification to determine if the claimed invention is described as a concept that is performed in the human mind and applicant is merely claiming that concept performed 1) on a generic computer, or 2) in a computer environment, or 3) is merely using a computer as a tool to perform the concept. In these situations, the claim is considered to recite a mental process.”. Taking this into consideration, the MPEP states that a limitation can recite abstract idea if the limitation requires using a computer as a tool to execute the abstract idea. While reviewing the amended claims the examiner has found multiple limitations which would use a computer as a tool to perform the abstract ideas. For example, Claim 1 recites, “mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;”. This limitation would be difficult to perform solely in a human mind as it requires computation and values contained in the computer. However, a person could use a computer as a tool to perform the actions of evaluating data and providing judgment, opinion or result from the evaluation. This would include identifying numbers to be mapped or assigned values to observed weights. Another example of an abstract idea recited in Claim 1, “optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and”. This limitation recites a process which can be performed with the assistance of a computer. A human is able to evaluate data and apply mathematical functions to the observed values and provide an output and attempt to meet a given threshold to minimize a given value.
The applicant has stated that limitations such as “... a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog nonvolatile memory device” and “applying the optimized plurality of conductance values to the analog non-volatile memory device” and state these limitations are not considered abstract ideas because they cannot be performed in a human mind. These amended limitations do not recite abstract ideas. These limitations are instead evaluated under Step 2A Prong 2 as additional elements and are considered in determining if the claims integrate the abstract concepts into a practical application. These limitations appear to recite mere instructions to apply an exception and would fall under 2106.05(f).
Next the applicant argues that the claims, in light of the specification, recite an improvement to a computer or to a technical field and points to the claims and the specification for examples of the improvement. The examiner would like to point to the MPEP 2106.05(a)(I), “Examples that the courts have indicated may not be sufficient to show an improvement in computer-functionality: … (iii) Mere automation of manual processes” (Emphasis added). Taking this into consideration the examiner believes that the specification and the claims disclose a process which can be performed in the human mind with the assistance of a generic computer as a tool. Further, the disclosed method of translating a neural network to hardware can be performed by a skilled individual. The examiner believes the claimed process can be used to automate a manual process of programing a hardware array to execute a neural network.
Finally, the examiner has reconsidered the amended claims and specification and reviewed the remarks from the applicant. The examiner believes the claims recite patent ineligible subject matter and does not comply with U.S.C. 101. Therefore, for the reasons above, the rejection under U.S.C. 101 is upheld, see 101 rejection below.
Regarding Claim Rejections – U.S.C. 102
Applicant Remarks:
The applicant has made amendments to the independent claims and has cancelled Claims 2 and 13. The applicant argues that the current proposed art under the 102 rejection fails to anticipate each and every element of the proposed claims. Specifically, the applicant argues that the prior art, Ambrogio, fails to disclose the limitation, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device,” from the independent claims. Further the applicant argues that Ambrogio fails to disclose: “"a hardware model" which corresponds to "an analog non-volatile memory device", where the "hardware model" "simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability" for determining "a plurality of hardware-adjusted conductance values compensating for the hardware effects.".
The applicant argues that Ambrogio fails to anticipate each and every element of the amended claims under the 102 rejection. For these arguments stated above and in the provided response, the applicant believes the 102 rejection should be withdrawn.
Examiner Response:
The examiner has considered the amended claims and the art Ambrogio. The examiner believes, as stated by the applicant, the art fails to anticipate each and every element of the claims under U.S.C. 102. The examiner would like to note that the art Ambrogio contains similar elements to the claimed invention however, as stated, it fails to anticipate each and every element of the claims in accordance to U.S.C. 102. After each amendment, the examiner must perform a compete search of the claims to ensure it complies with U.S.C. 102. After completing this search, the examiner was unable to find prior art, at this time, which solely anticipates each and every element of the amended claims. Therefore, the examiner has withdrawn the rejection under U.S.C. 102.
Regarding Claim Rejections – U.S.C. 103
Applicant Remarks:
The applicant has made amendments to the independent claims and the applicant states that the amendments are not taught or disclosed by Ambrogio. The applicant argues the art used for the dependent claims would fail to disclose or teach the missing elements of Ambrogio. The applicant argues the art used in the 103 rejection would fail to teach the each of the limitations of the dependent claims by virtue of dependency to the independent claims. Therefore, the applicant requests the rejection under U.S.C. 103 be withdrawn.
Examiner Response:
The examiner has considered the amended claims and the combination of arts previously disclosed. Further the examiner has conducted a complete search to ensure no other art discloses the claimed subject matter. While searching, the examiner has found new art which is able to teach, in combination of previously proposed art, the claimed subject matter. The examiner believes that the combination of previously proposed art and the newly discovered art, Wu et al (US 20220374688 A1), would have been obvious to an ordinary person of the art to disclose the amended claims. Therefore, the examiner believes the current amended claims fails to comply with U.S.C. 103 and the rejection has been upheld.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 23 is rejected under 35 U.S.C. 112(b) or35 U.S.C.112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 23 recites the limitation, "wherein the hardware model comprises one or more of weight programming error, read noise, conductance drift, and drift variability." (Emphasis added). The "hardware model" per the claims has already been defined in claim 16, which recites, "the hardware model corresponding to an analog non-volatile memory device;". Under this interpretation it is unclear whether the "hardware model" is an "analog non-volatile memory device" or it is "weight programming error, read noise, conductance drift, and drift variability". Therefore claim 23 is rejected because it fails to particularly point out the subject matter. For examination purposes, the limitation, "wherein the hardware model comprises one or more of weight programming error, read noise, conductance drift, and drift variability." Will be interpreted to mean, "wherein the hardware model contains of one or more methods ... ". Appropriate action is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, 3-12, 14-16, and 18-25 are rejected under 35 U.S.C 101 because the claimed invention is directed to an abstract idea without significantly more. The analysis of the claims will follow the 2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed. Reg. 50 (“2019 PEG”).
Claim 1
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 1 recites, “A method of adapting an artificial neural network for deployment to an analog non-volatile memory device, the method comprising:” therefore it is directed to the statutory category of a process.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“reading a plurality of target synaptic weights of an artificial neural network;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to make observation and evaluations based on observations, this includes observing values of a network. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluation data and map data from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and provide judgements or opinions to optimize or transform data. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog nonvolatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog nonvolatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 2 (Cancelled)
Claim 3
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 4
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged, normalized error metric.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 5
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged normalized mean squared error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 6
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged normalized mean absolute error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 7
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a down-sampled timeweighted normalized mean squared error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 8
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a down-sampled timeweighted normalized mean absolute error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 9
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein optimizing the plurality of conductance values comprises determining a coefficient and a constant adjustment to each of the plurality of conductance values.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 10
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 11
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 12
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein each of the plurality of target synaptic weights is mapped to four conductance values, G+, G-, g+, and g-, wherein G+ > g+ and G- > g-, and G+, g+ are added while G-, g- are subtracted to obtain a resulting current.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 13 (Cancelled)
Claim 14
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 15
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the analog non-volatile memory device comprises an array of resistive elements, the array providing a vector of current outputs equal to the analog vector-matrix product between (i) a vector of voltage inputs to the array encoding a vector of analog input values and (ii) the plurality of conductance values within the array.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the analog non-volatile memory device comprises an array of resistive elements, the array providing a vector of current outputs equal to the analog vector-matrix product between (i) a vector of voltage inputs to the array encoding a vector of analog input values and (ii) the plurality of conductance values within the array.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 16
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 16 recites, A system comprising: an analog non-volatile memory device; and a computing node comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor of the computing node to cause the processor to perform a method comprising:” therefore it is directed to the statutory category of a machine.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“reading a plurality of target synaptic weights of an artificial neural network;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to make observation and evaluations based on observations, this includes observing values of a network. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluation data and map data from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and provide judgements or opinions to optimize or transform data. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog nonvolatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog nonvolatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 17 (Cancelled)
Claim 18
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “storing the optimized plurality of conductance values.” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 19
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged, normalized error metric.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 20
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein the error metric is a time-averaged normalized mean squared error, a time-averaged normalized mean absolute error, a down-sampled time-weighted normalized mean squared error, or a down-sampled time-weighted normalized mean absolute error.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 21
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 22
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 23
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the hardware model comprises one or more of weight programming error, read noise, conductance drift, and drift variability.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the hardware model comprises one or more of weight programming error, read noise, conductance drift, and drift variability.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 24
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to apply mathematical concepts and processes to perform evaluations of software. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 25
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 25 recites, “A computer program product for adapting an artificial neural network for deployment to an analog non-volatile memory device, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:” therefore it is directed to the statutory category of a machine.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“reading a plurality of target synaptic weights of an artificial neural network;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to make observation and evaluations based on observations, this includes observing values of a network. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data using pen and paper or a computer as a tool to map values from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluation data and map data from one source to another. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and provide judgements or opinions to optimize or transform data. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 9-12, 14-16, 18, and 21-25 are rejected under 35 U.S.C. 103 as being unpatentable over Ambrogio et al, (Ambrogio et al, "Accelerating Deep Neural Networks with Analog Memory Devices, 2020, hereinafter "Ambrogio") in view of Wu et al, (Wu et al, “TRAINING METHOD OF NEURAL NETWORK BASED ON MEMRISTOR AND TRAINING DEVICE THEREOF”, US 20220374688 A1, Filed Mar. 6th, 2020, hereinafter “Wu”).
Regarding claim 1, Ambrogio discloses, “A method of adapting an artificial neural network for deployment to an analog non-volatile memory device, the method comprising:” (Introduction, pp. 149; "We use arrays of emerging non-volatile memories (NVM), such as Phase Change Memory, to implement the synaptic weights connecting layers of neurons.", This article discloses a method to assist in the implementation of an artificial neural network to an analog device.)
“reading a plurality of target synaptic weights of an artificial neural network;” (Neural Network Training Using Non-Volatile Memory, pp. 149; "Fig. la shows the schematic picture of a crossbar array implementing a Multiply-and-Accumulate operation (MACC) in the array, followed by the activation function f() at the at the South Periphery circuitry:
y
=
f
(
∑
w
i
j
x
i
)
where
w
i
j
are the weights implemented with PCM devices, and
x
i
are the inputs at the West Periphery, encoded as pulses with fixed amplitude and varying length [10]." In order for the weights of the neural network to be implemented into the PCM they must first be read by the system.)
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” (Figure 3 and Description, pp. 150; "Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices." This figure shows the weights of the neural network mapped into two pairs.)
Ambrogio fails to explicitly disclose, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog nonvolatile memory device;”, “mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;”, “optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and”, and “applying the optimized plurality of conductance values to the analog non-volatile memory device.”.
Wu discloses, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog nonvolatile memory device;” (Detailed Description, pp. 4, [0063]; “For example, in the embodiment of the present disclosure, the training method is a hybrid training method. For example, step S110 is an off-chip training process, that is, the training process before the weight parameters are written into the memristor array, and step S120 is an on-chip training process, that is, the training process after the weight parameters are written into the memristor array.” The model in this application is able to train a machine learning model on software and translate the model to hardware. The system will train the model and apply weights to the memristor array.) and (Detailed Description, pp. 4, [0055]; “For example, the weight parameter network is implemented by a memristor array as shown in FIG. 2. For example, the weight parameter can be directly programmed as the conductance value of the memristor array.” As stated, the weights parameters are implemented on the memristor array as conductance values.) And (Detailed Description, pp. 7, [0098]; “For example, as shown in FIG. 10, the forward calculation operation and the reverse calculation operation are performed on the memristor array, into which the weight parameters after being trained are written, and the conductance values of at least part of the memristors are updated based on the result of the forward calculation operation and the result of the reverse calculation operation, to adjust the weight parameters corresponding to the at least part of the memristors, and finally, after a plurality of cycles of training iterations until convergence, non-ideal characteristics, such as device yield problems, inconsistencies, conductance drift, and random fluctuations, can be adaptively compatible, thereby restoring system performance, for example, improving recognition accuracy.” As stated, the during the training phase of the hardware the weights are adjusted after a forward and backward pass. This training on the hardware is designed to account for the processing environment of the model on hardware.)
“mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;” (Detailed Description, pp. 5, [0074-0075]; “For example, FIG. 7 is a flowchart of at least another example of step S110 as shown in FIG. 3. In the example shown in FIG. 7, step S110 includes step S112. [0075] Step S112: performing a quantization operation on the weight parameters after being trained based on the constraint of the conductance state of the memristor array to obtain quantized weight parameters, and writing the quantized weight parameters into the memristor array.” During training the model will train the weights of the model on software and apply the trained parameters to hardware. This requires mapping weights from the model to the memristor array.)
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” (Detailed Description, pp. 5, [0098]; “For example, as shown in FIG. 10, the forward calculation operation and the reverse calculation operation are performed on the memristor array, into which the weight parameters after being trained are written, and the conductance values of at least part of the memristors are updated based on the result of the forward calculation operation and the result of the reverse calculation operation, to adjust the weight parameters corresponding to the at least part of the memristors, and finally, after a plurality of cycles of training iterations until convergence, non-ideal characteristics, such as device yield problems, inconsistencies, conductance drift, and random fluctuations, can be adaptively compatible, thereby restoring system performance, for example, improving recognition accuracy.” The model in this application is able to train a software model and optimize the model to execute efficiently in a hardware processing environment. This optimization process is achieved through a forward and backward pass to minimize the different between the software and hardware models.)
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” (Detailed Description, pp. 5, [0073-0075]; “[0073] In this case, the scaling operation, such as a quantization operation, needs to be performed on the weight parameters after being trained according to the value range of the conductance values of the memristor array, that is, after scaling the weight parameters after being trained to the same range as the value range of the conductance values of the memristor array, the weight parameters after being trained are written into the memristor array. [0074] For example, FIG. 7 is a flowchart of at least another example of step S110 as shown in FIG. 3. In the example shown in FIG. 7, step S110 includes step S112. [0075] Step S112: performing a quantization operation on the weight parameters after being trained based on the constraint of the conductance state of the memristor array to obtain quantized weight parameters, and writing the quantized weight parameters into the memristor array.” This model is able to adjust or scale a model to match the hardware it is being applied to. This application discloses a quantization process that is applied to the weights to optimize the weights to the hardware model. These values are then applied to the hardware model after training.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Ambrogio and Wu. Ambrogio teaches a method to use hardware to accelerate and execute neural networks. Wu teaches a method to translate a machine learning model from software to hardware using a hybrid training method. One of ordinary skill would have motivation to combine a model that is able to implement neural networks on hardware with a model that is able to translate a neural network to hardware from software, “The training method and the training device provided by the embodiments of the present disclosure make up for the shortcomings of the on-chip training method and the off-chip training method used in the case where the neural network system is deployed in the hardware system based on the memristor array, and from the perspective of the neural network system, the training method and the training device can solve the problem, such as the performance degradation of the neural network system caused by non-ideal characteristics such as device fluctuations, and efficiently and cost-effectively deploys various neural networks in the hardware system based on the memristor array.”(Wu, Detailed Description, [0052], pp. 4).
Regarding claim 3, Ambrogio discloses, “storing the optimized plurality of conductance values.” (Neural Network Training Using Non- Volatile Memory, pp. 150; "This transfer procedure enables accurate and non-volatile storage of the weights, thanks to a closed-loop tuning procedure that carefully programs the PCMs [11]."Each iteration the optimized values are stored and will be used again in a closed loop to be further optimized.)
Regarding claim 9, Wu discloses, “wherein optimizing the plurality of conductance values comprises determining a coefficient and a constant adjustment to each of the plurality of conductance values.” (Detailed Description, pp. 7, [0102-0103]; “FIG. 11C is a schematic diagram of an update operation provided by at least one embodiment of the present disclosure. As shown in FIG. 11C, assuming that the equivalent conductance weight parameter matrix of the memristor array is W, the input is a voltage Vwnte greater than the threshold voltage of the memristor array, then the update operation of the corresponding neural network can be expressed as: W=Wnew. For example, if the update operation is to increase the conductance value of at least one memristor of the memristor array, a forward voltage is applied to an upper electrode and a lower electrode of the at least one memristor, such as the V write 1 and V write 2 shown in FIG. 11C; if the update operation is to reduce the conductance value of at least one memristor of the memristor array, a reverse voltage is applied to an upper electrode and a lower electrode of the at least one memristor, such as the V write 1 and V write 2 shown in FIG. 11C. [0103] For example, in step S121, the forward calculation operation is performed on all memristor arrays of the neural network, and the reverse calculation operation is performed on at least part of the memristors in the memristor array of the neural network.” The values of the array are updated after a forward and backward pass. The system will be able to update each of the values based on the information received from the forward/backward pass. The determined values are then applied to the weights in the hardware model.)
Regarding claim 10, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150; "For this reason the single weight is encoded as in Fig. 1d:
W
=
F
G
+
-
G
-
+
g
-
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and Fis a magnification factor [9], [10]." Each of the weights are mapped to conductance values of opposite signs.)
Regarding claim 11, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150; "For this reason the single weight is encoded as in Fig. 1d:
W
=
F
G
+
-
G
-
+
g
-
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and Fis a magnification factor [9], [10]." The weights are mapped based on a least, lower magnitude, significant pair and a most, higher magnitude, significant pair.)
Regarding claim 12, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to four conductance values, G+, G-, g+, and g-, wherein G+ > g+ and G- > g-, and G+, g+ are added while G-, g- are subtracted to obtain a resulting current.” (Neural Network Inference Using Non-Volatile Memory, pp. 150; "Fig. 3. Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices. The total weight (in effective conductance, e.g. μS) is the weighted sum of the 4 PCM conductance values. In this case the least Significant Pair is decreased by a gain factor F [7].” In this equation you can see that the G is subtracted from the
G
+
and added to
g
+
minus
g
-
.)
Regarding claim 14, Wu discloses, “wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” (Detailed Description, pp. 5, [0071]; “It should be noted that the constraint of the conductance state of the memristor array and the values of the corresponding quantized weight parameters are determined according to the actual situations, and the embodiments of the present disclosure are not limited to this case. For example, FIG. 6 is a schematic diagram showing cumulative probabilities of a memristor under 32 conductance states provided by at least one embodiment of the present disclosure. As shown in FIG. 6, the cumulative probabilities of the memristor under 32 conductance states do not overlap each other, and the cumulative probability in each conductance state can reach more than 99.9%, indicating that the memristor array obtained according to the training method has good consistency under 32 conductance states.” The weights of the model are translated to conductance values. The weights are adjusted and optimized to the different states of the hardware model. And (Drawings, Fig. 10; This drawing also discloses an iterative training process that executes over a training period of time or until convergence.)
Regarding claim 15, Ambrogio discloses, “wherein the analog non-volatile memory device comprises an array of resistive elements, the array providing a vector of current outputs equal to the analog vector-matrix product between (i) a vector of voltage inputs to the array encoding a vector of analog input values and (ii) the plurality of conductance values within the array.” (Neural Network Training using Non-Volatile Memory, pp. 149; "Crossbar arrays of NVM devices ideally map Fully connected (FC) weight layers in neural networks, thus providing high computing parallelism." A crossbar array of a Non-Volatile Memory device is used for this experiment. Under the broadest reasonable interpretation, a crossbar array contains the claimed subject matter.)
Regarding claim 16, Ambrogio discloses, “A system comprising: an analog non-volatile memory device; and a computing node comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor of the computing node to cause the processor to perform a method comprising:” (LSTM inference results, pp. 151; "To test the accuracy of our programming scheme, we trained in Matlab and in PyTorch, a common framework for DNN simulation, a Long-Short Term Memory (LSTM) network on the book' Alice in Wonderland'.", In order to test the results in this article they used different programming packages, which can only be accessed on a computer system containing memory and a processor.)
“reading a plurality of target synaptic weights of an artificial neural network;” (Neural Network Training Using Non-Volatile Memory, pp. 149; "Fig. la shows the schematic picture of a crossbar array implementing a Multiply-and-Accumulate operation (MACC) in the array, followed by the activation function f() at the at the South Periphery circuitry:
y
=
f
(
∑
w
i
j
x
i
)
where
w
i
j
are the weights implemented with PCM devices, and
x
i
are the inputs at the West Periphery, encoded as pulses with fixed amplitude and varying length [10]." In order for the weights of the neural network to be implemented into the PCM they must first be read by the system.)
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” (Figure 3 and Description, pp. 150; "Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices." This figure shows the weights of the neural network mapped into two pairs.)
Ambrogio fails to explicitly disclose, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog nonvolatile memory device;”, “mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;”, “optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and”, and “applying the optimized plurality of conductance values to the analog non-volatile memory device.”.
However, Wu discloses, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to the analog nonvolatile memory device;” (Detailed Description, pp. 4, [0063]; “For example, in the embodiment of the present disclosure, the training method is a hybrid training method. For example, step S110 is an off-chip training process, that is, the training process before the weight parameters are written into the memristor array, and step S120 is an on-chip training process, that is, the training process after the weight parameters are written into the memristor array.” The model in this application is able to train a machine learning model on software and translate the model to hardware. The system will train the model and apply weights to the memristor array.) and (Detailed Description, pp. 4, [0055]; “For example, the weight parameter network is implemented by a memristor array as shown in FIG. 2. For example, the weight parameter can be directly programmed as the conductance value of the memristor array.” As stated, the weights parameters are implemented on the memristor array as conductance values.) And (Detailed Description, pp. 7, [0098]; “For example, as shown in FIG. 10, the forward calculation operation and the reverse calculation operation are performed on the memristor array, into which the weight parameters after being trained are written, and the conductance values of at least part of the memristors are updated based on the result of the forward calculation operation and the result of the reverse calculation operation, to adjust the weight parameters corresponding to the at least part of the memristors, and finally, after a plurality of cycles of training iterations until convergence, non-ideal characteristics, such as device yield problems, inconsistencies, conductance drift, and random fluctuations, can be adaptively compatible, thereby restoring system performance, for example, improving recognition accuracy.” As stated, the during the training phase of the hardware the weights are adjusted after a forward and backward pass. This training on the hardware is designed to account for the processing environment of the model on hardware.)
“mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;” (Detailed Description, pp. 5, [0074-0075]; “For example, FIG. 7 is a flowchart of at least another example of step S110 as shown in FIG. 3. In the example shown in FIG. 7, step S110 includes step S112. [0075] Step S112: performing a quantization operation on the weight parameters after being trained based on the constraint of the conductance state of the memristor array to obtain quantized weight parameters, and writing the quantized weight parameters into the memristor array.” During training the model will train the weights of the model on software and apply the trained parameters to hardware. This requires mapping weights from the model to the memristor array.)
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” (Detailed Description, pp. 5, [0098]; “For example, as shown in FIG. 10, the forward calculation operation and the reverse calculation operation are performed on the memristor array, into which the weight parameters after being trained are written, and the conductance values of at least part of the memristors are updated based on the result of the forward calculation operation and the result of the reverse calculation operation, to adjust the weight parameters corresponding to the at least part of the memristors, and finally, after a plurality of cycles of training iterations until convergence, non-ideal characteristics, such as device yield problems, inconsistencies, conductance drift, and random fluctuations, can be adaptively compatible, thereby restoring system performance, for example, improving recognition accuracy.” The model in this application is able to train a software model and optimize the model to execute efficiently in a hardware processing environment. This optimization process is achieved through a forward and backward pass to minimize the different between the software and hardware models.)
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” (Detailed Description, pp. 5, [0073-0075]; “[0073] In this case, the scaling operation, such as a quantization operation, needs to be performed on the weight parameters after being trained according to the value range of the conductance values of the memristor array, that is, after scaling the weight parameters after being trained to the same range as the value range of the conductance values of the memristor array, the weight parameters after being trained are written into the memristor array. [0074] For example, FIG. 7 is a flowchart of at least another example of step S110 as shown in FIG. 3. In the example shown in FIG. 7, step S110 includes step S112. [0075] Step S112: performing a quantization operation on the weight parameters after being trained based on the constraint of the conductance state of the memristor array to obtain quantized weight parameters, and writing the quantized weight parameters into the memristor array.” This model is able to adjust or scale a model to match the hardware it is being applied to. This application discloses a quantization process that is applied to the weights to optimize the weights to the hardware model. These values are then applied to the hardware model after training.)
Regarding claim 18, Ambrogio discloses, “storing the optimized plurality of conductance values.” (Neural Network Training Using Non- Volatile Memory, pp. 150; "This transfer procedure enables accurate and non-volatile storage of the weights, thanks to a closed-loop tuning procedure that carefully programs the PCMs [11]." Each iteration the optimized values are stored and will be used again in a closed loop to be further optimized.)
Regarding claim 21, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having opposite signs.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150; "For this reason the single weight is encoded as in Fig. 1d: W = F(
G
+
-
G
-
) + g -
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and Fis a magnification factor [9], [10]." Each of the weights are mapped to conductance values of opposite signs.)
Regarding claim 22, Ambrogio discloses, “wherein each of the plurality of target synaptic weights is mapped to at least two conductance values having different magnitudes.” (Neural Network Training Using Non-Volatile Memory, pp. 149-150; "For this reason the single weight is encoded as in Fig. 1d: W = F(
G
+
-
G
-
) + g -
g
s
h
, where
G
+
and
G
-
are encoded with PCMs representing the most significant pair (MSP), g and
g
s
h
are implemented with three MOSFETs and one capacitor(3T1C) structures encoding the least significant pair (LSP), and Fis a magnification factor [9], [10]." The weights are mapped based on a least, lower magnitude, significant pair and a most, higher magnitude, significant pair.)
Regarding claim 23, Wu discloses, “wherein the hardware model comprises one or more of weight programming error, read noise, conductance drift, and drift variability.” (Detailed Description, pp. 7, [0098]; “For example, as shown in FIG. 10, the forward calculation operation and the reverse calculation operation are performed on the memristor array, into which the weight parameters after being trained are written, and the conductance values of at least part of the memristors are updated based on the result of the forward calculation operation and the result of the reverse calculation operation, to adjust the weight parameters corresponding to the at least part of the memristors, and finally, after a plurality of cycles of training iterations until convergence, non-ideal characteristics, such as device yield problems, inconsistencies, conductance drift, and random fluctuations, can be adaptively compatible, thereby restoring system performance, for example, improving recognition accuracy.” The system proposed in this application is able to adjust the weights of the applied hardware model to account for hardware variations. As stated above, the model will be trained to minimize the difference between the software and hardware models.)
Regarding claim 24, Wu discloses, “wherein optimizing the plurality of conductance values comprises evolving the plurality of conductance values as a function of time based on the hardware model.” (Detailed Description, pp. 5, [0071]; “It should be noted that the constraint of the conductance state of the memristor array and the values of the corresponding quantized weight parameters are determined according to the actual situations, and the embodiments of the present disclosure are not limited to this case. For example, FIG. 6 is a schematic diagram showing cumulative probabilities of a memristor under 32 conductance states provided by at least one embodiment of the present disclosure. As shown in FIG. 6, the cumulative probabilities of the memristor under 32 conductance states do not overlap each other, and the cumulative probability in each conductance state can reach more than 99.9%, indicating that the memristor array obtained according to the training method has good consistency under 32 conductance states.” The weights of the model are translated to conductance values. The weights are adjusted and optimized to the different states of the hardware model. And (Drawings, Fig. 10; This drawing also discloses an iterative training process that executes over a training period of time or until convergence.)
Regarding claim 25, Ambrogio discloses, “A computer program product for adapting an artificial neural network for deployment to an analog non-volatile memory device, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:” (LSTM inference results, pp. 151; "To test the accuracy of our programming scheme, we trained in Matlab and in PyTorch, a common framework for DNN simulation, a Long-Short Term Memory (LSTM) network on the book' Alice in Wonderland'.", In order to test the results in this article they used different programming packages, which can only be accessed on a computer system containing memory and a processor.)
“reading a plurality of target synaptic weights of an artificial neural network;” (Neural Network Training Using Non-Volatile Memory, pp. 149; "Fig. la shows the schematic picture of a crossbar array implementing a Multiply-and-Accumulate operation (MACC) in the array, followed by the activation function f() at the at the South Periphery circuitry:
y
=
f
(
∑
w
i
j
x
i
)
where
w
i
j
are the weights implemented with PCM devices, and
x
i
are the inputs at the West Periphery, encoded as pulses with fixed amplitude and varying length [10]." In order for the weights of the neural network to be implemented into the PCM they must first be read by the system.)
“mapping the plurality of target synaptic weights to a plurality of conductance values, each of the plurality of target synaptic weights being mapped to at least one of the plurality of conductance values;” (Figure 3 and Description, pp. 150; "Schematic for mapping weights into two pairs (Most Significant and Least Significant Pair) of phase change memory (PCM) devices." This figure shows the weights of the neural network mapped into two pairs.)
Ambrogio fails to explicitly disclose, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;”, “mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;”, “optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and”, and “applying the optimized plurality of conductance values to the analog non-volatile memory device.”
However, Wu discloses, “providing the plurality of conductance values to a hardware model that simulates hardware effects associated with weight programming errors, read noise, conductance drift, and drift variability, thereby determining a plurality of hardware-adjusted conductance values compensating for the hardware effects, the hardware model corresponding to an analog non-volatile memory device;” (Detailed Description, pp. 4, [0063]; “For example, in the embodiment of the present disclosure, the training method is a hybrid training method. For example, step S110 is an off-chip training process, that is, the training process before the weight parameters are written into the memristor array, and step S120 is an on-chip training process, that is, the training process after the weight parameters are written into the memristor array.” The model in this application is able to train a machine learning model on software and translate the model to hardware. The system will train the model and apply weights to the memristor array.) and (Detailed Description, pp. 4, [0055]; “For example, the weight parameter network is implemented by a memristor array as shown in FIG. 2. For example, the weight parameter can be directly programmed as the conductance value of the memristor array.” As stated, the weights parameters are implemented on the memristor array as conductance values.) And (Detailed Description, pp. 7, [0098]; “For example, as shown in FIG. 10, the forward calculation operation and the reverse calculation operation are performed on the memristor array, into which the weight parameters after being trained are written, and the conductance values of at least part of the memristors are updated based on the result of the forward calculation operation and the result of the reverse calculation operation, to adjust the weight parameters corresponding to the at least part of the memristors, and finally, after a plurality of cycles of training iterations until convergence, non-ideal characteristics, such as device yield problems, inconsistencies, conductance drift, and random fluctuations, can be adaptively compatible, thereby restoring system performance, for example, improving recognition accuracy.” As stated, the during the training phase of the hardware the weights are adjusted after a forward and backward pass. This training on the hardware is designed to account for the processing environment of the model on hardware.)
“mapping the plurality of hardware-adjusted conductance values to a plurality of hardware-adjusted synaptic weights;” (Detailed Description, pp. 5, [0074-0075]; “For example, FIG. 7 is a flowchart of at least another example of step S110 as shown in FIG. 3. In the example shown in FIG. 7, step S110 includes step S112. [0075] Step S112: performing a quantization operation on the weight parameters after being trained based on the constraint of the conductance state of the memristor array to obtain quantized weight parameters, and writing the quantized weight parameters into the memristor array.” During training the model will train the weights of the model on software and apply the trained parameters to hardware. This requires mapping weights from the model to the memristor array.)
“optimizing the plurality of conductance values in order to minimize an error metric between the target synaptic weights and the hardware-adjusted synaptic weights; and” (Detailed Description, pp. 5, [0098]; “For example, as shown in FIG. 10, the forward calculation operation and the reverse calculation operation are performed on the memristor array, into which the weight parameters after being trained are written, and the conductance values of at least part of the memristors are updated based on the result of the forward calculation operation and the result of the reverse calculation operation, to adjust the weight parameters corresponding to the at least part of the memristors, and finally, after a plurality of cycles of training iterations until convergence, non-ideal characteristics, such as device yield problems, inconsistencies, conductance drift, and random fluctuations, can be adaptively compatible, thereby restoring system performance, for example, improving recognition accuracy.” The model in this application is able to train a software model and optimize the model to execute efficiently in a hardware processing environment. This optimization process is achieved through a forward and backward pass to minimize the different between the software and hardware models.)
“applying the optimized plurality of conductance values to the analog non-volatile memory device.” (Detailed Description, pp. 5, [0073-0075]; “[0073] In this case, the scaling operation, such as a quantization operation, needs to be performed on the weight parameters after being trained according to the value range of the conductance values of the memristor array, that is, after scaling the weight parameters after being trained to the same range as the value range of the conductance values of the memristor array, the weight parameters after being trained are written into the memristor array. [0074] For example, FIG. 7 is a flowchart of at least another example of step S110 as shown in FIG. 3. In the example shown in FIG. 7, step S110 includes step S112. [0075] Step S112: performing a quantization operation on the weight parameters after being trained based on the constraint of the conductance state of the memristor array to obtain quantized weight parameters, and writing the quantized weight parameters into the memristor array.” This model is able to adjust or scale a model to match the hardware it is being applied to. This application discloses a quantization process that is applied to the weights to optimize the weights to the hardware model. These values are then applied to the hardware model after training.)
Claims 4-8, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Ambrogio and Wu in view of AUTHOR NAME, (Brown et al., “NEURAL NETWORK TRAINING USING ROBUST TEMPORAL ENSEMBLING, US 20220101112 A1, Filed Sept. 25, 2020, hereinafter "Brown").
Regarding claim 4, Brown discloses, “wherein the error metric is a time-averaged, normalized error metric.” (Detailed Description, pp. 62, [0070]; "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function.) and (Detailed Description, pp. 63, [0074]; "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which in the broadest reasonable interpretation can be time-weighted.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Ambrogio, Wu and Brown. Ambrogio teaches a method to use hardware to accelerate and execute neural networks. Wu teaches a method to translate a machine learning model from software to hardware using a hybrid training method. Brown teaches a robust training method for generated neural networks. One of ordinary skill would have motivation to combine a model that is able to implement neural networks on hardware with a model that is able to translate a neural network to hardware from software with a system that implement different methods to train a neural network in software, “techniques described herein achieves various technical advantages, including but not limited to: an ability to process training data with multiple noisy label sets and achieve high accuracy when performing image classification without label filtering, label refurbishment, and/or large sets of trusted data, an ability to utilize a wide variability of multiple label sets and training data to produce an accurate and robust model, an ability to collect data from and learn from noisy training data to train a model, an ability to achieve corruption robustness to unforeseen data shifts encountered during deployment, and others." (Detailed Description, pp. 61, [0060]).
Regarding claim 5, Brown discloses, “wherein the error metric is a time-averaged normalized mean squared error.” (Detailed Description, pp. 62, [0070]; "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized mean squared error metric and a loss function.) and (Detailed Description, pp. 63, [0074]; "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data overtime which in the broadest reasonable interpretation can be time-weighted.)
Regarding claim 6, Brown discloses, “wherein the error metric is a time-averaged normalized mean absolute error.” (Detailed Description, pp. 62, [0070]; "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean absolute error metric.) and (Detailed Description, pp. 63, [0074]; "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data overtime which in the broadest reasonable interpretation can be time-weighted.)
Regarding claim 7, Brown discloses, “wherein the error metric is a down-sampled timeweighted normalized mean squared error.” (Detailed Description, pp. 62, [0070]; "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean squared error metric.) and (Detailed Description, pp. 63, [0074]; "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which in the broadest reasonable interpretation can be time-weighted. This data can also be down and up sampled in some embodiments.)
Regarding claim 8, Brown discloses, “wherein the error metric is a down-sampled timeweighted normalized mean absolute error.” (Detailed Description, pp. 62, [0070]; "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean absolute error Page 69 metric.) and (Detailed Description, pp. 63, [0074]; "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which in the broadest reasonable interpretation can be time-weighted. This data can also be down and up sampled in some embodiments.)
Regarding claim 19, Brown discloses, “wherein the error metric is a time-averaged, normalized error metric.” (Detailed Description, pp. 62, [0070]; "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function.) and (Detailed Description, pp. 63, [0074]; "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data over time which in the broadest reasonable interpretation can be time-weighted.)
Regarding claim 20, Brown discloses, “wherein the error metric is a time-averaged normalized mean squared error, a time-averaged normalized mean absolute error, a down-sampled time-weighted normalized mean squared error, or a down-sampled time-weighted normalized mean absolute error.” (Detailed Description, pp. 62, [0070]; "In at least one embodiment, techniques described herein leverages generalized cross entropy GCE (which is a theoretically grounded noise-robust loss function that can be seen as a generalization of mean absolute error (MAE) and categorical cross entropy (CCE)), AugMix (a stochastic augmentation strategy which is described in more detail below with respect to FIG. 3), an exponential moving average of model weights for generating pseudo-labels, and a mean squared error consistency loss between pseudo-labels on un-augmented input versus model predictions on augmented input. In an effort to exploit benefits of both MAE and CCE, a negative Box Cox transformation may be used as a loss function:
L
q
f
x
i
,
y
i
=
j
=
1
-
f
j
x
i
q
q
. Where
q
∈
0,1
, and fj denotes an j-th element off. GCE is equivalent to CCE for
lim
q
→
0
L
q
and becomes MAE (e.g., unhinged loss) when q=l, and that optimization of Equation I above may be a generalization of maximum likelihood. In at least one embodiment, techniques described herein utilize a consistency regularization, which works under an assumption that a model should output similar predictions given augmented versions of a same input.” This teaches the use of a normalized error metric and a loss function. This section includes a mean squared error metric and mean absolute error metric.) and (Detailed Description, pp. 63, [0074]; "In at least one embodiment, modifications to audio data from content input 302 includes (but not limited to) at least modifying amplitude energy, energy, frequency responses in audio signal, samples (e.g., up sampling or down sampling), bit rate, sounds, speed (e.g., speeding up or slowing down), adding/removing frames, etc." The data used in this case is audio data. Audio data is data overtime which in the broadest reasonable interpretation can be time-weighted. This data can also be down and up sampled in some embodiments.)
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL MICHAEL GALVIN-SIEBENALER whose telephone number is (571)272-1257. The examiner can normally be reached Monday - Friday 8AM to 5PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Viker Lamardo can be reached at (571) 270-5871. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PAUL M GALVIN-SIEBENALER/Examiner, Art Unit 2147
/VIKER A LAMARDO/Supervisory Patent Examiner, Art Unit 2147
Prosecution Insights