Prosecution Insights
Last updated: April 19, 2026
Application No. 17/495,012

SYSTEM DESIGN LEARNING DEVICE, SYSTEM DESIGN LEARNING METHOD, AND RECORDING MEDIUM

Non-Final OA §101§103§112
Filed
Oct 06, 2021
Examiner
MAPAR, BIJAN
Art Unit
2189
Tech Center
2100 — Computer Architecture & Software
Assignee
NEC Corporation
OA Round
1 (Non-Final)
67%
Grant Probability
Favorable
1-2
OA Rounds
3y 6m
To Grant
96%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allow Rate
317 granted / 470 resolved
+12.4% vs TC avg
Strong +29% interview lift
Without
With
+29.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
23 currently pending
Career history
493
Total Applications
across all art units

Statute-Specific Performance

§101
31.1%
-8.9% vs TC avg
§103
39.8%
-0.2% vs TC avg
§102
10.4%
-29.6% vs TC avg
§112
11.7%
-28.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 470 resolved cases

Office Action

§101 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 6 recites the limitation "when the design result indicates that the system design has succeeded, the design evaluation means determines". There is insufficient antecedent basis for this limitation in the claim. No “design evaluation means” is previously recited. Further, the claim implies that the design result indicates the system design has succeeded, but this feature is not recited until claim 3, which claim 6 does not depend upon. For the purpose of examination the claim is being interpreted to recite “when the design result indicates that the system design has succeeded, the at least one processor is configured to execute the instructions to determine” (roughly equivalent but referencing the processor in a manner equivalent to the other dependent claims rather than the undefined means). Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-11 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea (mental processes) without significantly more. Claim 1 recites: A system design learning device comprising: (this falls within the statutory categories of invention) at least one memory configured to store instructions; and at least one processor configured to execute the instructions to: (these are merely generic computer components invoked as tools to carry out the claimed task, equivalent to mere instructions to apply an exception with generic computer components as per MPEP 2106.05(f)) perform, with respect to a design target system whose system requirement is shown, system design (a person can mentally accomplish system design, especially with aid of blueprint paper) in which application of a conversion rule to a component of the design target system is iterated until a design result of the system design is obtained; (a person can convert abstract components into concrete components based on a set of rules by evaluating the components mentally using their expertise in the field, such as by selecting appropriate software or hardware components or modules and recording them on a blueprint) determine an evaluation value for the system design based on the design result; (a person can mentally evaluate an output for the design based on their expertise and provide a value) determine an evaluation value related to conversion of each component in the system design based on the evaluation value for the system design; and (a person can go step by step through the components on the blueprint and provide individual values for each based on mental determinations. Note that there is no lower bound on how complex the generation of the values need be, so a person could simply assign one based on gut feel) learn about selection of a component to which the conversion rule is applied based on learning data including the evaluation value related to the conversion of each component. (a person can accomplish such learning mentally based on observing the resultant values and evaluating/judging the associated components. No artificial intelligence is even claimed here, only the act of learning.) This judicial exception is not integrated into a practical application. In particular, the claim only recites one additional element – using a processor/memory to perform the claimed steps. The processor/memory in these steps is recited at a high-level of generality (i.e., as a generic processor/memory performing a generic computer function of executing program instructions) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea. The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional element of using a processor/memory to perform the claimed steps amounts to no more than mere instructions to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The claim is not patent eligible. Claims 2-9 recite only further details of steps that can be performed mentally, and mere instructions to apply these mental processes with the previously discussed processor/memory. For this reason, they remain ineligible. Claims 10 and 11 are substantively similar to claim 1, and are rejected under the same rationale as that set forth above. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-11 are rejected under 35 U.S.C. 103 as being unpatentable over Kuroda (Kuroda, T., Nakanoya, M., Kitano, A., & Gokhale, A. (2016, April). The configuration-oriented planning for fully declarative IT system provisioning automation. In NOMS 2016-2016 IEEE/IFIP Network Operations and Management Symposium (pp. 808-811). IEEE.) in view of Venugopalan (US 20230205953 A1). Regarding Claim 1: Kuroda teaches: at least one memory configured to store instructions; and at least one processor configured to execute the instructions to: (¶46 The processors 801, also referred to as processing circuits, are coupled via a system bus 802 to a system memory 803 and various other components.) perform, with respect to a design target system whose system requirement is shown, system design (Section I., This approach accepts a provisioning requirement as a desired state of the system; Section III., a novel scheme called Configuration-Oriented Planning which realizes fully declarative provisioning of IT systems, Section III.A., Component model is used in the first stage, which is designed to be edited by humans. In this model, the system is defined using a combination of pre-defined components and their property settings ... State model is used in the second stage, where the system is expressed using a set of finer granularity elements, such as “Tomcat package” or “a config file”. Each element has its possible states, current and desired states, state transitions and dependencies, which are used as a planning domain and constraints) in which application of a conversion rule to a component of the design target system is iterated until a design result of the system design is obtained; (Section III.B., The key ideas to fulfill such requirements are (1) propagating the elements through the components to let the elements collect dependencies and (2) using abstract elements which can be concretized with the related components.; Section III.B., The abstract element is an element which has no task implementations, while the concrete element has one. Each component can have conversion definition which concretize an abstract element to the other abstract or concrete element; ) Kuroda does not teach in particular, but Venugopalan teaches: determine an evaluation value for the system design based on the design result; (¶24 The rule extraction module 105 extracts rules that indicate why a possible architecture is feasible or infeasible based on the classifications. A negative rule that is determined by rule extraction module 105 may specify that the absence of a feature indicates that a possible system architecture is feasible or infeasible. ; ¶27 a surrogate model that performs simulations of the feasible architectures based on the configuration options that were received with the system architecture specification, and determines KPIs that measure predicted performance for each feasible architecture. The KPIs may include any appropriate metric that may describe the system architecture) determine an evaluation value related to conversion of each component in the system design based on the evaluation value for the system design; and (¶24 For example, a negative rule may correspond to a feature that is absent from the feasible architectures. A positive rule that is determined by rule extraction module 105 may specify that the presence of a feature indicates that a possible system architecture is feasible or infeasible. For example, a negative rule may correspond to a feature that is present in the feasible architectures; ¶25 saliency maps may be generated based on the classified architectures by rule extraction module 105) learn about selection of a component to which the conversion rule is applied based on learning data including the evaluation value related to the conversion of each component. (¶26 The extracted rules may be fed back into the neural network-based classifier in classification module 104 to refine the filtering of the possible architectures into feasible and infeasible architectures) It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the feasibility analysis based architecture determination of Venugopalan to the fully declarative configuration-oriented planning system of Kuroda, in to discover rules that characterize feasible and infeasible system architecture designs in order to reduce the number of possible designs that need to be reviewed by an engineering team (Venugopalan ¶16), thereby better optimizing generated system designs. Regarding Claim 2: Kuroda does not teach in particular, but Venugopalan teaches: It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the feasibility analysis based architecture determination of Venugopalan to the fully declarative configuration-oriented planning system of Kuroda, in to discover rules that characterize feasible and infeasible system architecture designs in order to reduce the number of possible designs that need to be reviewed by an engineering team (Venugopalan ¶16), thereby better optimizing generated system designs. Regarding Claim 3: Kuroda does not teach in particular, but Venugopalan teaches: It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the feasibility analysis based architecture determination of Venugopalan to the fully declarative configuration-oriented planning system of Kuroda, in to discover rules that characterize feasible and infeasible system architecture designs in order to reduce the number of possible designs that need to be reviewed by an engineering team (Venugopalan ¶16), thereby better optimizing generated system designs. Regarding Claim 4: Kuroda teaches: Regarding Claim 5: Kuroda does not teach in particular, but Venugopalan teaches: It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the feasibility analysis based architecture determination of Venugopalan to the fully declarative configuration-oriented planning system of Kuroda, in to discover rules that characterize feasible and infeasible system architecture designs in order to reduce the number of possible designs that need to be reviewed by an engineering team (Venugopalan ¶16), thereby better optimizing generated system designs. Regarding Claim 6: Kuroda does not teach in particular, but Venugopalan teaches: It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the feasibility analysis based architecture determination of Venugopalan to the fully declarative configuration-oriented planning system of Kuroda, in to discover rules that characterize feasible and infeasible system architecture designs in order to reduce the number of possible designs that need to be reviewed by an engineering team (Venugopalan ¶16), thereby better optimizing generated system designs. Regarding Claim 7: Kuroda teaches: Regarding Claim 8: Kuroda teaches: Kuroda does not teach in particular, but Venugopalan teaches: It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the feasibility analysis based architecture determination of Venugopalan to the fully declarative configuration-oriented planning system of Kuroda, in to discover rules that characterize feasible and infeasible system architecture designs in order to reduce the number of possible designs that need to be reviewed by an engineering team (Venugopalan ¶16), thereby better optimizing generated system designs. Regarding Claim 9: Kuroda teaches: Regarding Claim 10: Claim 10 is substantively similar to 1, and is rejected under the same grounds as those set forth above. Regarding Claim 10: Claim 11 is substantively similar to 1, and is rejected under the same grounds as those set forth above. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kuroda2014 (T. Kuroda and A. Gokhale, "Model-Based IT Change Management for Large System Definitions with State-Related Dependencies," 2014 IEEE 18th International Enterprise Distributed Object Computing Conference, Ulm, Germany, 2014, pp. 170-179, doi: 10.1109/EDOC.2014.31.) describes further details that are utilized in the planning scheme of the cited and relied upon reference Kuroda2016. The Non-Patent Literature document cited on the 10/6/2021 IDS (T. Maruyama et al., "Accelerated Search for Search-Based Network Design Generation Scheme with Reinforcement Learning".) appears extremely pertinent based on its abstract, notably for using its score function that exploits reinforcement learning. This is pertinent to (and appears equivalent to) the evaluation value of the claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BIJAN MAPAR whose telephone number is (571)270-3674. The examiner can normally be reached Monday - Thursday, 11:00-8:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rehana Perveen can be reached at 571-272-3676. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BIJAN MAPAR/ Primary Examiner, Art Unit 2189
Read full office action

Prosecution Timeline

Oct 06, 2021
Application Filed
Nov 01, 2025
Non-Final Rejection — §101, §103, §112
Feb 04, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
67%
Grant Probability
96%
With Interview (+29.0%)
3y 6m
Median Time to Grant
Low
PTA Risk
Based on 470 resolved cases by this examiner. Grant probability derived from career allow rate.

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