Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
Applicant uses the limitation “up to about 45 degrees” in Claims 5 and 13. With regards to the claim limitation “about”, and in view of Paragraph [0046] of the Specification, Examiner will interpret the claim limitation to mean that “about” is limited to tolerances derived from the material, manufacturing, and assembly process.
Claim Interpretation
Examiner will interpret Claims 17-25 to be a product by process claims as each preamble begins with the product instead of indicating “a method/process of forming a multi-layer heater comprising the steps of”. If applicant attempts to change claims 17-25 to method claims, Examiner will withdraw these claims by original presentation.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 21 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 21 recites the limitation “wherein the subtractive process is selected from the group consisting of laser ablation, mechanical milling, chemical etching, waterjet, and combinations thereof”. The claims and specification fail to provide any relationship in how “combinations thereof” combine together the claimed subtractive processes to remove areas of the dielectric layer as required in Claim 19. Therefore, the scope of the claim is indefinite.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-23, and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Ptasienski (US-20190159291-A1) in view of Nosrati (US-20190157127-A1).
Regarding Claims 1, 7, 15, 16, 17, 23, and 25, Ptasienski discloses (Figures 3, 4, 6, 7, 8, 9, 14, 17, 18, 19, and 20) a wafer support member (12 and 120) that includes a resistive layer (24) and routing layer (28), that may also further include a dielectric layer, a bonding layer, and a protective layer, where all of the layers are connected by a plurality of conductive vias (32) ([Abstract], [0050], [0051], and [0056]). Where the resistive layer (24) and routing layer (28) are in different planes, the resistive heating elements (78) are connected to arm portions (82) of the routing layer by the conductive vias ([0065]). The dielectric layers may be formed over the surfaces of the top layer, the main substrate, and the bottom layer, to insulate the resistive layer and the routing layer or to facilitate bonding to the main substrate ([0072]). The multiple vias comprise a base (38) and a head (36)), where the head includes an enlarged head portion (40) and cylindrical portion (42), and the base includes an enlarged bottom portion (46) and tubular portion (44) ([Fig 17]) ([0056]). Ptasienski further teaches that one end of the via connects to the resistive layer and one end to the routing layer on either side of the main substrate (26) ([0049]) ([0052]). Ptasienski also discloses the inclusion of apertures (64), which can either extend all the way through the main substrate (26), from the top surface (60) to the bottom surface (62), or only partially through the main substrate ([0058] and [0060]). The plurality of apertures can be configured to receive the conductive vias (32), where in the top surface (70) and bottom surface (72) of the vias can sit flush with the top surface (60) and bottom surface (62) of the substrate ([0058]-[0060]). Furthermore, Ptasienski teaches that the top layer, bottom layer, and main substrate can be made of ceramic materials, and may be formed by sintering or machining the ceramic plates, where the vias can be a single pin or made up of multiple pieces ([0055] and [0070]).
Ptasienski does not disclose that the shaped body comprises an exterior periphery that has at least one portion with a non-linear profile.
Nosrati discloses (Figures 3, 4, and 5a) a ceramic support pedestal assembly (20), where the vias (136) extend through a ceramic substrate (130), made up of a lower via (140) and an upper via (138),that are set inside a tapered cavity (154) that corresponds to the tapered insert (160) ([0042]-[0043]). Nosrati also teaches a bottom tapered portion (158), comprising a top surface (162) that extends radially from the end of the insert (160) to a lower surface (156) ([0042]-[0043]). Additionally, Nosrati teaches that the lower via is received by the cavity of the upper via, where the lower via has a corresponding insert that can have a cross-sectional shape featuring a polygonal, planar, circular, oval, triangular, elliptical, and other suitable shapes. ([0009] and [0044]). Nosrati further teaches that when the insert of the lower via is received by the tapered cavity of the upper via, an interference/press fit if formed, which improves the alignment/fit as well as allowing to compensate for manufacturing tolerance and thermal variations of the vias and the ceramic substrate ([0045]).
Regarding Claims 2 and 9, Nosrati discloses (Figure 5a) the tapered cavity (154) of the upper via (136), and corresponding insert (130) of the lower via (140) with a circular cross-sectional shape ([0044]).
Regarding Claims 3, 4, 10, and 11 Ptasienski discloses (Figure 4) cut outs (48) on the lower via that has a concave radius on the bottom portion (46) of the base (38) that help secure the routing layer (28) to the conductive vias (32) ([0056]). Ptasienski further discloses the upper via’s head portion has cylindrical portion (42), and corresponding tubular portion (44) and bottom portion (46), each having a convex radius ([0056]).
Regarding Claims 5 and 13, Nosrati discloses (Figure 5a) the via (136), comprising the upper via (138) and lower via (140), where the lower via has a tapered portion (158), that extends at an angle from the lower surface (156) to the top surface (162) ([0043] and [0050]).
Regarding Claims 6 and 12, Ptasienski discloses (Figures 3 and 4) vias (32) that are made up of the individual parts that includes a head portion (40) and a bottom portion (46) ([0056]).
Regarding Claim 8, Ptasienski discloses (Figure 3) the resistive layer (24) that includes a plurality of resistive heating elements (78) that are independently controllable and define a plurality of heating zones ([0049] and [0053]).
Regarding Claim 14, Ptasienski discloses (Figures 3 and 17) that the conductive vias (32) extends through the main substrate layer (26), and connect the resistive layer (24) and the routing layer (28) that are disposed on opposite surfaces of the main substrate ([0051]).
Ptasienski and Nosrati are analogous inventions, as Ptasienski teaches ceramic pedestals comprising various heating layer, dielectric layers, and routing layers; where Nosrati teaches vias for use in ceramic pedestals to connect the different layers.
It is obvious to combine prior art elements according to known methods to yield predictable results. See MPEP 2143(A). The MPEP states the prior art must: (1) teach each claimed element (a method or apparatus that will be modified), (2) show that one of ordinary skill in the art could have combined the elements by known methods and that the combination doesn’t hinge the function of the elements, and (3) show that one of ordinary skill would have recognized that applying the known technique to the base device would yield predictable results. See MPEP 2143(A).
In this case, Ptasienski teaches the ceramic pedestal assembly comprising the shaped body vias, that include a lower end portion and an upper end portion, where the upper end portion has a larger contact area then that of the lower end portion, and the upper end portion is proximate the routing layer. Ptasienski also teaches a concave radius on the cutout for securing the routing layer to the vias, and a convex radius extending around the head, base, and tubular portions extending from the head and base. Additionally, Ptasienski teaches the inclusions of layers in the ceramic pedestal assembly, these layers include a heating layer, a routing layer, a protective layer, a bonding layer, and a dielectric layer formed on either side of the main substrate layer. The ceramic pedestal also includes vias that extend through the layers of the substrate in order to connect the various layers, including the resistive heating and routing layers. The heating layer includes independently controlled heating elements to control the various heating zones of the heating layer. Ptasienski also teaches that the pedestal assembly has apertures for receiving the vias, where the vias extends through the apertures of the main substrate to connect the heating layer and routing layers. Nosrati teaches the shaped body of the via has an exterior portion with at least one non-linear profile, where the non-linear section has a varying circular cross-sectional area as the via expands from the tip of the tapered insert into the body of the via. Nosrati also teaches that the shaped body includes a lower via with a tapered bottom portion that extends at about a 45-degree angle from the top surface to the bottom surface of the tapered bottom portion of the lower via. Additionally, Nosrati teaches that the tapered cavity and corresponding tapered via forms a tight fit that improves the alignment of the vias and accommodates for the manufacturing tolerances and thermal variations that exist between the vias and the main ceramic substrate. An artisan of ordinary skill in the art would have been able to combine the known non-linear connecting via taught by Nosrati, into the ceramic pedestal assembly as taught by Ptasienski, because the known elements would retain their respective functions and yield predictable results when combined into a single ceramic pedestal assembly.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the ceramic pedestal assembly taught by Ptasienski to incorporate the non-linear connecting vias as taught by Nosrati, because all the claimed elements were known in the prior art and one skill in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination yielded nothing more than predictable results to one of ordinary skill in the art.
Regarding Claims 18-22, Ptasienski in view of Nosrati, discloses all of the elements of the claimed invention as required by the multi-layer heater of Claim 17, where Claim 17 is being interpreted as a product by process claim. “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claims is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227, USPQ 964, 966 (Fed. Cir. 1985). MPEP 2113-I.
With regards to Claims 18-22:
Claim 18 requires the aperture to be formed when the dielectric layer is formed,
Claim 19 requires the aperture to be formed by removing areas of the dielectric layer with a subtractive process,
Claim 20 requires the removing part of the heating layer with a subtractive process as part of the process to form the aperture,
Claim 21 provides a list of subtractive processes to form the aperture, and
Claim 22 requires the aperture to be formed using a maskant when forming the aperture.
Regarding Claims 18-22, as previously stated, Ptasienski discloses the inclusion of an of aperture (64) to be formed to receive the conductive via (32) ([0058]-[0060]).
As the additional claim limitations provided by Claims 18-22 fail to provide any distinctive structural characteristics to the final structure of the claimed invention of the product by process claim, Claims 18-22 are rejected as being unpatentable over Ptasienski in view of Nosrati.
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Ptasienski and Nosrati, in further view of Kar-Roy (US-8212331-B1).
With regards to Claim 24, Ptasienski in view of Nosrati teaches all of the claimed limitations as previously mentioned, but fails to disclose having a flat (planarized) upper surface of the protective layer.
Kar-Roy teaches (Figures 1 and 2D) fabricating a backside through-wafer via having a flat metal layer (256) on the top side of the protective layer (258) ([Col 7, lines 10-22]). Kar-Roy further teaches flattening occurs via a planarizing process which can be a copper chemical mechanical polishing process, where a cleaning process can be performed to remove the unwanted resulting residue ([Col 7, lines 10-22]).
Ptasienski, Nosrati, and Kar-Roy are analogous because all three relate to fabricating vias on wafers or ceramic pedestals for circuits.
It is obvious to combine prior art elements according to known methods to yield predictable results. See MPEP 2143(A). The MPEP states the prior art must: (1) teach each claimed element (a method or apparatus that will be modified), (2) show that one of ordinary skill in the art could have combined the elements by known methods and that the combination doesn’t hinge the function of the elements, and (3) show that one of ordinary skill would have recognized that applying the known technique to the base device would yield predictable results. See MPEP 2143(A).
In this case, Ptasienski and Nosrati teach all of the claimed elements as previously mentioned, including the multi-layer heater, and Kar-Roy it is known to make the upper surface of the protective layer flat.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the ceramic pedestal assembly taught by Ptasienski in view of Nosrati to make the upper surface of the protective layer flat, because all the claimed elements were known in the prior art and one skill in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination yielded nothing more than predictable results to one of ordinary skill in the art.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNTER HEMMINGS whose telephone number is (571)467-0070. The examiner can normally be reached Monday - Friday 8:00-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ned Landrum can be reached at 571-272-5567. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HUNTER G HEMMINGS/Examiner, Art Unit 3761 /EDWARD F LANDRUM/Supervisory Patent Examiner, Art Unit 3761
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