CTNF 17/499,330 CTNF 101926 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Examiner Notes Examiner cites particular columns and line numbers in the references as applied to the claims below for convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that in preparing responses, the applicant fully consider the references cited in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner Specification 07-29 AIA The disclosure is objected to because of the following informalities: paragraph [0083], where it states "subcombination" . Appropriate correction is required. Claim Objections Claim 46 is objected to because of the following informality: Claim 8, line 7 states: “The computer program product of claim 41, the program operations further comprising: determining a particular operation represented represented in the computational graph has finished at a particular hardware stream”. “Represented” is duplicated. Appropriate correction is required Claim Rejections - 35 USC § 101 07-04-01 AIA 07-04 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 41-60 rejected under 35 U.S.C. 101 because the claimed invention is directed to a mental process without significantly more. Step 1: Claim 1 is directed to a “A computer program product encoded on one or more non-transitory computer storage media”, which falls under an article of manufacture, and is one of the four statutory categories. Step 2A, Prong One: Claim 1 recites the following limitations: for each of a plurality of operations represented in a computational graph assigning the operation to a respective stream in the plurality of streams of the system, each stream configured to queue operations assigned to the stream and to execute the queued operations in a defined order on a respective hardware resource for the stream; configuring a first stream of the plurality of streams to stall performance of a first operation assigned to the first stream until all inputs to the first operation have been computed; All of which can be performed in the human mind through observation, evaluation, judgement, and pinion, with the aid of pen and paper; therefore, reciting a mental process. Accordingly, claim 1 recited a judicial exception (i.e. an abstract idea). Step 2A, Prong Two: Claim 41 recites the following information: performing, by each stream in the plurality of streams, the operations that were assigned to the stream in a defined order, including performing at least one operation by the first stream in parallel with at least one operation by the second stream; which fails to integrate the abstract idea into a practical application, as it amounts to nothing more than instructions to apply the abstract idea using a generic computer parallelism, a well-understood and routine feature of computing. (MPEP 2106.05) Step B: The additional elements within this claim fail to include additional elements that amount to significantly more than the abstract idea (MPEP 2106.05). These elements, which include the configuring and assigning of streams, as well as the execution in a defined order or in parallel with another operation, represent no more than the routine and conventional use of generic computer capabilities. Things like parallel processing and multithreaded execution across concurrent streams are well understood, fundamental computing techniques employed for decades by generic processors. These elements, both individually and in combination, perform well-understood, routine, and conventional activities and fails to recite a specific technological improvement to the streams themselves. Consequently, claim 1 as a whole does not amount to significantly more than the recited judicial exceptions and the claim is not eligible. Claim 42 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 42 recites, receiving, from a client, a request identifying one or more particular outputs from one or more operations represented in the computational graph; and providing the one or more particular outputs to the client which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 41, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 42 is not eligible. Claim 43 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 42 recites, receiving data that identifies a group of operations represented in the computational graph that are connected to each other by following one directed edge from operation to operation represented in the computational graph; and assigning the group of operations to one stream which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 41, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 43 is not eligible. Claim 44 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 44 recites, receiving data identifying a representation of a first operation in the computational graph having a plurality of directed edges as outputs; and assigning, for each of the directed edges, a target operation to which the directed edge points to a unique hardware stream of the system, each target operation being assigned to a different unique hardware stream which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 41, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 44 is not eligible. Claim 45 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 45 recites, determining, for each of a plurality of nodes in the computational graph that represent respective ones of the plurality of operations, a respective amount of memory resources consumed by the operation represented by the node based on information about directed edges to the node, wherein assigning the operation represented by each node in the computational graph to a respective hardware stream is based at least on the respective amount of memory resources consumed by the operation represented by the node which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 41, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 45 is not eligible. Claim 46 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 46 recites, determining a particular operation represented represented in the computational graph has finished at a particular hardware stream; in response to determining the particular operation has finished, determining a first amount of memory consumed by the particular operation that will be freed; determining, for each of a group of unassigned operations, a respective estimated amount of memory that will be consumed by the unassigned operation; determining, from the group of unassigned operations and using the respective estimated amount of memory that will be consumed by the unassigned operation, a first unassigned operation with the estimated amount of memory that maximizes usage of the first amount of memory; and based on determining that the first unassigned operation maximizes usage of the first amount of memory, assigning the first unassigned operation to the particular hardware stream which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 46, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 46 is not eligible. Claim 48 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 48 recites, determining that a particular operation represented assigned to a particular hardware stream has finished execution; and in response to determining that the particular operation has finished execution: identifying at least one subsequent operation that uses the output of the particular operation as input, and reusing memory allocated for the output of the particular operation after the at least one subsequent operation has executed which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 46, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 48 is not eligible. Claim 48 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 48 recites, determining that a particular operation represented assigned to a particular hardware stream has finished execution; and in response to determining that the particular operation has finished execution: identifying at least one subsequent operation that uses the output of the particular operation as input, and reusing memory allocated for the output of the particular operation after the at least one subsequent operation has executed which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 46, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 48 is not eligible. Claim 49 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 49 recites, assigning each operation in the computational graph to a respective stream in the plurality of streams comprises assigning operations so as to minimize a number of cross-stream directed edges, wherein a cross-stream directed edge is an instance of an input to an operation in one stream being received from an output of an operation in another stream which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 49, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 49 is not eligible Claim 50 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Further claim 49 recites identifying, at a point immediately preceding performance of the first operation in the first stream, that the output of the second operation assigned to the second stream has not yet been computed which can be performed in the human mind though observation, evaluation, judgment, and opinion, with the aid of pen, paper, or a computer, and therefore reciting a mental process. Accordingly, for the same reasons presented with respect to claim 50, the additional elements are not indicative of integration into a practical application, nor do they amount to significantly more than the recited judicial exceptions. Thus, claim 49 is not eligible Claim 51 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 50. Claim 52 is dependent on and therefore inherits the same and therefore inherits the same judicial exception recited in claim 41. Claims 53-59 recite substantially the same limitations as those recited in claims 41-52, respectively, applied to the method of claim 53. Thus, for the same reasons presented with respect to claims 41-52, claims 53-59 are directed to an abstract idea without significantly more and are not eligible. Claim 60 recite substantially the same limitations as those recited in claims 11, respectively, applied to the method of claim 60. Thus, for the same reasons presented with respect to claims 1, claim 60 are directed to an abstract idea without significantly more and are not eligible. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 47 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 47 cites the one or more particular outputs in line 1. This limitation identifies an intended use for the the one or more particular outputs . Thus, it is unclear if these outputs actually perform the recited functions or if they’re merely capable of performing the functions. Accordingly, this renders the metes and bounds of the claim indefinite. 07-07 AIA 07-07-aia The following is a quotation of 35 U.S.C. 102 which forms the basis for the rejections under this section made in this Office action A person may be entitled to a patent unless - 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim(s) [41-60 ] is/are rejected under 35 U.S.C. 102 (a)(2) as being anticipated by Tucker (US 2018/0247197 A1) Regarding claim 41, Tucker teaches: A computer program product encoded on one or more non-transitory computer storage media, the computer program product comprising instructions that, when executed by a system comprising a plurality of hardware streams, cause the system to perform program operations comprising: (0072) Tucker teaches “ one or more modules of computer program instructions encoded on a tangible non-transitory program carrier for execution by, or to control the operation of, data processing apparatus ” and further states that “ computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by the way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks ”. Mapping directly to the claimed “computer program product encoded on one or more non-transitory computer storage media” for each of a plurality of operations represented in a computational graph, assigning the operation to a respective stream in the plurality of streams of the system, each stream configured to queue operations assigned to the stream and to execute the queued operations in a defined order on a respective hardware resource for the stream ; (0006) Discloses that the system partitions a computational graph into subgraphs and performs “ assigning, for each subgraph, the operations represented by the one or more nodes in the subgraph to a respective available device in the plurality of available devices for operation ”. Additionally, the reference expressly states that “ each device is a hardware resource that performs operations independent of other devices ” in (0031), showing that each device is structurally and functionally equivalent to a “hardware stream”, as it’s a dedicated hardware resource to which a set of operations from the computational group is assigned. configuring a first stream of the plurality of streams to stall performance of a first operation assigned to the first stream until all inputs to the first operation have been computed, wherein a first input to the first operation comprises an output of a second operation assigned to a second, different stream of the plurality of streams; The reference discloses that (0047) “ the devices perform the operations of the nodes assigned to the device asynchronously…using queues, non-blocking kernels, or both. ” And that (0034) “ The placer 108 determines, for each operation to be performed in the computational graph, a respective target device, e.g., device 116 , that performs the operation, and in some implementations, a time for the respective target device to perform the operation ”. In regards to stalling until all inputs are computed, the reference details, “ The devices can pause operations, e.g., enter in an idle state, at nodes that require inputs that have not yet been computed. For example, after performing operations for node 308 , the device assigned to the third subgraph 320 can perform operations for node 312 . The device assigned to the third subgraph 320 then determines whether input from node 310 has been received. The device can wait to perform operations for node 312 until the device receives the input from node 310 .”. Regarding input to the stalled operation being the output of another operation, the reference discloses, “, a directed edge connecting a first node in the graph to a second node in the graph indicates that an output generated by the operation represented by the first node is used as an input to the operation represented by the second node .” And applies it concretely by disclosing that (0051) “ Node 304 in the second subgraph 318 requires an output of the node 302 , which will be calculated by the device assigned to the first subgraph 322 “. To prove that the operation being performed is being done by another operation, the reference discloses that node 310, whose output node312 requires, is assigned to a different device than the device performing node 312, confirming that (0049) “The system can partition the computational graph into three subgraphs 318-322.” , such that the producing operation (node 310) and the stalled operation (node 312) rest on separate, independent hardware resources. It is understood by the examiner that the devices can perform operations asynchronously using queues, non-blocking kernels, or both. and performing, by each stream in the plurality of streams, the operations that were assigned to the stream in a defined order, including performing at least one operation by the first stream in parallel with at least one operation by the second stream. (0054) “ The devices can pause operations, e.g., enter in an idle state, at nodes that require inputs that have not yet been computed. For example, after performing operations for node 308 , the device assigned to the third subgraph 320 can perform operations for node 312 . The device assigned to the third subgraph 320 then determines whether input from node 310 has been received. The device can wait to perform operations for node 312 until the device receives the input from node 310 .”. Here it is shown that node 310 is assigned to a different device/subgraph, making this an example of stalling a first stream until a cross stream output(a device/subgraph for node 310) is available. Additionally, (0034) “ Some operations can be performed in parallel while other operations require prior operations in the computational graph to be completed, e.g., the other operations process, as inputs, outputs of the prior operations .” and (0008) “ By way of illustration, subgraphs of the computational graph can be assigned to unique devices, each of which performs operations in the respective subgraph, to reduce an overall time required to perform operations of the neural network .”, demonstrate that simultaneous parallel execution is occurring in this reference. Regarding claim 42, Tucker teaches receiving, from a client, a request identifying one or more particular outputs from one or more operations represented in the computational graph; and providing the one or more particular outputs to the client. (0029) ” the client 102 can request output values that represent an inference operation from one or more particular nodes of the computational graph. ” and (0064) “ The request received by the system can, in some cases, specify a response to include one or more outputs of particular nodes in the computational graph. The system can receive, from one or more devices to which the particular devices are assigned, the outputs of the particular nodes after the operations are complete. The system can then provide the outputs to the client ”. This language maps directly to the claim’s requirement of receiving a request identifying particular outputs and providing them to the client Regarding claim 43, Tucker teaches receiving data that identifies a group of operations represented in the computational graph that are connected to each other by following one directed edge from operation to operation represented in the computational graph; and assigning the group of operations to one stream (0042) “ In particular, the system can analyze the graph to identify directed edges connecting one or more nodes in the computational graph that are arranged in a chain structure. Nodes in a chain structure are nodes that are connected to each other by following one directed edge from node to node. Thus, a node in the chain must wait for operations at previous nodes in the chain to finish computing before computing its own operation ”. The language used here (according to the understanding of the Examiner), is verbatim to the claimed “ connected to each other by following one directed edge from operation to operation ” in the claim. As to assigning the chain group to one stream, (0007) states, “ Analyzing the computational graph to identify groups of nodes arranged in a chain structure; wherein the partitioning comprises generating, for each identified group, a respective subgraph including the identified group of nodes .”, which shows the subgraph then being assigned to a single device (stream) Regarding claim 44, Tucker teaches , receiving data identifying a representation of a first operation in the computational graph having a plurality of directed edges as outputs; and assigning, for each of the directed edges, a target operation to which the directed edge points to a unique hardware stream of the system, each target operation being assigned to a different unique hardware stream (0050) states, “ In some implementations, if the outputs of node 306 are the same, the system groups nodes 306 , 308 , and 310 into one subgraph. This is because nodes 310 and 308 both receive the same output from the node 306 .”. This describes one scenario where shared-output targets go to the same subgraph. (0049) “the system can identify a first chain of nodes 304 , 316 , a second chain of nodes 302 , 306 , 310 , and a third chain of nodes 308 , 312 , 314 . Although other possible chains of nodes are possible, the system can select the chains that minimize the number of subgraphs ” and (0051) “ the system can assign the three subgraphs 318 - 322 to three respective available devices. ”, show how different chains from a fan-out node can go to different devices. Here, it is shown that node 206 has output edges that feed both node 310 and 308, which are assigned to different devices. Regarding claim 45, Tucker teaches, determining, for each of a plurality of nodes in the computational graph that represent respective ones of the plurality of operations, a respective amount of memory resources consumed by the operation represented by the node based on information about directed edges to the node, wherein assigning the operation represented by each node in the computational graph to a respective hardware stream is based at least on the respective amount of memory resources consumed by the operation represented by the node. (0045), “ the system determines a device to which a subgraph is assigned by estimating a maximum amount of resources to be consumed by operations representing nodes in the subgraph. For example, the system can calculate a maximum amount of memory to be consumed by any node in the subgraph. In particular, the system can traverse the subgraph to calculate a dimension of a tensor on each directed edge to and from each node of the subgraph. The dimension of the tensor indicates a size of memory that would be consumed by a device to perform an operation. The system can assign the subgraph to a device that has memory capable of storing the largest tensor flowing in the subgraph ”. Here, it is understood by the examiner that “directed” edge to and from each node” is directly mapped to the claimed “based on the information about directed edges to the node”. Tensor dimension determination from edges is the claimed “amount of memory resources consumed by the operation” Regarding claim 46, Tucker teaches determining a particular operation represented represented in the computational graph has finished at a particular hardware stream; (0052), “ the system waits to assign the second subgraph 318 until receiving an indication that the operation represented by node 302 has completed. This allows the system to dynamically assign subgraphs based on current information, e.g., memory or device availability, which could improve efficiency ” in response to determining the particular operation has finished, determining a first amount of memory consumed by the particular operation that will be freed; determining, for each of a group of unassigned operations, a respective estimated amount of memory that will be consumed by the unassigned operation; determining, from the group of unassigned operations and using the respective estimated amount of memory that will be consumed by the unassigned operation, a first unassigned operation with the estimated amount of memory that maximizes usage of the first amount of memory; (0045), “ the system determines a device to which a subgraph is assigned by estimating a maximum amount of resources to be consumed by operations representing nodes in the subgraph ” and “ The system can assign the subgraph to a device that has memory capable of storing the largest tensor flowing in the subgraph ”. Here it is shown that selecting the operation that “maximized usage” of freed memory is the direct functional equivalent of assigning to a device based on best-fit memory capability after the prior operation’s resources become available. and based on determining that the first unassigned operation maximizes usage of the first amount of memory, assigning the first unassigned operation to the particular hardware stream. (0061), “ The system adjusts the initial assignment using the statistics ”, and [performs] (0007) “ reassigning the subgraphs to the devices based on the adjusted initial assignment ”, explicitly targeting resource utilization optimization. Regarding claim 47, Tucker teaches, causing the system to store the one or more particular outputs in memory of a hardware accelerator. (0031) “ Any devices performing neural network operations, e.g., devices 116 - 122 , can include a memory, e.g., a random access memory (RAM), for storing instructions and data and a processor for executing stored instructions. Generally, each device is a hardware resource that performs operations independent of other devices. For example, each device can have its own processing unit. The devices can be Graphical Processing Units (GPUs) or Central Processing Units (CPUs). ” GPUs are hardware accelerators. It is also further stated in (0028) “ The system 100 can store the modified parameters in memory of a device ”, and that outputs of particular nodes are stored by the assigned device and retrieved by the executor. Storing outputs in GPU memory is expressly disclosed. Regarding claim 48, Tucker teaches, determining that a particular operation represented assigned to a particular hardware stream has finished execution; (0055), “ After a final node, i.e., node 316 , performs operations, the device to which the node is assigned can return an output of the node or an indication that processing of the graph is complete to the system”. For intermediate nodes, the system identifies downstream dependents because (0051) “ Node 304 in the second subgraph 318 requires an output of the node 302 , which will be calculated by the device assigned to the first subgraph 322 .”. The system identifies which subsequent operations use the output as input. and in response to determining that the particular operation has finished execution: identifying at least one subsequent operation that uses the output of the particular operation as input, and reusing memory allocated for the output of the particular operation after the at least one subsequent operation has executed. (0050) “ This is because nodes 310 and 308 both receive the same output from the node 306 . In this case, the operations represented by nodes 310 and 308 are performed on the same device to minimize memory consumption. That is, the device can access the same memory location that stores the output from the node 306 when performing operations for both node 310 and 308 ”. The memory at the same location is reused across subsequent operations, directly anticipating the claim’s memory reuse limitation Regarding claim 49, Tucker teaches, wherein assigning each operation in the computational graph to a respective stream in the plurality of streams comprises assigning operations so as to minimize a number of cross-stream directed edges, wherein a cross-stream directed edge is an instance of an input to an operation in one stream being received from an output of an operation in another stream. (0049) “ Although other possible chains of nodes are possible, the system can select the chains that minimize the number of subgraphs ”. It is understood by the Examiner that afterwards, each chain-group is then assigned to a respective device, whereby grouping connected chains together and minimizing the number of subgraphs, inter-device directed edges are minimized because every edge within a subgraph is an intra-stream edge rather than a cross-stream edge. Additionally, (0043) “ the system clusters the nodes in the graph and then assigns the nodes in the same cluster to the same subgraph…the device can reuse memory storing the same data for the multiple operations represented by the nodes ”. By assigning nodes that share data to the same subgraph/device, cross-stream dataflows are minimized. Regarding claim 50, Tucker teaches, identifying, at a point immediately preceding performance of the first operation in the first stream, that the output of the second operation assigned to the second stream has not yet been computed; and stalling performance of the first operation in the first stream until the output of the second operations from the second stream is available as input to the first operation in the first stream. (0054) “ The devices can pause operations, e.g., enter in an idle state, at nodes that require inputs that have not yet been computed. For example, after performing operations for node 308 , the device assigned to the third subgraph 320 can perform operations for node 312 . The device assigned to the third subgraph 320 then determines whether input from node 310 has been received. The device can wait to perform operations for node 312 until the device receives the input from node 310 .”. Here, it is understood by the Examiner that the device (first stream) checks, immediately before executing node 312 (first operation of first stream), whether the input from node 310 (cross-stream output from a different device/stream) is available, and stalls if not. Regarding Claim 51, Tucker teaches, wherein stalling performance of first operation in the first stream further stalls performance of additional operations downstream of the first operation in the first stream (0042) “ Nodes in a chain structure are nodes that are connected to each other by following one directed edge from node to node. Thus, a node in the chain must wait for operations at previous nodes in the chain to finish computing before computing its own operation ”. Thus, a node in the chain must wait for operations at previous nodes in the chain to finish computing before computing its own operation. Because operations in a single device/stream are queued in a defined order and each node in a chain depends on the predecessor, a stall at any node in the queue necessarily prevents all subsequent queued operations from executing. Which is required by the sequential dependency detailed in (0054) “ The device can wait to perform operations for node 312 until the device receives the input from node 310 .”, and any operations queued after node 312 on that same device are likewise blocked. Regarding claim 12, Tucker teaches, wherein the computational graph is a subgraph corresponding to a portion of a larger computational graph. (0065) “ users are able to designate portions of computational graphs, e.g., a subgraph of a computational graph, a node in the computational graph, or a different collection of multiple nodes in the computational graph, as a function that can be re-used as a component of other computational graph…the system can identify the graph portion associated with the functional name and can generate an augmented computational graph that includes the graph portion at the appropriate position. The system can then process the augmented computational graph as described above”. It is understood by the Examiner that the portion/subgraph that’s processed by the system is thus explicitly a subgraph corresponding to a larger computational graph, identically matching the claim limitation. Claims 53-59 recite substantially the same limitations as those recited in claims 41-52 respectively. Thus, for the same reasons presented with respect to claims 41-52, claims 53-59 are rejected as being unpatentable by Tucker for the same reasons presented with respect to claims 41-52. Claim 60 recite substantially the same limitations as those recited in claim 41 respectively. Thus, for the same reasons presented with respect to claim 41, claim 60 is rejected as being unpatentable by Tucker for the same reasons presented with respect to claim 41. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL NWUHA whose telephone number is (571)272-9367. The examiner can normally be reached Monday-Friday; 7:30 am - 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kevin Young can be reached at (571) 270-3180. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SAMUEL OBINNA NNAJI NWUHA/ Examiner, Art Unit 2194 /KEVIN L YOUNG/Supervisory Patent Examiner, Art Unit 2194 Application/Control Number: 17/499,330 Page 2 Art Unit: 2194 Application/Control Number: 17/499,330 Page 3 Art Unit: 2194 Application/Control Number: 17/499,330 Page 4 Art Unit: 2194 Application/Control Number: 17/499,330 Page 5 Art Unit: 2194 Application/Control Number: 17/499,330 Page 6 Art Unit: 2194 Application/Control Number: 17/499,330 Page 7 Art Unit: 2194 Application/Control Number: 17/499,330 Page 8 Art Unit: 2194 Application/Control Number: 17/499,330 Page 9 Art Unit: 2194 Application/Control Number: 17/499,330 Page 10 Art Unit: 2194 Application/Control Number: 17/499,330 Page 11 Art Unit: 2194 Application/Control Number: 17/499,330 Page 12 Art Unit: 2194 Application/Control Number: 17/499,330 Page 13 Art Unit: 2194 Application/Control Number: 17/499,330 Page 14 Art Unit: 2194 Application/Control Number: 17/499,330 Page 15 Art Unit: 2194 Application/Control Number: 17/499,330 Page 16 Art Unit: 2194 Application/Control Number: 17/499,330 Page 17 Art Unit: 2194 Application/Control Number: 17/499,330 Page 18 Art Unit: 2194 Application/Control Number: 17/499,330 Page 19 Art Unit: 2194 Application/Control Number: 17/499,330 Page 20 Art Unit: 2194 Application/Control Number: 17/499,330 Page 21 Art Unit: 2194 Application/Control Number: 17/499,330 Page 22 Art Unit: 2194
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