Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-12 and 14-25 are currently pending and have been examined.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-12 and 14-25 are rejected under 35 U.S.C. 101 because the claimed invention recites a judicial exception, is directed to that judicial exception, an abstract idea, as it has not been integrated into practical application and the claims further do not recite significantly more than the judicial exception. Examiner has evaluated the claims under the framework provided in the 2019 Patent Eligibility Guidance published in the Federal Register 01/07/2019 and has provided such analysis below.
Step 1: Claims 1-6, 14-25 are directed to a computer system and fall within the statutory category of machines; claims 7-12 are directed to non-transitory computer readable storage medium and fall within the statutory category of product; claims 14-19 are directed to a semiconductor apparatus and fall within the statutory category of machines; claims 20-25 are directed to a method and which falls within statutory category of process. Therefore, “Are the claims to a process, machine, manufacture or composition of matter?” Yes.
In order to evaluate the Step 2A inquiry “Is the claim directed to a law of nature, a natural phenomenon or an abstract idea?” we must determine, at Step 2A Prong 1, whether the claim recites a law of nature, a natural phenomenon or an abstract idea and further whether the claim recites additional elements that integrate the judicial exception into a practical application.
Step 2A Prong 1:
Claims 1, 7, 14 and 20: The limitations of “determine, in response to scheduling out a thread, an average bandwidth consumption with respect to the memory device, wherein the average bandwidth consumption is related to a previous execution of the thread in a multi-threaded execution environment” (claim 1), and similar limitations of claim 7, “determining a minimum bandwidth demand based at least in part on the average bandwidth consumption” (claim 14) and similar limitations in claim 20, which as drafted is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. Further, a person can think, observe, judge and evaluate bandwidth consumption data and mentally determine an average bandwidth consumption of the thread. Further, a person can think, observe, judge and evaluate bandwidth consumption data and mentally determine minimum bandwidth demand.
Therefore, Yes, claims 1, 7, 14 and 20 recite judicial exceptions.
The claims have been identified to recite judicial exceptions, Step 2A Prong 2 will evaluate whether the claims are directed to the judicial exception.
Step 2A Prong 2:
Claims 1, 7, 14 and 20: The judicial exception is not integrated into a practical application. In particular, the claim recites the following additional elements – “a power management unit”, “a processing unit coupled to the power management unit”, “a memory device coupled to the processing unit” (claim 1), and “least one non-transitory computer readable storage medium” (claim 7), “one or more substrates; and
logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable or fixed-functionality hardware” (claim 14), wherein the logic includes a first set of registers” which are merely recitations of generic computing components and functions being used as a tool to apply the abstract idea (see MPEP § 2106.05(f)) which does not integrate a judicial exception into practical application. Further, claim 1 recites the additional elements “store, in response to scheduling out the thread, the average bandwidth consumption”, and “send, in response to scheduling in the thread, the average bandwidth consumption to a power management unit”, and similarly claim 7, “to accumulate an average bandwidth consumption for a plurality of threads on a per thread basis with respect to a memory device, and wherein the average bandwidth consumption corresponds to previous executions of the plurality of threads”, “set a dynamic voltage and frequency scaling (DVFS) point based at least in part on the minimum bandwidth demand” (claim 14, and similarly in claim 20, which is merely a recitation of insignificant extra-solution data storage/transmission/gathering activity (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application.
Therefore, “Do the claims recite additional elements that integrate the judicial exception into a practical application? No, these additional elements do not integrate the abstract idea into a practical application and they do not impose any meaningful limits on practicing the abstract idea. Claims 1, 7, 14 and 20 are directed to an abstract idea.
After having evaluating the inquires set forth in Steps 2A Prong 1 and 2, it has been concluded that claims 1, 7, 14 and 20 not only recites a judicial exception but that the claims are directed to the judicial exception as the judicial exception has not been integrated into practical application.
Step 2B:
Claims 1, 7, 14 and 20: The claims do not include additional elements, alone or in combination, that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements amount to no more than generic computing components being used as a tool to apply the abstract idea and insignificant extra-solution data storage/transmission activity which do not amount to significantly more than the abstract idea. Further, the insignificant extra-solution data storage/transmission/gathering activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data … iv. Storing and retrieving information in memory”
Therefore, “Do the claims recite additional elements that amount to significantly more than the judicial exception? No, these additional elements, alone or in combination, do not amount to significantly more than the judicial exception.
With regard to claim 2, recites additional abstract idea “determine, in response to scheduling out a thread, a maximum bandwidth consumption with respect to the memory device, wherein the maximum bandwidth consumption is related to the execution of the thread” which is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think and observe, judge and evaluate bandwidth consumption data of a thread and mentally determine a maximum bandwidth consumption. Further, claim 2 recites the additional elements “store, in response to scheduling out the thread, the maximum bandwidth consumption”, and “send, in response to scheduling in the thread, the maximum bandwidth consumption to the power management unit”, which is merely a recitation of insignificant extra-solution data storage/transmission activity (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application. Further, the insignificant extra-solution data storage/transmission activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data … iv. Storing and retrieving information in memory”
With regard to claim 3, recites additional elements “wherein the average bandwidth consumption and the maximum bandwidth consumption are stored to a thread control block data structure” which is merely a recitation of insignificant extra-solution data storage activity (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application. Further, the insignificant extra-solution data storage activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity … iv. Storing and retrieving information in memory”
With regard to claim 4, recites additional abstract idea “wherein the average bandwidth consumption is determined based on the total bandwidth consumption and a duration of execution of the thread” which is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think and observe, judge and evaluate total bandwidth consumption and execution duration and mentally determine an average bandwidth consumption. Further, claim 4 recites additional elements “receive a total bandwidth consumption from a hardware monitor”, which is merely a recitation of insignificant extra-solution data transmission activity (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application. Further, the insignificant extra-solution data transmission activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data …”
With regard to claim 5, recites additional elements “wherein the average bandwidth consumption is sent to the power management controller if a duration the execution exceeds a threshold”, which is merely a recitation of insignificant data transmission activity (see MPEP § 2106.05(g)) which does not integrate the judicial exception into practical application. Further, the insignificant extra-solution data transmission activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data”.
With regard to claim 6, recites additional elements “withhold the average bandwidth consumption from the power management controller if the duration of execution does not exceed the threshold”, which is merely a recitation of insignificant data transmission activity (see MPEP § 2106.05(g)) which does not integrate the judicial exception into practical application. Further, the insignificant extra-solution data transmission activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data”.
.
With regards to claims 8-11 recite subject matter similar to that of claims 2-6 directed to a computer readable storage medium and is rejected under the same rationale.
With regard to claim 12, recites additional elements “wherein the average bandwidth consumption is sent to the power management unit via a topology aware register and power management capsule interface” which is merely a field of use/technological environment (MPEP § 2106.05(h)), which does not integrate a judicial exception into practical application.
With regard to claim 15, recites additional abstract idea “determine a maximum bandwidth demand based at least in part on the maximum bandwidth consumption, wherein the DVFS point is set further based on the maximum bandwidth demand”, which is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think and observe, judge and evaluate bandwidth consumption data of a thread and mentally determine a minimum bandwidth demand. Further, claim 15 recites the additional elements “to accumulate a maximum bandwidth consumption for the plurality of threads on the per thread basis with respect to the memory device, and wherein the maximum bandwidth consumption corresponds to the previous executions of the plurality of threads”, which is merely a recitation of insignificant extra-solution data gathering activity (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application. Further, the insignificant extra-solution data gathering activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data”
With regard to claim 16, recites additional abstract idea “to determine a non-thread bandwidth consumption with respect to the memory device, and wherein the maximum bandwidth demand and the minimum bandwidth demand are determined further based on the non-thread bandwidth consumption”, which is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think and observe, judge and evaluate non-thread bandwidth consumption data mentally determine a maximum and minimum bandwidth demand. The claim does not recite additional elements that incorporate the abstract idea into practical application or amount to significantly more.
With regard to claim 17, recites additional abstract idea “wherein the minimum bandwidth demand is determined further based on the maximum bandwidth consumption”, which is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think and observe, judge and evaluate bandwidth consumption data and mentally determine a maximum bandwidth demand.
The claim recites additional elements – “a second set of registers” which are merely recitations of generic computing components and functions being used as a tool to apply the abstract idea (see MPEP § 2106.05(f)) which does not integrate a judicial exception into practical application. Further, the claim recites the additional elements “to accumulate a maximum bandwidth consumption for high priority threads on the per thread basis with respect to the memory device, wherein the maximum bandwidth consumption corresponds to previous executions of the high priority threads”, which is merely a recitation of insignificant extra-solution data gathering activity (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application. Further, the insignificant extra-solution data gathering activity is Well-Understood, Routine, and Conventional (WURC), see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data”
With regard to claim 18, recites additional abstract idea “wherein the logic is to determine a non-thread bandwidth consumption with respect to the memory device, and wherein the minimum bandwidth demand is determined further based on the non-thread bandwidth consumption”, which is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think and observe, judge and evaluate non-thread bandwidth consumption data mentally determine a minimum bandwidth demand. The claim does not recite additional elements that incorporate the abstract idea into practical application or amount to significantly more.
With regard to claim 19, recites additional elements – “a watermark register to record the maximum bandwidth consumption” which are merely recitations of generic computing components and functions being used as a tool to apply the abstract idea (see MPEP § 2106.05(f)) which does not integrate a judicial exception into practical application.
With regards to claims 21-25 recite subject matter similar to that of claims 15-19 directed to a method and is rejected under the same rationale.
Having concluded analysis within the provided framework, Claims 1-12 and 14-25 do not recite patent eligible subject matter under 35 U.S.C. § 101.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Jain et al. (U.S. Patent No. 9298243 B2) in view of Meswani et al. (U.S. Pub. No. 20170083474 A1).
Jain and Meswani were cited in a previous office action.
As per claim 1, Jain teaches the invention substantially as claimed including a computing system comprising:
a power management unit (Fig. 1, discloses a memory controller MC 125 including a power management controller PMC 135);
a processing unit coupled to the power management unit (Fig. 1, Accelerator Processing Unit 100 includes CPU Processor cores 105, 110 coupled to other SOC logic that includes PMC 135); and
a memory device coupled to the processing unit, the memory device including a set of instructions (Fig. 1, CPU Processor Cores, 105, 110 coupled to Memory physical layer interface 130; col. 4, lines 7-10, 17-34 The memory physical layer interface 130 includes the circuitry used to drive signals that govern operation of the other memory modules that may be coupled to the APU 100), which when executed by the processing unit, cause the processing unit to:
determine … bandwidth consumption with respect to the memory device … (col. 7, lines 51-54 At block 405, bandwidth utilization of the memory may be measured, e.g., by measuring a ratio of a number of clock cycles used for memory access to a total number of clock cycles).
Jain does not expressly disclose: determine, in response to scheduling out a thread, an average bandwidth consumption with respect to the memory device, wherein the average bandwidth consumption is related to a previous execution of the thread in a multi-threaded execution environment, store, in response to scheduling out the thread, the average bandwidth consumption, and send, in response to scheduling in the thread, the average bandwidth consumption to the power management unit.
However, Meswani teaches: determine, in response to scheduling out a thread, an average bandwidth consumption with respect to the memory device, wherein the average bandwidth consumption is related to a previous execution of the thread in a multi-threaded execution environment, store, in response to scheduling out the thread, the average bandwidth consumption (par. 0023 The queue inspector 245 may also determine parameters such as the average latency, average bandwidth, and load for the memory modules 210, 215, 220; par. 0025 queue inspector 245 can receive feedback signaling from the local controllers 230, 235, 240 that indicates an average read or write bandwidth … The queue inspector 245 may use the feedback signaling to generate the statistical representations; par. 0013 The master controller … maintains [stores] knowledge of the QoS metrics on a thread basis as it monitors the memory traffic. It is noted that average bandwidth maybe determined based on feedback received of previous execution of thread requests), and send, in response to scheduling in the thread, the average bandwidth consumption to the … management unit (par. 0029, the average latency or average bandwidth of each thread can be periodically communicated to the local controllers 230, 235, 240 via explicit messages, allowing the local controllers 230, 235, 240 to adjust their scheduling decisions regarding the pending requests of each thread to meet the QoS requirements of each thread. It is noted, that the average bandwidth a thread maybe communicated to the local controllers responsive to pending thread requests being scheduled).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of scheduling thread requests in part based on average bandwidth of Meswani with the system and method of Jain resulting in a system and method in which pending threads requests are scheduled based on an average bandwidth by local controllers as in Meswani. One of ordinary skill in the art would have been motivated to make this combination for the purpose improving the overall performance of the system and minimizing bottlenecks caused by access requests to memory [0004]
As per claim 2, Meswani further teaches: determine, in response to scheduling out a thread, a maximum bandwidth consumption with respect to the memory device, wherein the maximum bandwidth consumption is related to the execution of the thread, store, in response to scheduling out the thread, the maximum bandwidth consumption, and send, in response to scheduling in the thread, the maximum bandwidth consumption to the power management unit (par. 0040 a master controller receives indicators of QoS requirements for one or more threads. The QoS requirements may be provided as a minimum value of a bandwidth available to the thread, a maximum value of a latency for access requests, minimum or maximum values of statistical combinations such as averages of the bandwidths or latency, and the like; par. 0029, the average latency or average bandwidth of each thread can be periodically communicated to the local controllers 230, 235, 240 via explicit messages, allowing the local controllers 230, 235, 240 to adjust their scheduling decisions regarding the pending requests of each thread to meet the QoS requirements of each thread).
As per claim 3, Meswani teaches: wherein the average bandwidth consumption and the maximum bandwidth consumption are stored to a thread control block data structure (par. 0040 a master controller receives indicators of QoS requirements for one or more threads. The QoS requirements may be provided as … a maximum value of a latency for access requests, minimum or maximum values of statistical combinations such as averages of the bandwidths; par. 0029, the average latency or average bandwidth of each thread can be periodically communicated to the local controller; par. 0013 The master controller … maintains [stores] knowledge of the QoS metrics on a thread basis as it monitors the memory traffic).
As per claim 4, Meswani further teaches: wherein the instructions, when executed, further cause the computing system to receive a total bandwidth consumption from a hardware monitor, and wherein the average bandwidth consumption is determined based on the total bandwidth consumption and a duration of execution of the thread (par. 0011 an average bandwidth (e.g., as indicated by an amount of data transferred over a fixed period of time), or an average load (e.g., as indicated by a number of requests over a period of time) for the individual memory modules).
As per claim 7, it is a computer readable storage medium having similar limitations as claim 1. Thus, claim 7 is rejected for the same rationale as applied to claim 1.
As per claim 8, it is a computer readable storage medium having similar limitations as claim 2. Thus, claim 8 is rejected for the same rationale as applied to claim 2.
As per claim 9, it is a computer readable storage medium having similar limitations as claim 3. Thus, claim 9 is rejected for the same rationale as applied to claim 3.
As per claim 10, it is a computer readable storage medium having similar limitations as claim 4. Thus, claim 10 is rejected for the same rationale as applied to claim 4.
Claims 5-6 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Jain in view of Meswani, as applied to claims 1 and 7 above, and further in view of KHUAT-DUY et al. (U.S. Pub. No. 20220027365 A1).
Ebsen was cited in a previous office action.
As per claim 5, Meswani further teaches: wherein the average bandwidth consumption is sent to the power management controller (par. 0029 the average latency or average bandwidth of each thread can be periodically communicated to the local controllers 230, 235, 240 via explicit messages, allowing the local controllers 230, 235, 240 to adjust their scheduling decisions regarding the pending requests of each thread to meet the QoS requirements of each thread).
Jain, Meswani do not expressly describe: send… if a duration of one or more of the previous execution or the subsequent execution exceeds a threshold.
However, KHUAT-DUY teaches: send … if a duration of one or more of the previous execution or the subsequent execution exceeds a threshold (par. 0226 the monitoring module 450 determines that the current execution time exceeds a … predetermined duration …, it considers that the corresponding query is invalid according to the second criterion and transmits this information to the supervision module 460).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of determining an execution time exceeds a predetermined duration and transmitting an information to a supervisor module of KHUAT-DUY with the system and method of Jain, Meswani resulting in a system and method which provides for in transmitting an average bandwidth consumption to a controller responsive to determining an execution time exceeds a predetermined duration as in KHUAT-DUY. One of ordinary skill in the art would have been motivated to make this combination for the purpose of reduces the number of false positives that would otherwise be generated by using one set of metrics only, or by only using the execution plan metrics to set the hardware or server performance metric thresholds (par. 0235). Further it would provide improving energy efficiency while minimizing impact on performance.
As per claim 6, Meswani further teaches: wherein the instructions, when executed, further cause the computing system to withhold the average bandwidth consumption from the power management controller if the duration of one or more of the previous execution or the subsequent execution does not exceed the threshold (par. Par. 0054 If the response time of a work request does not exceed the execution time threshold, completes without adjusting resources).
As per claim 11, it is a computer readable storage medium having similar limitations as claims 5 and 6. Thus, claim 11 is rejected for the same rationale as applied to claims 5 and 6.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Jain in view of Meswani, and further in view of Therien et al. (U.S. Pub. No. 20130151569 A1).
As per claim 12, Meswani further teaches: wherein the average bandwidth consumption is sent to the power management controller via a … interface (par. 0029 average bandwidth of each thread can be periodically communicated to the local controllers; Fig. 2, for example describes master controller communicating with local controllers via interface e.g. application programming interface (API)).
Meswani does not expressly describe: topology aware register and power management capsule interface.
However, Therien teaches: topology aware register and power management capsule interface (par. 0034 ACPI, for example, defines a hardware register interface that an ACPI-compatible OS may use to control core power management and performance features of platform hardware; for instance, par. 0052 A Definition Block contains information about the platform's hardware implementation details in the form of data objects arranged in a hierarchical (tree-structured) entity known as the "ACPI namespace", which represents the platform's hardware configuration. That is, the ACPI hardware register interface is designed to be topology-aware as it utilizes a hierarchical structure such as the ACPI namespace to accurately model and abstract the platform's hardware topology).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique using a ACPI defining a hardware register interface of Therien with the system and method of Meswani resulting in a system and method which provides an ACPI defined as a hardware register interface for communicating bandwidth consumption. One of ordinary skill in the art would have been motivated to make this combination for the purpose of facilitating performance and power management (par. 0033).
Claims 14-15, 20-21, 24-25 are rejected under 35 U.S.C. 103 as being unpatentable over Jain et al. (U.S. Patent No. 9298243 B2) in view of Meswani et al. (U.S. Pub. No. 20170083474 A1), and further in view of David et al. “Memory Power Management via Dynamic Voltage/Frequency Scaling”.
Jain, Meswani and David were cited in a previous office action.
As per claim 14, Jain teaches the invention substantially as claimed including a semiconductor apparatus (Fig. 1, accelerator Processing Unit 100) comprising:
one or more substrates (Fig. 2, Accelerator Processing Unit 100 is a SOC; col. 2, right column, lines 56-57 a system-on-a-chip (SOC) ); and
logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable or fixed-functionality hardware (Fig. 1, 2, describes Accelerator Processing Unit 100 comprises CPU Processor Cores 105, 110, and GPU 115 couple to SOC logic 120;), wherein the logic includes a first set of registers (col. 10, lines 31-32 Flash memory, a cache, RAM),
determine a … bandwidth demand based at least in part on the average bandwidth consumption (col. 7, lines 51-54 At block 405, bandwidth utilization of the memory may be measured, e.g., by measuring a ratio of a number of clock cycles used for memory access to a total number of clock cycles).
Jain does not expressly disclose: wherein the logic includes a first set of registers to accumulate an average bandwidth consumption for a plurality of threads on a per thread basis with respect to a memory device, and wherein the average bandwidth consumption corresponds to previous executions of the plurality of threads, the logic to: determine a minimum bandwidth demand based at least in part on the average bandwidth consumption.
However, Meswani teaches: wherein the logic includes a first set of … [par. 0045 flash memory, RAM] to accumulate an average bandwidth consumption for a plurality of threads on a per thread basis with respect to a memory device, wherein the average bandwidth consumption corresponds to previous executions of the plurality of threads, (par. 0023 The queue inspector 245 may also determine parameters such as the average latency, average bandwidth, and load for the memory modules 210, 215, 220; par. 0029, the average latency or average bandwidth of each thread can be periodically communicated to the local controllers 230, 235, 240 via explicit messages, allowing the local controllers 230, 235, 240 to adjust their scheduling decisions regarding the pending requests of each thread to meet the QoS requirements of each thread …. the queue inspector 245 determine data usage patterns for threads or applications based on profiling, an access history indicated by the monitored access requests), and
the logic to: determine a minimum bandwidth demand based at least in part on the average bandwidth consumption (par. 0023, may also determine parameters such as … average bandwidth …; par. 0040 a minimum value of a bandwidth … minimum or maximum values of statistical combinations such as averages of the bandwidths).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of determining minimum/maximum bandwidth values of Meswani with the system and method of Jain resulting in a system and method in which provides for determining minimum bandwidth in part on averages of bandwidths as in Meswani. One of ordinary skill in the art would have been motivated to make this combination for the purpose improving the overall performance of the system and minimizing bottlenecks caused by access requests to memory [0004]
Jain and Meswani do not expressly describe: in response to a subsequent execution of one of the plurality of threads being scheduled, set a dynamic voltage and frequency scaling (DVFS) point based at least in part on the minimum bandwidth demand.
However, analogous prior art, David teaches: in response to a subsequent execution of one of the plurality of threads being scheduled, set a dynamic voltage and frequency scaling (DVFS) point based at least in part on the minimum bandwidth demand (page 7, left column, lines 18-19 Benchmarks are sorted by baseline average bandwidth utilization [minimum bandwidth demand]; page 7, left column, lines 43-46, A controller algorithm runs periodically, at fixed epochs, and measures average bandwidth usage for the previous epoch. Based on this measurement, it picks the corresponding memory frequency; page 7, left column, lines 51-54 By choosing a lower memory frequency at low bandwidth demand, we have little impact on performance, as Figure 6 shows. As bandwidth demand increases, we scale up frequency. To implement this, we simply pick a fixed bandwidth threshold for each frequency transition; page 7, right column, Algorithm 1.That is, when the average BW of benchmarks [threads] change or meet a predefined bandwidth thresholds, memory frequency [DVFS] is adjusted, which is equivalent to using average BW for subsequent execution of benchmarks/threads).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of adjusting memory frequency values of David with the system and method of Jain and Meswani resulting in a system and method which provides for adjusting memory frequency/setting DVFS as in David. One of ordinary skill in the art would have been motivated to make this combination for the purpose of improving energy efficiency while minimally impacting performance (page 8, left column, last paragraph).
As per claim 15, Meswani further teaches: wherein the logic further includes a second set of registers to accumulate a maximum bandwidth consumption for the plurality of threads on the per thread basis with respect to the memory device, and wherein the maximum bandwidth consumption corresponds to the previous executions of the plurality of threads, the logic to: determine a maximum bandwidth demand based at least in part on the maximum bandwidth consumption (par. 0040 The QoS requirements may be provided as a minimum value of a bandwidth available to the thread, a maximum value of a latency for access requests, minimum or maximum values of statistical combinations such as averages of the bandwidths). Jain further teaches: wherein the DVFS point is set further based on the maximum bandwidth demand (col. 11, lines 25-28 modifying the operating point comprises modifying at least one of an operating frequency or an operating voltage of said at least one of the memory physical layer interface).
As per claim 20, it is a method having similar limitations as claim 14. Thus, claim 20 is rejected for the same rationale as applied to claim 14.
As per claim 21, it is a method having similar limitations as claim 15. Thus, claim 21 is rejected for the same rationale as applied to claim 15.
As per claim 24, it is a method having similar limitations as claim 18. Thus, claim 24 is rejected for the same rationale as applied to claim 18.
As per claim 25, it is a method having similar limitations as claim 19. Thus, claim 25 is rejected for the same rationale as applied to claim 19.
Claims 16 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Jain in view of Meswani and David, and further in view of Gough et al. (U.S. Pub. No. 20190042434 A1).
As per claim 16, Meswani further teaches: maximum bandwidth demand and the minimum bandwidth demand (par. 0040 The QoS requirements may be provided as a minimum value of a bandwidth available to the thread … minimum or maximum values … such as averages of the bandwidths). Jain, Meswani and David do not expressly teach: wherein the logic is to determine a non-thread bandwidth consumption with respect to the memory device, and wherein the maximum bandwidth demand and the minimum bandwidth demand are determined further based on the non-thread bandwidth consumption.
However, Gough teaches: wherein the logic is to determine a non-thread bandwidth consumption with respect to the memory device, and wherein the maximum bandwidth demand … are determined further based on the non-thread bandwidth consumption (par. 0114 calculated maximum theoretical memory bandwidth based on uncore [non-thread] frequency, memory frequency, channel population, and/or interleaving; par. 0025 The theoretical maximum memory bandwidth may be computed by a memory bandwidth computation module, and may be calculated … as a function of several values available through registers … including DRAM speed, memory channel population, channel interleaving settings, and uncore frequency).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of determining maximum theoretical memory bandwidth based one uncore [non-thread] frequency, memory frequency, channel population of Gough with the system and method of Jain, Meswani and David to provide a system and method in which both the minimum and maximum l memory bandwidth is determined at least in part based on an uncore [non-thread] bandwidth/frequency. One of ordinary skill in the art would have been motivated to make this combination for the purpose of providing a more uniform quality of service to all tenants (par. 0024)
As per claim 22, it is a method having similar limitations as claim 16. Thus, claim 22 is rejected for the same rationale as applied to claim 16.
Claims 17 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Jain view of Meswani and David, further in view of Bower et al. (US 20170346761 A1), and further inv view of Meng et al. (U.S. Pub. 20250119959 A).
As per claim 17, Meswani further teaches: wherein the … bandwidth consumption corresponds to normal priority threads (par. 0022 The master controller 225 also provides control information to the local controllers … the control information may include information indicating priorities associated with the … corresponding threads; claim 4, the second controller generates the control information comprising different priorities for the access requests in different threads, wherein the priorities are based on at least one of average response latencies for access requests in the different threads, average bandwidths associated with the memory modules, and average loads), wherein the logic further includes a second set of registers [par. 0045 flash memory, RAM]
However, Bower teaches: accumulate a maximum bandwidth consumption for high priority threads on the per thread basis with respect to the memory device, wherein the maximum bandwidth consumption corresponds to previous executions of the high priority threads (par. 0032 In another embodiment, bandwidth to the low priority incomplete task may be reduced, and bandwidth to the high priority incomplete task may be increased, only if the high priority incomplete task has a current portion of the network bandwidth assigned to it that is below a threshold bandwidth associated with the high priority task (e.g., a maximum bandwidth amount that the high priority incomplete task is capable of utilizing, etc.). In yet another embodiment).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of providing maximum bandwidth to a high priority task and provided reduced bandwidth to a lower/normal priority task of Bower with the system and method of Jain in view of Meswani and David resulting in a system and method in which a maximum bandwidth is associated with to a high priority as in Bower. One of ordinary skill in the art would have been motivated to make this combination for the purpose of improve latency at both the management server and managed endpoints (par. 0002).
Jain, Meswani, David and Bower do not expressly describe: wherein the average bandwidth consumption corresponds to normal priority threads.
However, Meng teaches: wherein the average … consumption corresponds to normal priority (par. 0170 if current video data has a normal priority, the pre-pull streaming mode may be started, and the average power consumption … may be determined).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of providing an average power consumption that corresponds to a normal priority of a video data of Meng with the system and method of Jain, Meswani, David and Bower resulting in a system and method which provides an average bandwidth consumption corresponding to a normal priority thread. One of ordinary skill in the art would have been motivated to make this combination for the purpose of controlling bandwidth according to actual needs (0074).
As per claim 23, it is a method having similar limitations as claim 17. Thus, claim 23 is rejected for the same rationale as applied to claim 17.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Jain view of Meswani, David, Bower and Meng, and further in view of Gough et al. (U.S. Pub. No. 20190042434 A1).
As per claim 18, Meswani further teaches: wherein the minimum bandwidth demand is determined (par. 0040 The QoS requirements may be provided as a minimum value of a bandwidth available to the thread).
Jain, Meswani, David, Bower and Meng do not expressly teach wherein the logic is to determine a non-thread bandwidth consumption with respect to the memory device, and wherein the minimum bandwidth demand is determined further based on the non-thread bandwidth consumption.
However, Gough teaches: wherein the logic is to determine a non-thread bandwidth consumption with respect to the memory device, and wherein the … bandwidth demand is determined further based on the non-thread bandwidth consumption (par. 0114 calculated … theoretical memory bandwidth based on uncore [non-thread] frequency, memory frequency, channel population, and/or interleaving; par. 0025 The theoretical maximum memory bandwidth may be computed by a memory bandwidth computation module, and may be calculated … as a function of several values available through registers … including DRAM speed, memory channel population, channel interleaving settings, and uncore frequency).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique of calculating theoretical memory bandwidth based one uncore [non-thread] frequency, memory frequency, channel population of Gough with the system and method of Jain in view of Meswani and David in order to provide a system and method in which the minimum bandwidth demand of Meswani is determined at least in part based on an uncore [non-thread] bandwidth/frequency. One of ordinary skill in the art would have been motivated to make this combination for the purpose of providing a more uniform quality of service to all tenants (par. 0024)
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Jain in view of Meswani, David and Bower, and further in view of Mister et al. (U.S. Patent No. 7328457 B1).
Mister was cited in a previous office action.
As per claim 19, Jain further teaches: wherein the logic further includes a … [Flash memory, a cache, RAM] ( col. 10, lines 31-32) to record the maximum bandwidth consumption (col. 4, lines 43-46, Fig. 1, The PMC 135 can monitor the memory bandwidth utilization, e.g. by monitoring a number of read/write instructions processed by a memory physical layer interface 130).
Jain, Meswani, David and Bower do not disclose: a watermark register.
However, Mister teaches: a watermark register (col. 4, lines 40-41, the enable logic may include a buffer watermark register).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the technique using watermark register to store data with the system of Jain, Meswani, David and Bower resulting in a system which uses a watermark register that stores/records bandwidth consumption data as in David. One of ordinary skill in the art would have been motivated to make this combination for the purpose of facilitating access to stored bandwidth consumption information.
Response to Arguments
Applicant's arguments filed 01/02/2026 have been fully considered but they are not persuasive.
(1) The applicant argues in page 9 for claim 1 that “The examiner's assertion that Meswani teaches sending the average bandwidth consumption in response to a subsequent execution of a thread being scheduled in traversed because Meswani teaches adjusting scheduling decisions […] which is the opposite of responding to scheduling decisions.
As per point 1, the examiner respectfully submits that Meswani clearly teaches par. 0029, the average latency or average bandwidth of each thread can be communicated to the local controllers via explicit messages, allowing the local controllers to adjust their scheduling decisions regarding the pending requests of each thread to meet the QoS requirements of each thread. That is, the average bandwidth of a thread may be send to a local controller prior to/during scheduling in of pending thread requests in order to adjust/make scheduling decisions based in part on the average bandwidth, which is equivalent to sending the average bandwidth consumption in response to scheduling in the thread. Therefore, applicant’s arguments are not persuasive.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
U.S. Pub. No. 20150006924 A1 teaches selection of an operating point of a memory physical layer interface and a memory controller based on memory bandwidth utilization.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Willy W. Huaracha whose telephone number is (571) 270-5510. The examiner can normally be reached on M-F 8:30-5:00pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bradley Teets can be reached on (571) 272-3338. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WH/
Examiner, Art Unit 2195
/BRADLEY A TEETS/Supervisory Patent Examiner, Art Unit 2197
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