DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. Applicant’s submission filed 06 January 2026 [hereinafter Response] has been entered, where:
Claims 1, 5, and 13 have been amended.
Claims 1-20 are pending.
Claims 1-20 are rejected.
Claim Rejections - 35 U.S.C. § 101
3. 35 U.S.C. § 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
4. Claims 1-20 are rejected under 35 U.S.C. § 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 1 recites a digital signal processor, which is a product, and thus one of the statutory categories of patentable subject matter. (35 U.S.C. § 101).
However, under Step 2A Prong One, the claim recites the limitations of “[(a)]1 computing a first decision variable based on a first distance of a pixel from a first probability distribution of the mixture model, and a first distance threshold, ” “[(b)] computing, a second decision variable based on a second distance of the pixel from a second probability distribution of the mixture model and a second distance threshold,” “[(c)] classifying in substantially real-time the pixel as being a member of the first subpopulation of pixels or the second subpopulation of pixels based on the first decision variable and the second decision variable,” “[(e)] updating, using the parallel MACS, a first parameter for the first probability distribution using the first decision variable,” and “[(f)] updating, using the parallel MACS, a second parameter for the second probability distribution using the second decision variable . . . .” The limitations of “[(a), (b)] computing . . . decision variable,” “[(c)] classifying,” and “[(e), (f)] updating a . . . parameter” can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
The claim also provides more details or specifics of the abstract idea of “[(a)] computing a first decision variable,” “[(a.1)] wherein the first decision variable equals to 1 or 0,” and “[(a.2)] [(a.2)] wherein the first probability distribution corresponds to a first subpopulation of pixels,” which are merely more specific to the abstract idea. The claim also provides more details or specifics of the abstract idea of “[(b)] computing a second decision variable,” “[(b.1)] wherein the first decision variable equals to 1 or 0,” and “[(b.2)] wherein the second probability distribution corresponds to a second subpopulation of pixels,” which are merely more specific to the abstract idea.
The limitations of “[(a)] computing a first decision variable . . . [and (b)] computing a second decision variable” are from probabilistic or statistical distributions of the “mixture model.” When given a broadest reasonable interpretation in light of the disclosure, (MPEP § 2111), a “mixture model” is a probabilistic model representing the presence of subpopulations within an overall population, wherein such distributions are mathematical calculations, and thus a mathematical concept, (MPEP § 2106.04(a)(2) sub I), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)). Thus, claim 1 recites an abstract idea.
Under Step 2A Prong Two, the claim as a whole is not integrated into a practical application, because the additional elements recited in the claim beyond the identified judicial exception include a “digital signal processor,” “hardware computation blocks comprising parallel multiplier-accumulator blocks (MACS),” and “memory comprising samples of a signal obtained by the signal processing system and instructions for processing the samples based on the mixture model, wherein the instructions, when executed by the hardware computation blocks, perform,” which are generic computer components used to implement the abstract idea, (MPEP § 2106.05(f)), that do not serve to integrate the abstract idea into a practical application.
[Examiner notes that the plain meaning of a multiplier–accumulator (MAC) block is a hardware unit that performs a multiply–accumulate (MAC) operation, and is a fundamental building block in many high-performance computing and signal processing applications. The component operates to multiply two numbers and adds the result to an accumulator register. The broadest reasonable interpretation of the element is that of a generic computer component, which is not inconsistent with the Applicant’s disclosure. (MPEP § 2111; see Specification ¶ 0062)]
The claim also recites more details or specifics of the additional element of “parallel-multiplier-accumulator blocks (MACS)”, where in “using the parallel MACS,” updating “during a same clock cycle,” which is merely more specific to the generic computer components (parallel MACS) to implement the abstract idea, (MPEP § 2106.05(f)), that does not integrate the abstract idea into a practical application.
The claim further recites the limitation of “[(d)] communicating an output from the digital signal processor indicating whether the pixel is a member of the first subpopulation or the second subpopulation,” which is a post-processing, insignificant extra-solution activity of transmitting a data output of “classifying”, (MPEP § 2106.05(g)), that does not serve to integrate the abstract idea into a practical application. Therefore, claim 1 is directed to the abstract idea.
Finally, under Step 2B, the additional elements, taken alone or in combination, do not represent significantly more than the abstract idea itself. The claim recites additional elements including a “digital signal processor,” “hardware computation blocks comprising parallel multiplier-accumulator blocks (MACS),” and “memory comprising samples of a signal obtained by the signal processing system and instructions for processing the samples based on the mixture model, wherein the instructions, when executed by the hardware computation blocks, perform,” which are generic computer components used to implement the abstract idea, (MPEP § 2106.05(f)), that do not serve to integrate the abstract idea into a practical application. The claim also recites more details or specifics of the additional element of “parallel-multiplier-accumulator blocks (MACS)”, where in “using the parallel MACS,” updating “during a same clock cycle,” which is merely more specific to the generic computer components (parallel MACS) to implement the abstract idea, (MPEP § 2106.05(f)), that does not amount to significantly more than the abstract idea.
The claim also recites the limitation of “[(d)] communicating an output from the digital signal processor indicating whether the pixel is a member of the first subpopulation or the second subpopulation,” which is a well-understood, routine, and conventional activity of transmitting a data output of “classifying”, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea. Therefore, claim 1 is subject-matter ineligible.
Claim 5 recites a method, which is a process, and thus one of the statutory categories of patentable subject matter. (35 U.S.C. § 101).
However, under Step 2A Prong One, the claim recites the limitations of “[(a)] computing, using the hardware computation blocks, a first decision variable based on a first distance of a pixel from a first probability distribution of the mixture model, and a first distance threshold,” “[(b)] computing, using the hardware computation blocks, a second decision variable based on a second distance of the pixel from a second probability distribution of the mixture model and a second distance threshold,” “[(c)] classifying in substantially real-time the pixel as being a member of the first subpopulation of pixels or the second subpopulation of pixels based on the first decision variable and the second decision variable,” “[(e)] updating, using the hardware computation blocks, a first parameter for the first probability distribution using the first decision variable,” and “[(f)] updating, using the hardware computation blocks, a second parameter for the second probability distribution using the second decision variable . . . .” The limitations of “[(a)] computing a first decision variable,” “[(b)] computing a second decision variable,” “[(c)] classifying,” and “[(e), (f)] updating . . . parameter[s]” can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
The claim also provides more details or specifics of the abstract idea of “[(a)] computing a first decision variable,” “[(a.1)] wherein the first decision variable equals to 1 or 0,” and “[(a.2)] [(a.2)] wherein the first probability distribution corresponds to a first subpopulation of pixels,” which are merely more specific to the abstract idea. The claim also provides more details or specifics of the abstract idea of “[(b)] computing a second decision variable,” “[(b.1)] wherein the first decision variable equals to 1 or 0,” and “[(b.2)] wherein the second probability distribution corresponds to a second subpopulation of pixels,” which are merely more specific to the abstract idea.
The limitations of “[(a)] computing a first decision variable . . . [and (b)] computing a second decision variable” are from probability or statistical distributions of the “mixture model.” When given a broadest reasonable interpretation in light of the disclosure, (MPEP § 2111), a “mixture model” is a probabilistic model representing the presence of subpopulations within an overall population, wherein such distributions are mathematical calculations, and thus is a mathematical concept, (MPEP § 2106.04(a)(2) sub I), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)). Thus, claim 5 recites an abstract idea.
Under Step 2A Prong Two, the claim as a whole is not integrated into a practical application, because the additional elements recited in the claim beyond the identified judicial exception include a “digital signal processor,” and “hardware computation blocks,” which are generic computer components used to implement the abstract idea, (MPEP § 2106.05(f)), that do not serve to integrate the abstract idea into a practical application. The claim also recites more details or specifics of the additional element of “hardware computation blocks” by updating is “during a same clock cycle,” which is merely more specific to the generic computer components (hardware computation blocks) to implement the abstract idea, (MPEP § 2106.05(f)), that does not integrate the abstract idea into a practical application.
The claim also recites the limitation of “[(d)] communicating an output from the digital signal processor indicating whether the pixel is a member of the first subpopulation or the second subpopulation,” which is a post-processing, insignificant extra-solution activity of transmitting a data output of “classifying”, (MPEP § 2106.05(g)), that does not serve to integrate the abstract idea into a practical application. Therefore, claim 5 is directed to the abstract idea.
Finally, under Step 2B, the additional elements, taken alone or in combination, do not represent significantly more than the abstract idea itself. The claim recites additional elements including a “digital signal processor,” and “hardware computation blocks,” which are generic computer components used to implement the abstract idea, (MPEP § 2106.05(f)), that do not amount to significantly more than the abstract idea. The claim also recites more details or specifics of the additional element of “hardware computation blocks” by updating is “during a same clock cycle,” which is merely more specific to the generic computer components (hardware computation blocks) to implement the abstract idea, (MPEP § 2106.05(f)), that does not amount to significantly more than the abstract idea.
The claim also recites the limitation of “[(d)] communicating an output from the digital signal processor indicating whether the pixel is a member of the first subpopulation or the second subpopulation,” which is a well-understood, routine, and conventional activity of transmitting a data output of “classifying”, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea. Therefore, claim 5 is subject-matter ineligible.
Claim 13 recites a digital signal processor, which is a product, and thus one of the statutory categories of patentable subject matter. (35 U.S.C. § 101).
However, under Step 2A Prong One, the claim recites the limitations of “[(a)] computing a decision variable based on a distance of a pixel from a probability distribution of the mixture model, and a first distance threshold, wherein the decision variable equals to 1 or 0,” “[(b)] classifying in substantially real-time the pixel as being a member of the first subpopulation of pixels or the second subpopulation of pixels based on the first decision variable and the second decision variable,” “[(d)] updating . . . a first parameter for the first probability distribution using the first decision variable,” and “[(e)] updating . . . a second parameter for the second probability distribution using the second decision variable . . . .” The limitations of “[(a)] computing a decision variable,” “[(b)] classifying,” and “[(d), (e)] updating . . . parameter[s]” can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
The claim also provides more details or specifics of the abstract idea of “[(a)] computing a decision variable,” “[(a.1)] wherein the . . . decision variable equals to 1 or 0,” and [(a.2)] [(a.2)] wherein the probability distribution corresponds to a subpopulation of pixels,” which are merely more specific to the abstract idea. The limitation of “[(a)] computing a decision variable” is from probability or statistical distributions of the “mixture model.” When given a broadest reasonable interpretation in light of the disclosure, (MPEP § 2111), a “mixture model” is a probabilistic model representing the presence of subpopulations within an overall population, wherein such distributions are mathematical calculations, and thus is a mathematical concept, (MPEP § 2106.04(a)(2) sub I), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)). Thus, claim 13 recites an abstract idea.
Under Step 2A Prong Two, the claim as a whole is not integrated into a practical application, because the additional elements recited in the claim beyond the identified judicial exception include a “digital signal processor,” “hardware computation blocks comprising parallel multiplier-accumulator blocks (MACS),” and “memory comprising samples and instructions for processing the samples based on the mixture model, wherein the instructions, when executed by the parallel MACS, perform,” which are generic computer components used to implement the abstract idea, (MPEP § 2106.05(f)), that do not serve to integrate the abstract idea into a practical application.
[Examiner notes that the plain meaning of a multiplier-accumulator (MAC) block is a hardware unit that performs a multiply–accumulate (MAC) operation, and is a fundamental building block in many high-performance computing and signal processing applications. The component operates to multiply two numbers and adds the result to an accumulator register. The broadest reasonable interpretation of the element is that of a generic computer component, which is not inconsistent with the Applicant’s disclosure. (MPEP § 2111; see Specification ¶ 0062)]
The claim also recites more details or specifics of the additional element of “parallel-multiplier-accumulator blocks (MACS)”, where in “using the parallel MACS,” updating “during a same clock cycle,” which is merely more specific to the generic computer components (parallel MACS) to implement the abstract idea, (MPEP § 2106.05(f)), that does not integrate the abstract idea into a practical application.
The claim also recites the limitation of “[(c)] communicating an output from the digital signal processor indicating whether the pixel is a member of the subpopulation,” which is a post-processing, insignificant extra-solution activity of transmitting a data output of “classifying”, (MPEP § 2106.05(g)), that does not serve to integrate the abstract idea into a practical application. Therefore, claim 13 is directed to the abstract idea.
Finally, under Step 2B, the additional elements, taken alone or in combination, do not represent significantly more than the abstract idea itself. The claim recites additional elements including a “digital signal processor,” “hardware computation blocks comprising parallel multiplier-accumulator blocks (MACS),” and “memory comprising samples and instructions for processing the samples based on the mixture model, wherein the instructions, when executed by the parallel MACS, perform,” which are generic computer components used to implement the abstract idea, (MPEP § 2106.05(f)), that do not serve to integrate the abstract idea into a practical application. The claim also recites more details or specifics of the additional element of “parallel-multiplier-accumulator blocks (MACS)”, where in “using the parallel MACS,” updating “during a same clock cycle,” which is merely more specific to the generic computer components (parallel MACS) to implement the abstract idea, (MPEP § 2106.05(f)), that does not amount to significantly more than the abstract idea.
The claim also recites the limitation of “[(c)] communicating an output from the digital signal processor indicating whether the pixel is a member of the subpopulation,” which is a well-understood, routine, and conventional activity of transmitting a data output of “classifying”, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea. Therefore, claim 13 is subject-matter ineligible.
Claim 2 depends from claim 1. Claim 15 depends from claim 13. The claims provide more details or specifics to the additional element of the “hardware computation blocks,” (claims 2 and 15: “wherein: the MACS implement infinite impulse response filters”) and (claim 2: “wherein: . . . coefficients of the infinite impulse response filters to update the first parameter and the second parameter are computed using on the first decision variable, the second decision variable, and a predefined learning rate;” claim 15: wherein: . . . coefficients of the infinite impulse response filters to update the first parameter and the second parameter are computed using the decision variable and a predefined learning rate”), and accordingly, are merely more specific to the additional elements. The abstract idea of these claims are not integrated into a practical application, (see MPEP § 2106.04(d)), nor do they amount to significantly more than the abstract idea, (MPEP § 2106.05(d)), because the claims recite no more than the abstract idea. Therefore, claims 2 and 15 are subject-matter ineligible.
Claim 3 depends from claim 1. Claim 16 depends from claim 13. The claims recites more details or specifics to the additional element of the “hardware computation blocks,” (claims 3 and 16: wherein: the hardware computation blocks further comprise a subtraction hardware computation block”), and accordingly, is merely more specific to the additional element. The claim also recites more details or specifics to the abstract idea of “computing the first decision variable,” (claims 3 and 16: wherein: . . . computing of the first decision variable comprises providing the first distance and the first distance threshold as operands of the subtraction hardware computation block). The claims also recites more details or specifics to the abstract idea of “computing the first decision variable,” the additional elements of “extracting a sign bit of a result of the subtraction hardware computation block, and setting the sign bit as the first decision variable,” which are the use of generic computer components (subtraction hardware computation block) to implement the abstract idea, (MPEP § 2106.05(f)), that does not serve to integrate the abstract idea into a practical application, nor amount to significantly more than the abstract idea. Therefore, claims 3 and 16 are subject-matter ineligible.
Claim 4 depends from claim 1. Claim 12 depends from claim 5. Claim 14 depends from claim 13. The claims recite more details or specifics of the additional elements of “updating . . . a . . . parameter,” (claims 4 and 12: “wherein: the first parameter is one of the following: a weight, a mean, and a variance of the first probability distribution; and the second parameter is one of the following: a weight, a mean, and a variance of the second probability distribution”; claim 14: “wherein the first parameter and the second parameter are two of the following: a weight, a mean, and a variance of the probability distribution”), and accordingly, are merely more specific to the additional elements. The abstract idea of these claims are not integrated into a practical application, (see MPEP § 2106.05(d)), nor do they amount to significantly more than the abstract idea, (MPEP § 2106.05(d)), because the claims recite no more than the abstract idea. Therefore, claims 4, 12, and 14 are subject-matter ineligible.
Claims 6-11 depend from claim 1. The claims provide more specifics or details to the additional elements of “updating . . . parameters,” (claim 6: “wherein updating the first parameter comprises: setting a first multiplicative factor as 1 subtracted by a predefined learning rate”; claim 7: wherein updating the first parameter comprises: setting a second multiplicative factor as the first decision variable”; claim 8: “wherein updating the first parameter comprises: setting a first multiplicative factor as 1 subtracted by a predefined learning rate; setting a second multiplicative factor as the first decision variable; and setting an updated value for the first parameter by (1) multiplying the first multiplicative factor with a prior value of the first parameter, (2) multiplying the second multiplicative factor with the predefined learning rate, and (3) setting the updated value for the first parameter as a sum of (1) and (2)”; claim 9: “updating the first parameter and updating the second parameter are performed without use of an if-else statement or branching”; claim 10: “wherein updating the first parameter and updating the second parameter are performed using two infinite impulse response filters executing in parallel”; and claim 11: “wherein updating the first parameter comprises: setting a first multiplicative factor as 1 subtracted by a predefined learning rate; setting a second multiplicative factor as the first decision variable; and setting an updated value for the first parameter by using the first multiplicative factor and the second multiplicative factor as coefficients of an infinite impulse response filter.” Accordingly, the claims are merely more specific to the additional element. The abstract idea of these claims are not integrated into a practical application, (see MPEP § 2106.05(d)), nor do they amount to significantly more than the abstract idea, (MPEP § 2106.05(d)), because the claims recite no more than the abstract idea. Therefore, claims 6-11 are subject-matter ineligible.
Claim 17 depends from claim 13. The claim recites the limitation of “the operations further comprise: setting a first multiplicative factor as 1 subtracted by a predefined learning rate,” which is a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)). The abstract idea of the claim is not integrated into a practical application, (see MPEP § 2106.05(d)), nor does it amount to significantly more than the abstract idea, (MPEP § 2106.05(d)), because the claim recites no more than the abstract idea. Therefore, claim 17 is subject-matter ineligible.
Claim 18 depends from claim 13. The claim recites more details or specifics of the abstract idea of “computing a decision variable,” (claim 18: “wherein the operations further comprise: setting a second multiplicative factor as the decision variable”), and accordingly, is merely more specific to the abstract idea. The abstract idea of these claims are not integrated into a practical application, (see MPEP § 2106.05(d)), nor do they amount to significantly more than the abstract idea, (MPEP § 2106.05(d)), because the claims recite no more than the abstract idea. Therefore, claim 18 is subject-matter ineligible.
Claim 19 depends from claim 13. The claim provides more details or specifics to the additional element of “updating the first parameter,” (claim 19: “the operations further comprise: setting a first multiplicative factor as 1 subtracted by a predefined learning rate; and setting a second multiplicative factor as the decision variable; and updating the first parameter comprises (1) multiplying the first multiplicative factor with a prior value of the first parameter, (2) multiplying the second multiplicative factor with the predefined learning rate, and (3) setting the updated value for the first parameter as a sum of (1) and (2)”), and accordingly, are merely more specific to the additional element. The abstract idea of these claims are not integrated into a practical application, (see MPEP § 2106.05(d)), nor do they amount to significantly more than the abstract idea, (MPEP § 2106.05(d)), because the claims recite no more than the abstract idea. Therefore, claim 19 is subject-matter ineligible.
Claim 20 depends from claim 13. The recites “wherein the operations further comprise: updating, using the parallel MACS, a third parameter for the probability distribution using the decision variable, during a same clock cycle as the updating of the first parameter and the updating of the second parameter.” The limitation of “updating . . . a third parameter” is a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)). The additional elements of “the parallel MACS” and “during a same clock cycle” is the use of generic computer components (parallel multiplier-accumulator blocks) to implement the abstract idea, (MPEP § 2106.05(f)), that does not serve to integrate the abstract idea into a practical application, nor amount to significantly more than the abstract idea. The abstract idea of these claims are not integrated into a practical application, (see MPEP § 2106.05(d)), nor do they amount to significantly more than the abstract idea, (MPEP § 2106.05(d)), because the claims recite no more than the abstract idea. Therefore, claim 20 is subject-matter ineligible.
Response to Arguments
5. Applicant’s arguments have been fully considered; Examiner responds below accordingly:
Section 101
6. “The claim also recites the limitation of “[(d)] communicating an output from the digital signal processor indicating whether the pixel is a member of the first subpopulation or the second subpopulation,” which is a well-understood, routine, and conventional activity of transmitting a data output of “classifying”, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea. . . . Paragraphs [0039] - [0048] of the application as published describe examples of the updating of parameters based on multiplicative factors in more detail. Applicant respectfully submits that, under Step 2B, each of the independent claims themselves reflects the disclosed improvement in technology. Each of the independent claims include components or steps of the invention that provide the improvement described in the specification.” (Response at pp. 9-10 (citations omitted)).
In support thereof, Applicant submits that claims reflect the improvement under Leg One of Section 2106.04(d)(1). Applicant submits, “[f]or example:
* * *
[(e)] updating, using the parallel MACS, a first parameter . . . using the first decision variable; and
[(f)] updating, using the parallel MACS, a second parameter . . . using the second decision variable during a same clock cycle as the updating of the first parameter
as claimed in the independent claims, and as described in the specification uses respective multiplicative factors to update the probability distributions. [(claim 1, lines 21-25)].The first decision variable and a second decision variable indicates whether a probability distribution (Gaussian) is matched or non-matched with a pixel and ultimately determines which multiplicative factor will be used to update the respective probability distribution. As described in the specification, this use of multiplicative factors to update the probability distributions eliminates the need for the numerous if-else statements that conventionally prevent the implementation of mixture models in highly parallel pipelines. Performing the updating steps in parallel as claimed is an inventive aspect that substantially improves process speed.” (Response at p. 10).
Examiner’s Response:
Examiner respectfully submits that under Step 2A Prong Two, the rejection identifies any additional elements recited in the claim beyond the identified judicial exception (i.e., abstract idea); and evaluate the integration of the judicial exception into a practical application by explaining that the claim as a whole, looking at the additional elements individually and in combination, does not integrate the judicial exception into a practical application using the considerations set forth in MPEP §§ 2106.04(d), 2106.05(a)- (c) and (e)- (h).
Also, under Step 2A Prong Two, “integration” may be based on the improvements in the functioning of a computer or an improvement to any other technology or technical field. (MPEP § 2106.04(d)(1)). The evaluation requires, [i]n sum, that (1) the specification should be evaluated to determine if the disclosure provides sufficient details such that one of ordinary skill in the art would recognize the claimed invention as providing an improvement. Next, (2) if the specification sets forth such an improvement, the claim must be evaluated to ensure that the claim itself reflects the disclosed improvement.
Aspects of the disclosure relied upon by the Applicant, however, are not tethered to the instant claims. For example, Applicant points to:
an improved implementation of MOG is obviates the need to use if-else statements. Instead of using if-else statements, the implementation of MOG embeds the if-else statements (i.e., the control decisions) as multiplicative factors used in updating the parameters. Using appropriate algebraic formulations, the multiplicative factors can cause the parameters to be updated appropriately without having to use if-else statements. By avoiding the use of if-else statements, the control decisions can effectively be pipelined more efficiently with a high degree of parallelism without branching. The resulting pipeline makes it easier to implement a higher level of parallel processing by multiple hardware computation blocks during the same clock cycle and thus significantly increasing the throughput of the computing system.
(Response at pp. 9-10 (Specification ¶ 0040)). The base claims do not appear to positively recite the implementation of a “Mixture of Gaussians,” (that is, a mixture model); for example, the claims recite:
“decisions involving a mixture model” (claim 1, line 2),
“processing the samples based on the mixture model,” (claim 1, line 6),
“computing a first decision variable based on a first distance of a pixel from a first probability distribution of the mixture model, model, and a first distance threshold,” (claim 1, lines 8-9)
“computing, a second decision variable based on a second distance of the pixel from a second probability distribution of the mixture model and a second distance threshold,” (claim 1, lines 12-13).
The “mixture model” of the claims is not positively recited because the element is inferentially recited as simply being “involved” or “based” in the subject matter of the claims.
Also, the claims recite “updating” a first and a second parameter; however, the claims do not provide a context for the parameters, such as whether these are machine leaning model parameters (e.g., a classifier parameters), an output characterizing a subpopulation, etc. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 20 USPQ2d 1057 (Fed. Cir. 1993).
Also, the instant application confirms that the asserted claims do not require specialized computing components (DSP, parallel MACS, hardware computation blocks) as confirmed by the Applicant’s disclosure. (see, e.g., Specification ¶ 0061 (“Any suitable processors (inclusive of digital signal processors, microprocessors, supporting chipsets, etc.), computer-readable non-transitory memory elements, etc. can be suitably coupled to the board based on particular configuration needs, processing demands, computer designs, etc., for carrying the functions associated with MOG”)). Moreover, the components are used in the expected and customary manner.
With respect to the use of multiplicative factors, Applicant points out that the disclosure recites:
Using appropriate algebraic formulations, the multiplicative factors can cause the parameters to be updated appropriately without having to use if-else statements. By avoiding the use of if-else statements, the control decisions can effectively be pipelined more efficiently with a high degree of parallelism without branching.
(Specification ¶ 0035). In other words, the abstract idea of updating parameters is improved because using “multiplicative factors” as opposed to “if-else statements” increases a throughput, or efficiency, of the abstract idea. However, an improved abstract idea remains an abstract idea.
7. “Applicant submits that the steps of classifying and communicating an output as claimed in claims 1, 5 and 13 provide a practical application of the alleged abstract ideas and/or mathematical concepts in the claims. For example, the output may be used by other processes or components to classify whether a pixel belongs to the foreground or the background and for real-time applications such as processing video data captured by a front-end camera of an automobile for driver assistance, processing video data captured by a camera in industrial vision systems, processing audio data captured by a microphone in a robot or portable device, etc. See, e.g., para. [0005] of the application as published.” (Response at pp. 10-11).
Examiner’s Response:
Examiner respectfully submits that the limitation of “classifying” is a mental process, as set out above in detail. Exemplar claim 1 recites, inter alia:
* * *
classifying in substantially real-time the pixel as being a member of the first subpopulation of pixels or the second subpopulation of pixels based on the first decision variable and the second decision variable;
communicating an output from the digital signal processor indicating whether the pixel is a member of the first subpopulation or the second subpopulation;
* * *
(claim 1, lines 16-18), which can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, is a mental process. (MPEP § 2106.04(a)(2) sub III). The activity of “communicating an output” is a post-processing insignificant extra-solution activity of outputting a result, (MPEP § 2106.04(g)), that does not serve to integrate the abstract idea into a practical application. Also, “communicating an output” is a well-understood, routine, and conventional activity of transmitting data over a network, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea.
In the disclosure, Applicant points to examples of ”practical applications,” such as “whether a pixel belongs to the foreground or the background and for real-time applications such as processing video data captured by a front-end camera of an automobile for driver assistance, processing video data captured by a camera in industrial vision systems, processing audio data captured by a microphone in a robot or portable device, etc.” (Response at p. 11 (citing Specification ¶ 0005)). However, the claim is not so tethered to these uses. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 20 USPQ2d 1057 (Fed. Cir. 1993).
Accordingly, the instant claims are subject-matter ineligible, as set out in detail in the rejections above.
Section 103
8. “Applicant acknowledges that Blackfin teaches a Blackfin processor that includes a dual MAC signal processing engine which is capable of parallel processing, and that Matusek teaches the application of a ‘Mixture of Gaussians’ as taught by Stauffer to a Blackfin processor for input image processing for background motion. The existence and use of a processor that has some particular capability, such as parallel processing, does not indicate that either Matusek or Stauffer implemented that particular capability or more particularly that they implemented that capability to perform the particular steps that Applicant claims. Applicant submits that it was heretofore unknown and not obvious that parallel processing of the claimed updating steps, i.e. during a same clock cycle, in a Mixture of Gaussians process would be particularly advantageous. Thus, Applicant respectfully submits that no combination of Blackfin, Matusek and/or Stauffer teaches or suggests ‘updating, using the hardware computation blocks, a second parameter for the second probability distribution using the second decision variable, during a same clock cycle as the updating of the first parameter’ as claimed.
In other words, although the Office Action asserts that Blackfin teaches ‘[updating .. ] a second parameter .. , during the same clock cycle as updating the first parameter’ ( Office Action, p. 11), Applicant respectfully submits that this merely points out Blackfin's parallel processing capability. Neither Stauffer nor Matsek teach or suggest performing any particular steps of a Method of Gaussians process in parallel. More particularly, no combination of Blackfin, Matusek and/or Stauffer teaches or suggests the parallel processing (during a same clock cycle) of Applicant's updating steps as claimed and described in the specification with reference to FIG. 4, for example. Moreover, because Matusek describes implementing a ‘Mixture of Gaussians’ as taught by Stauffer on a Blackfin processor but does not teach or suggest anything about using the Blackfin processor's capability to perform the claimed updating steps in parallel (during a same clock cycle), Applicant submits that no there is no teaching or suggestion that parallel processing of the claimed updating steps was heretofore contemplated. On the contrary, Applicant submits that the cited combination of Blackfin, Matusek and Stauffer without any teaching of performing the claimed updating steps in parallel, demonstrates that it was not obvious as of the of the effective filing date of the Applicant's invention, without the benefit of improper hindsight in view of Applicant's disclosure, to modify the combination of Blackfin and Matusek in a way that would implement the parallel capability of the Blackfin processor to perform the claimed updating steps in during a claim cycle.” (Response at pp. 12-13).
Examiner’s Response:
Examiner finds Applicant’s arguments and amendments to the claim persuasive, and accordingly, WITHDRAWS the rejection under Section 103.
Conclusion
9. The prior art made of record and not relied upon is considered pertinent to Applicant's disclosure:
(Liu et al., “Hardware Acceleration with Pipelined Adder for Support Vector Machine Classifier,” IEEE (May 2014)) teaches a hardware implementation of Support Vector Machine (SVM) classifier for acceleration has been proposed based on pipelined adder, in which the speedups outperform other existing architectures.
(US Published Application 20040075661 to Yamaguchi et al.) teaches that to improve performance of the graphics LSI, it is effective to not only raise the operation frequency of the LSI, but also to utilize the technique of parallel processing, in which . The technique of parallel processing may be roughly classified as follows. First is a parallel processing method by area division, second is a parallel processing method at a primitive level, and third is a parallel processing method at a pixel level. Classification is based on a particle size of the parallel processing. The particle size of the area division parallel processing is the roughest, and the particle size of the pixel level parallel processing is the finest.
10. Any inquiry concerning this communication or earlier communications from the Examiner should be directed to KEVIN L. SMITH whose telephone number is (571) 272-5964. Normally, the Examiner is available on Monday-Thursday 0730-1730.
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/K.L.S./
Examiner, Art Unit 2122
/KAKALI CHAKI/Supervisory Patent Examiner, Art Unit 2122
1 The claim limitations are numbered for the limited purpose of expressing the subject-matter evaluation of the claims as a whole, and not intended to represent an oversimplification of the claimed subject matter.
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