Prosecution Insights
Last updated: April 19, 2026
Application No. 17/527,545

SHAPE AND DATA FORMAT CONVERSION FOR ACCELERATORS

Final Rejection §101§112
Filed
Nov 16, 2021
Examiner
DUONG, HUY
Art Unit
2182
Tech Center
2100 — Computer Architecture & Software
Assignee
International Business Machines Corporation
OA Round
4 (Final)
68%
Grant Probability
Favorable
5-6
OA Rounds
3y 0m
To Grant
91%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allow Rate
100 granted / 148 resolved
+12.6% vs TC avg
Strong +23% interview lift
Without
With
+23.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
37 currently pending
Career history
185
Total Applications
across all art units

Statute-Specific Performance

§101
34.2%
-5.8% vs TC avg
§103
23.5%
-16.5% vs TC avg
§102
12.3%
-27.7% vs TC avg
§112
26.9%
-13.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 148 resolved cases

Office Action

§101 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment This office action is responsive to amendment filed on 12/22/2025. Claims 1-10 and 12-20 are pending. The amendment have overcome the rejection under 35 U.S.C. 112(b) as set forth in previous office action. However, upon further consideration of the amendment, new ground of rejections have been made under 35 U.S.C. 112(a) and 112(b). Response to Arguments In response to Applicant’s argument regarding rejection under 35 U.S.C. 101 on page 16-17 that the selecting an n-dimension input tensor shape … to minimize memory size is an improvement because conventional input tensor data format conversion approaches do not change the input tensor shape. This optimization is an improvement to a computer technology rather than an improvement to an abstract idea because selecting an optimized input tensor shape leads to a corresponding smaller number of elements in the input tensor data which consequently reduces the storage needs and computing needs of the hardware accelerator.” Examiner respectfully disagrees because any arguably improvements, such as reducing storage needs and computing needs, are a direct consequence of performing the mathematical concept as recited in the claim or described in figure 2. [0002] describes “conventional format conversion techniques can result in increased converted data size and/or require a redundant buffer especially with effects of alignment required for accelerators. Accordingly, there is a need for an improved format conversion technique for accelerators.” Thus, any arguably improvement is a result of performing the format conversion technique or the mathematical algorithm to convert data format to a format that compatible with hardware accelerator. MPEP 2106.05(a) recites “It is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements”. In other words, an improved format conversion technique or a mathematical algorithm that includes the steps of selecting, calculating, converting, and executing to convert data shape and format alone and perform operation on the converted data cannot provide the improvement. Specification The amendment filed 12/22/2025 is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows: [0003] “The method includes receiving input tensor having constants L1 and L2 … by (a) setting a largest divisor of (Xn x Xn-1 x…x X1) that is less or equal to L1 to S1, (b) setting a largest divisor of ((Xn x Xn-1 x…x X1) / S1) that is less or equal to L2 to S2. Also see amended language [0004-0005], [0035-0039]. Such amendment introduces new matter because it changes the scope of the invention as originally file, the steps (a) and (b) of setting largest divisor to S1 and S2 that is less than or equal to L1 and L2, wherein L1 and L2 are originally defined as input tensors, but the amended language redefine L1 and L2 as constants of the input tensors. Accordingly, the amendment introduces new matter into the disclosure by redefining L1 and L2 from input tensors to constants of input tensors since nowhere in the original filed specification describes L1 and L2 as constants of input tensors. see at least figure 2 originally filed and [0035-0039] describes L1 and L2 as input tensors. Applicant is required to cancel the new matter in the reply to this Office Action. The specification is also objected because the amendment of specification filed on 12/22/2025 fails to follow 37 CFR 1.121(b)(2)(ii), wherein the replacement section with markings to show all changes relative to the previous version of the section. However, [0003] of specification filed on 12/22/2025 does not show the changes relative to specification filed on 06/18/2025 (e.g., previous version of the section), rather it shows the changes relative to the original version of the section (e.g., filed on 11/16/2021). The specification is also objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). See the rejection under 35 U.S.C. 112 below. Drawings The drawings were received on 12/22/2025. These drawings are not acceptable since figure 2 is not entered because it contains new matter. Applicant is required to cancel the new matter in figure 2 to obtain entry upon resubmission. Claim Rejections - 35 USC § 112(a) The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. Claim 1-10 and 12-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claims 1, 14, and 20 recites “receiving input tensors, each having constants L1 and L2 … calculating an n-dimension modified shape of the input tensors by (a) setting a largest divisor … that is less or equal to L1 to S1, … (b) setting a largest divisor … that is less or equal to L2 to S2”. The claim contains subject matter that was not described in the original specification because originally specification describes the steps (a) and (b) to set largest divisor that is less or equal to L1 and L2, wherein L1 and L2 are denoted as input tensors L1 and L2, rather than constant L1 and constant L2, see at least original figure 2, [0003-0005] and [0035-0039]. Accordingly, the specification fails to describe L1 and L2 are constants that are used in the steps (a) and (b) to set largest divisor. Dependent claims are also rejected for inheriting the same deficiencies in which claims they depend on. Claim Rejections - 35 USC § 112(b) The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 13 recites “the input tensor is a last input tensor and the input tensor is a second to last input tensor in a sequence of input tensors. it is unclear whether the two recited input tensor is the same input tensor or different input tensors of the antecedently recited input tensors. For examination purposes, Examiner interprets such limitation as one of the input tensors is a last input tensor and one of the input tensors is a second to last input tensor in a sequence of input tensors Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-10 and 12-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract idea without significantly more. Claim 1 recites a computer implemented method for converting data. Under Prong One of Step 2A of the USPTO current eligibility guidance (MPEP 2106), the claim recites a method for converting a shape and a format of tensor data to meet a specific data format comprising: calculating an n-dimension modified shape of the input tensors by (a) setting a largest divisor of (Xn x Xn-1 x Xn-2 x ... x X1) that is less or equal to L1 to S1, S1 being a selected value (b) setting a largest divisor of ((Xn x Xn-1 x Xn-2.x.. x X1) / S1) that is less or equal to L2 to S2, S2 being a selected value (c) setting (((Xn x Xn-1 x Xn-2 x ... x X1) / (S1 x S2)) to S3, and (d) returning the n-dimension modified shape as < S3 x S2 x S1 >; wherein the input tensors, each having constant L1 and L2 and each having a data format of < X x Y x Z >, and each further having an n-dimension input tensor shape as < Xn x Xn-1 x Xn-2 x ... x X1 >; changing the n-dimension input tensor shape of the input tensors to the n-dimension modified shape to obtain shape modified input tensors; converting a data format of the shape modified input tensors from <X x Y x Z> to < X x (Y ceildiv D) x (Z ceildiv D) x D x D >) to obtain format and shape converted input tensors having the specific data format, where D is a constant value of a last dimension Z of the input tensors, and executing target operations on the format and shape converted input tensors to obtain result tensors. Such limitations cover mathematical calculations, relationship, and/or formula (e.g., calculating an n-dimension modified shape by performing steps a-d, changing and converting data format and perform target element-wise operations to obtain result as recited in the claims or steps illustrated in figures 2-4 [0035-0053]). The claim further recites the step of selecting the n-dimension input tensor shape, such limitation under broadest reasonable interpretation covers the performance of human mind, in which one of ordinary skill in the art can select a best shape for the input tensor. Therefore, the claim includes limitations that fall within the “Mathematical Concepts / Mental Processing” groupings of abstract ideas. Accordingly, the claim recites an abstract idea. Under Prong Two of Step 2A, this judicial exception is not integrated into a practical application. The claim recites the additional elements a computer-implemented method, a hardware accelerator, a compiler. However, these elements are recited at a high level of generality, i.e., as computer components performing computer functions of processing data. Accordingly, such additional elements fail to provide a meaningful limitation on the claim invention, and amount to no more than mere instructions to apply the exception using computer elements. The claim additionally recites steps of receiving input tensors and storing the n-dimension input tensor shape. However, such steps are recited at a high level of generality and at most considered as insignificant extra solution activity because such steps amount to mere data gathering (see MPEP 2106.05(g)). The claim further recites the input tensors being incompatible with the input requirements of the hardware accelerator and S1 and S2 are selected so that input tensors are compatible with the hardware accelerator and converting data format to enable use of the hardware accelerator, such limitation merely recite a result of performing calculating an n-dimension modified shape to generate result that is compatible with the hardware accelerator and converting data. Furthermore, the claim recites to minimize memory size during execution on the hardware accelerator, such limitation is recited as mere result of performing the abstract idea. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. Thus, the claim is directed to an abstract idea. Under Step 2B, as discussed with respect to Prong Two of Step 2A, the additional elements in the claim amount no more than mere instructions to apply the exception using a generic component. The same conclusion is reached in step 2B, i.e., mere instruction to apply an exception on a computer element cannot integrate a judicial exception into a practical application at step 2A or provide an inventive concept that is furnished by an element or combination of elements that is recited in the claim in addition to (beyond) the judicial exception. The step of receiving data and storing data are considered to be insignificant extra-solution activity in step 2A, and are determined to be well-understood, routine, conventional activity in the field. Court decisions cited in MPEP 2106.05(d)(II) section (i), indicate that mere receiving or transmitting data over a network, and (iv) storing data are well-understood, routing, conventional function when they are claimed in a merely generic manner. Thus, the additional element fails to ensure the claim as a whole amount to significantly more than the judicial exception itself. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101. Claim 2 further recites converting the result tensors from < X x (Y ceildiv D) x (Z ceildiv D) x D x D >) to <X x Y x Z> to obtain format converted result tensors; and recovering the stored n-dimension input tensor shape for the format converted result tensors to obtain original shaped format converted result tensors. Such limitations cover mathematical calculations, relationship, and/or formula (converting the converted data back to the original format for further processing). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101. Claims 3-4 further recites the format converted result tensors have a format compatible with a central processing unit and incompatible with the hardware accelerator, and processing, by the central processing unit, the format converted result tensors. Such limitation merely describes the format of the converted result tensors to have a specific format and process the format converted result tensors, which covers the mathematical calculations, relationship, and/or formula under step 2A prong one. The claim further recites a central processing unit and the hardware accelerator. However, such additional elements are recited at a high level of generality, e.g., computer components performing computer function of processing data having a compatible format. Thus, such additional elements fail to provide a meaningful limitation on the claim invention, and amount to no more than mere instructions to apply the exception using computer elements. Accordingly, The claims do not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claims are not patent-eligible under 35 U.S.C. 101. Claim 5 further recites wherein said converting step converts the data format to have a same number of constituent elements. Such limitations cover mathematical calculations, relationship, and/or formula (converting data to have a same number of elements). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101 Claims 6-8 further recites wherein the hardware accelerator is a graphics processing unit, or the hardware accelerator is comprised in a central processing unit, or the hardware accelerator is a tensor processing unit. Such additional elements are recited at a high level of generality, i.e., as a computer component performing a computer function of processing data. thus, such additional elements fail to provide a meaningful limitation on the claim invention, and amount to no more than mere instructions to apply the exception using computer elements. Therefore, the claims do not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claims are not patent-eligible under 35 U.S.C. 101. Claims 9 and 13 further recites wherein the last input tensor and the second to last input tensor is comprised in a sequence of tensors or wherein the input tensor is a last input tensor and the input tensor is a second to last input tensor in a sequence of input tensors. Such limitations cover mathematical calculations, relationship, and/or formula, such as describing the input tensors are in sequence. The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101. Claim 10 further recites a number of data elements in each of the input tensors and each of the result tensors are equal. Such limitations cover mathematical calculations, relationship, and/or formula, such as describing number of elements input data and output data are equal. The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101. Claim 12 further recites the hardware accelerator is constrained to only handle constant size arrays. Such additional element is recited at a high level of generality, e.g., computer components performing computer functions and the component would have constrained to handle certain data size. Thus, such additional element fails to provide a meaningful limitation on the claim invention, and amounts to no more than mere instructions to apply the exception using computer element, and also fails to integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101. Claims 14-19 recite product claims having similar limitations as the method claims 1-6. Thus, they are rejected for the same reasons. Claim 14 further recites a computer program product, the computer program product comprising a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions executable by a computer to cause the computer to perform a method, the claim further recites a central processing unit (CPU). However, such additional elements are recited at a high level of generality, e.g., computer components performing computer functions of storing and executing program instructions to perform mathematical operations. Thus, such additional elements fail to provide a meaningful limitation on the claim invention, and amount to no more than mere instructions to apply the exception using computer element. Therefore; The claim does not recite additional elements that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101. Claim 20 recites an apparatus claim that would practice the method claim 1. Thus, it is rejected for the same reasons. Claim 20 further recites a computer processing system, comprising: a memory device for storing program code; a central processing unit operatively coupled to the memory device for running the program code; and a hardware accelerator operatively coupled to the memory device and the central processing unit. However, such additional elements are recited at a high level of generality, e.g., computer components performing computer functions of storing and executing program instructions to perform mathematical operations. Thus, such additional elements fail to provide a meaningful limitation on the claim invention, and amount to no more than mere instructions to apply the exception using computer element. Therefore; The claim does not recite additional elements that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUY DUONG whose telephone number is (571)272-2764. The examiner can normally be reached Mon-Friday 7:30-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Caldwell can be reached on (571) 272-3702. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HUY DUONG/Examiner, Art Unit 2182 (571)272-2764 /ANDREW CALDWELL/Supervisory Patent Examiner, Art Unit 2182
Read full office action

Prosecution Timeline

Nov 16, 2021
Application Filed
Feb 07, 2024
Response after Non-Final Action
Mar 15, 2025
Non-Final Rejection — §101, §112
Jun 04, 2025
Interview Requested
Jun 10, 2025
Applicant Interview (Telephonic)
Jun 10, 2025
Examiner Interview Summary
Jun 18, 2025
Response Filed
Jun 27, 2025
Final Rejection — §101, §112
Aug 19, 2025
Interview Requested
Sep 03, 2025
Response after Non-Final Action
Sep 18, 2025
Request for Continued Examination
Sep 24, 2025
Response after Non-Final Action
Sep 29, 2025
Non-Final Rejection — §101, §112
Dec 03, 2025
Interview Requested
Dec 10, 2025
Examiner Interview Summary
Dec 10, 2025
Applicant Interview (Telephonic)
Dec 22, 2025
Response Filed
Feb 18, 2026
Final Rejection — §101, §112
Mar 16, 2026
Interview Requested
Mar 23, 2026
Applicant Interview (Telephonic)
Mar 23, 2026
Examiner Interview Summary

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Prosecution Projections

5-6
Expected OA Rounds
68%
Grant Probability
91%
With Interview (+23.0%)
3y 0m
Median Time to Grant
High
PTA Risk
Based on 148 resolved cases by this examiner. Grant probability derived from career allow rate.

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