Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 12/26/2025 have been fully considered but they are not persuasive.
The applicant argues that in one of the states of the switching fabric taught by Iniguez, it cannot receive audio data or any other data. They further elaborate by stating that when the switching fabric is in a second state, i.e., when it is not connected, the co-processors are cut off from the task pool and hence cannot obtain any data. The examiner respectfully disagrees.
First, the claims simply state that the switch has two “states,” which is a very broad term. A “state” could refer to many different things. The applicant appears to take a very narrow view of this term when referring to Iniguez by stating that the two states are either “connected” or “not connected.” Although, the previous office action also stated that the term “states” could be interpreted that way, it was referring to the connections between the co-processors, as seen in Par. 54 of Iniguez, and/or when a co-processor is specifically interacting (connecting) with the task pool to obtain audio data. As noted below, as well in the rejections provided in this office action, the co-processors taught by Iniguez can interact with the task pool to perform many tasks, some with regard to audio data, and some with no regard to audio data. Regardless, further clarification of how Iniguez teaches these “states” of the switch is described below.
Fig. 1, element 14, and pars. 8, 11, 12, 24 of Iniguez teach of a crossbar switch/switching fabric that can have at least two states, such as allowing one co-processor to interact with the task pool independently (first state), or allowing multiple co-processors to interact with the task pool collaboratively (second state). For example, par. 24 teaches that the co-processors may communicate with the task pool through the switch (if each co-processor is performing an independent task), or the co-processors may communicate with each other through the switch (if performing a task collaboratively). The fact that the switch can allow the co-processors to directly access the task pool to perform a task without communicating with other co-processors, while in another instance, allow the co-processors to communicate with one another while interacting with the task pool, would clearly describe two states of the switch. That is, in one state the switch is not “connecting” the co-processors to communicate with one another, and in another state, they are able to communicate with one another. This is abundantly clear in par. 54. Further, the fact that the co-processors (cells) could be connected physically to the switch or wirelessly would also describe two states.
Claim Objections
Claims 1, 9 and 17 are objected to because of the following informalities:
In claim 1, line 19, “sate” should be “state”.
In claim 9, line 22, “sate” should be “state”.
In claim 17, line 21, “sate” should be “state”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5 and 7-21 are rejected under 35 U.S.C. 103 as being unpatentable over Iniguez (2014/0337850) in view of Udell et al. (2007/0094561) and Popovic et al. (2015/029358).
With regard to claim 1, Iniguez teaches a processor (Fig. 1; par. 24 – distributed processing system 10) comprising:
a first processing unit, a second processing unit, and a third processing unit (Fig. 1 -elements 12A-12N; par. 24 – one or more co-processing cells 12A-12N can be the first processing unit, second processing unit, and third processing unit and so on.; par. 39)
wherein: the first processing unit is configured to: obtain data transmitted to the processor, analyze the data to determine a type of the data, and allocate the obtained data to the determined processing unit (Par. 8 – the CPU and various co-processors/processing units can communicate with each other via the task pool, and they know which is executing what. For instance, a first co-processor/first processing unit can determine which co-processor/processing unit is executing a task of capturing temperature readings (task A) so that it can communicate with it to perform its own task of computing an average temperature (task B). Par. 38 – “During a poll phase each cell periodically sends an agent to the task pool until a matching task is found.” Therefore, when a task match is found, the task pool transmits an acknowledgement to the cell, where the cell begins to execute the task. Par. 39 – the system may include multiple cells/processing unit and each cell only performs tasks of a certain type (e.g. first cell performs tasks of the first type). Thus, cell/ first processing unit can obtain the data transmitted to the processor, analyze the data to determine a type of tasks/data, and allocate the obtained task/data to the determined processing unit);
and the third processing unit is configured to perform a feature extraction algorithm on the data (Par. 10 – processing unit/cell can read compressed audio data. Par. 22 – processing unit/cell can execute complex programs and algorithms including audio processing, which includes feature extraction);
a storage unit configured to store at least data processing algorithms performed by the first processing unit, the second processing unit, and the third processing unit (Fig.1 – element 15; par. 33 – “The memory units 15 contain the data to be processed as well as the location to place the results of the processed data.” Thus, memory/storage unit can store any data to be processed and that includes data algorithms performed by the first, second, or third processing unit);
and a switch having at least two states (Fig. 1, element 14; pars. 8, 11, 12, 24 – crossbar switch/switching fabric can have at least two states, such as allowing one co-processor to interact with the task pool independently (first state), or allowing multiple co-processors to interact with the task pool collaboratively (second state). For example, par. 24 teaches that the co-processors may communicate with the task pool through the switch (if each co-processor is performing an independent task), or the co-processors may communicate with each other through the switch (if performing a task collaboratively). The fact that the switch can allow the co-processors to directly access the task pool to perform a task without communicating with other co-processors, while in another instance, allow the co-processors to communicate with one another while interacting with the task pool would clearly describe two states of the switch. That is, in one state the switch is not “connecting” the co-processors to communicate with one another, and in another state, they are able to communicate with one another. This is abundantly clear in par. 54. Further, the fact that the co-processors (cells) could be connected physically to the switch or wirelessly would also describe two states), wherein:
in response to the switch being in a first state, the first processing unit obtains data (Par. 8 – a co-processor can interact with a task pool through the switch to performing any task available);
and in response to the switch being in a second state, the first processing unit obtains data not including audio data (Pars. 8, 12, 22 – a co-processor processor can interact with a task pool through the switch to performing any task available, where those tasks could have nothing to do with audio date, such as graphics, video, mathematical processing, etc.).
Iniguez does not specifically teach that a second processing unit is configured to execute a neural network algorithm.
However, Iniguez does teach that the processing units can execute complex programs and algorithms (Par. 22), and further teaches that the tasks could include artificial intelligence processer (Par. 42).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention that the processing units described in Iniguez could indeed process neural network algorithms since it clearly states that nothing precludes the CPU from implementing adaptive task management, including artificial intelligence processes (Par. 42).
Iniguez also does not explicitly teach where the first processing unit is configured to determine which of the first, second and third processing unit is able to process the obtained data.
Udell teaches wherein a first processing unit is configured to determine, based on the type of the data, which processing unit of the first processing unit, the second processing unit, or the third processing unit is able to process the obtained data (Fig. 1, par. 51) – the controlling processor/first processing unit controls the allocation of the components to be executed on controlled processors (second or third processing units), and also the controlling processor/first processing unit can assign itself the task of performing some algorithms. Par. 106 – “one or more controlled processor may terminate or can otherwise become unresponsive for various reasons. Tasks allocated to such processors can be reassigned to other controlled processors or the controlling processor may itself take on the tasks.” Thus, if controlled processors (it could be the second and/or third processing units) are unable to process the task/data, the task/data can be reassigned to other controlled processor or the controlling processor/first processing unit may itself take on the task.)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to have modified Iniguez by incorporating the teaching of Udell so that to include where the first processing unit is configured to determine which of the first, second and third processing unit is able to process the obtained data. Doing so would allow the system to reduce the processing time (Udell, par. 13).
Iniguez in view of Udell does not teach a system control unit configured to control power supply information of each of the first processing unit, the second processing unit, and the third processing unit.
Popovic et al. teaches a system control unit configured to control power supply information of each of the first processing unit, the second processing unit, and the third processing unit (Par. 43 – power management control tier (PMCT) manages power supply information of processor unit which include first, second, and third processing unit.)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to have modified Iniguez in view of Udell by incorporating the teaching of Popovic to include a system control unit configured to control power supply information of each of the first processing unit, the second processing unit, and the third processing unit. Doing so would allow the system to power on only the needed processing units at the right time and power off the idle processing units. Also, Popovic et al. teaches that this would conserve energy in pars. 5, 7.
With regard to claim 2, Iniguez in view of Udell and in view of Popovic et al. teaches the processor according to claim 1. Iniguez further teaches wherein: the storage unit is further configured to store data detected by at least one sensor (Pars. 3, 33 – memory/storage unit can store data detected by smart meters/sensor data.);
and the data transmitted to the processor includes the data detected by the at least one sensor and stored in the storage unit (Pars. 3, 33 – the data transmitted to the processor includes sensor data.)
With regard to claim 3, Iniguez in view of Udell and in view of Popovic et al. teaches the processor according to claim 1. Iniguez further teaches wherein: the storage unit is further configured to store a processing result obtained by the first processing unit, the second processing unit, or the third processing unit after processing the data (Par. 33 – “The memory units 15 contain the data to be processed as well as the location to place the results of the processed data.”; Par. 43 – the descriptor shows where processed result obtained by processing units should go in memory.; Par. 52 – the processed data are placed in memory/storage unit. Thus, the processing results obtained by the processing units are stored in the storage /memory.)
With regard to claim 4, Iniguez in view of Udell and in view of Popovic et al. teaches the processor according to claim 3. Iniguez further teaches wherein: the first processing unit is further configured to store the processing result to the storage unit, and send a notification message that the processing result is stored in the storage unit to a central processing unit (CPU) (Fig. 6, par. 7 – “Each co-processor notifies the task pool upon completion of a task, and pings the task pool until another task becomes available for processing. In this way, the CPU communicates directly with the task pool, and communicates indirectly with the co-processors through the task pool.”; Pars. 42-43, 52, 60 – the processing result is stored in storage unit and the task descriptor specifies where the processed results are placed. Also, once the processing unit completes the task, it notifies the task pool to mark the status as completed and task pool notifies the CPU that the task is completed. Thus, the processing unit notifies the CPU indirectly. The CPU knows where the processing unit stored the result, and when it receives “the task is done notification” from task pool, then the CPU can assume the storage unit has the processing result.)
and the storage unit is further configured to send the stored processing result to the CPU according to a call command of the CPU (Pars. 7, 24 – The CPU can communicate with the task pool directly or through the switching fabric, and the storage unit contains the data which includes the processing result and/or instructions that will be compiled by the CPU.; Par. 42 – the CPU can retrieve and execute a task from the task pool, and “nothing precludes the CPU 11 from implementing adaptive task management.” Therefore, the CPU can call for a result at any time and retrieve it from the storage unit.)
With regard to claim 5, Iniguez in view of Udell and in view of Popovic et al. teach the processor according to claim 1, wherein: in response to the switch being in the first state, the first processing unit obtains the data including the audio data, such that the processor performs an ultrasonic detection on a part of the audio data (Pars.10, 22, 24, 35, 54 – a co-processor can interact with a task pool through the switch to performing any task available, such as if the program corresponds to a media player, then the data may be compressed audio data which is read by the co-processor, which includes ultrasonic detection on the audio data obtained.).
With regard to claim 7, Iniguez in view of Udell and in view of Popovic et al. teaches the processor according to claim 1. Iniguez further teaches wherein the data includes data of an external device obtained via a positive and negative plug interface (Par. 22 – “execution of internal or external software programs”; Par. 53 – the system/ processor can connect to external device and exchange data via wired or wireless interface like USB (positive and negative plug interface) or Bluetooth.; Therefore, since the system can exchange data with external device, then the data stored in storage unit can include data of an external device obtained via USB/positive and negative plug interface.)
Although Iniguez teaches the processing unit and CPU can exchange data with external devices in pars. 22 and 53, Iniguez does not explicitly teach the first processing unit obtains data of the external device through first transmission channel and CPU obtains second data of the external device through second transmission channel.
Popovic et al. teaches wherein the first processing unit is connected to the positive and negative plug interface, such that the positive and negative plug interface has: a first transmission channel through which the first processing unit obtains first data of the external device (Figs. 2-3, pars. 39, 42 – processing unit/PRT has dedicated transmission channel/network interface controller (NIC 31) different from the CPU to communicate and obtain data from outside network or external device. Thus, the first processing unit can obtain the external device data through network interface controller (NIC 31)/first transmission channel.);
and a second transmission channel through which a central processing unit (CPU) obtains second data of the external device (Fig. 1, par. 38 – the CPU/front-end processing tier (FPT) can communicate with outside network or external device and exchange data using dedicated NIC 11/second transmission channel).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to have modified Iniguez in view of Udell by incorporating the teaching of Popovic to let the first processing unit obtains data of the external device through first transmission channel and CPU obtains second data of the external device through second transmission channel. Doing so would allow the first processing unit and the CPU obtain data from the external device simultaneously and do not have to share the transmission channel. Moreover, it would help reduce the waiting or response time.
With regard to claim 8, Iniguez in view of Udell and in view of Popovic et al. teaches the processor according to claim 7.
Iniguez does not explicitly the first processing unit to output a control command according to the first data of the external device and the control command is sent to the external device through the first transmission channel, to cause the external device to adjust according to the control command.
Popovic et al. teaches wherein: the first processing unit is further configured to output a control command according to the first data of the external device (Figs. 2-3, pars. 39, 42 – first processing unit/PRT can communicate or exchange data with external device via top of rock (TOP) NIC, and the data transmission result from PRT/processing unit can include a control command. Therefore, the first processing unit can output a control command based on the first data of the external device.); and the control command is sent to the external device through the first transmission channel, to cause the external device to adjust according to the control command (Figs. 2-3 and 10, pars. 42, 67 – the processing unit can output data/control commands, and it can send these data through NIC 31. From there, the control command can be transmitted over network to the external device. The external device can receive the data or control commands and adjust based on that.)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to have modified Iniguez in view of Udell by incorporating the teaching of Popovic to let the first processing unit to output a control command according to the first data of the external device, and the control command is sent to the external device through the first transmission channel, to cause the external device to adjust according to the control command. Doing so would allow the external device to filter out corrupt data or invalid data based on the control command of the processing unit.
With regard to claim 21, Iniguez in view of Udell and in view of Popovic et al. teach the processor according to claim 1.
Iniguez does not explicitly teach where the first processing unit is configured to send the obtained data to one of the second or third processing unit when the first processing unit determines that the obtained data is able to be processed by the second or third processing unit and process the obtained data when the obtained data is unable to be processed by either second or third processing unit.
Udell teaches wherein the first processing unit is configured to:
send the obtained data to the corresponding one of the second processing unit or the third processing unit to process, when the first processing unit determines that the obtained data is able to be processed by the second processing unit or the third processing unit (Fig. 1, par. 51 – the controlling processor/first processing unit controls the allocation of the components to be executed on controlled processors(second or third processing unit). Thus, the controlling processor/first processing unit can send the obtained data to second or third processing unit/controlled processor after determining that the obtained data can be processed by the second or third processing unit.);
and process the obtained data, when the first processing unit determines that the obtained data is unable to be processed by either the second processing unit or the third processing unit (Fig. 1, par. 51 – the first processing unit/controlling processor can assign itself the task of performing some algorithms.; Par. 106 – “one or more controlled processor may terminate or can otherwise become unresponsive for various reasons. Tasks allocated to such processors can be reassigned to other controlled processors or the controlling processor may itself take on the tasks” Thus, if controlled processors (it could be second and/or third processing unit) are unable to process the task/data, the task/data can be reassigned to other controlled processor or the controlling processor/first processing unit may itself take on the task).
With regard to claims 9-16, the claims recite a method with corresponding limitations of claims 1-5 and 7-8, respectively, and are therefore rejected on the same premises.
With regard to claims 17-20, the claims recite an electronic device (Iniguez, Fig. 1, or par. 3 – internet of things) comprising: a sensor configured to detect data (Iniguez, par. 23 – smart meters/sensor)…with corresponding limitations of claims 1-4.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SCOTT T BADERMAN whose telephone number is (571) 272-3644. The examiner can normally be reached 6:00AM - 3:00PM M-Th., every other Friday off.
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/SCOTT T BADERMAN/Supervisory Patent Examiner, Art Unit 2118
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