DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Inventorship
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Response to Amendment
Applicant's Amendment filed 2/10/2026 has been fully considered and entered.
Claims 30 and 39-46 are drawn to a non-elected species, are hereby withdrawn, and will not be examined. Accordingly, claims 1, 3, 11-15, 17, 28, and 36-38 are examined. Applicant is reminded of Applicant’s election of Species A, sub-species a-1, and sub-species b-1, which is directed to GC-to-GC communication, the PIC does not overhang past an outer edge of the substrate, and the PIC is coupled to a lens. Applicant’s summary of the interview dated 2/10/2026 failed to acknowledge that proposed amendments of claims 1, 17, and 30 were directed to non-elected species (particularly, regarding the overhang). The examiner notes that the proposed amendment for claim 30 was submitted and stands unexamined (including dependents) since Applicant was made aware of the non-elected species present in claim 30 during the interview.
The rejection under 35 U.S.C. 112(b) set forth in the Office action mailed 11/19/2025 is withdrawn in view of Applicant’s Amendment.
Response to Arguments
Applicant’s arguments with respect to the claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Objections
Claim 17 is objected to because of the following informalities:
Claim 17, line 6: "ove" should instead state "over".
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 11, and 36-38 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Watts et al. in US 20190243081 A1 (hereinafter "Watts").
Regarding claim 1, Watts discloses a laser package, comprising:
a substrate having a substrate surface and further having a cavity that extends into the substrate surface (the substrate is interpreted as the combination of the PCB/Package and the Glass Wafer shown in Fig. 2 and 14; the cavity is interpreted as the space where the Photonics SOI exists, see also Fig. 2 and 14);
a photonic integrated circuit (PIC), wherein a first surface of the PIC is attached to a bottom of the cavity (Photonics SOI is interpreted as the PIC, see Fig. 2 and 14; see Para. 26-27 and Fig. 4, “wafer-level bonding”);
laser circuitry attached to a second surface of the PIC, wherein the second surface of the PIC is opposite the first surface (laser module 170 is interpreted as laser circuitry; see Para. 35 and Fig. 9 for attachment); and
a heat spreader, wherein the heat spreader is closer to the laser circuitry than to the PIC (heatsink 204 is interpreted as the heat spreader; see Fig. 2 and 14 where heatsink 204 is closer to laser 170 than to the Photonics SOI).
Regarding claim 11, Watts discloses an electronic device, comprising:
a substrate having a substrate surface and defining a cavity that extends into the substrate surface (the substrate is interpreted as the combination of the PCB/Package and the Glass Wafer shown in Fig. 2 and 14; the cavity is interpreted as the space where the Photonics SOI exists, see also Fig. 2 and 14);
a photonic integrated circuit (PIC), wherein a first surface of the PIC is attached to the substrate within the cavity (Photonics SOI is interpreted as the PIC, see Fig. 2 and 14; see Para. 26-27 and Fig. 4, “wafer-level bonding”);
laser circuitry, having a first laser circuitry surface and a second laser circuitry surface, wherein the first laser circuitry surface is vertically stacked over and attached to a first portion of a second surface of the PIC, the second surface of the PIC is opposite the first surface of the PIC, and the second laser circuitry surface is opposite the first laser circuitry surface (laser module 170 is interpreted as laser circuitry; see Para. 35 and Fig. 9 for attachment; the surface of the laser touching Photonics SOI is interpreted as the first laser circuitry surface; the surface of the laser touching/facing the heatsink is interpreted as the second laser circuitry surface; the portion of the Photonics SOI touching/facing the laser is interpreted as the second surface of the PIC; the portion of the Photonics SOI not touching/facing the laser is interpreted as the first surface of the Photonics SOI; see Fig. 2 and 14);
an integrated circuit having a portion vertically stacked over and attached to a second portion of the second surface of the PIC (CMOS Die is interpreted as the integrated circuit, note Para. 37; see Fig. 2 and 14 which show vertical stacking above the Photonics SOI and attachment via some backmetal contacts and copper pillars, note Para. 36); and
a heat spreader above the second laser circuitry surface, wherein a distance between the heat spreader and the laser circuitry is smaller than a distance between the heat spreader and the PIC (heatsink 204 is interpreted as the heat spreader; see Fig. 2 and 14 where heatsink 204 is closer, and thus necessarily having a shorter distance, to laser 170 than to the Photonics SOI).
Regarding claim 36, Watts discloses the electronic device of claim 11, wherein a distance between the heat spreader and the integrated circuit is smaller than a distance between the heat spreader and the PIC (heatsink 204 is interpreted as the heat spreader; see Fig. 2 and 14 where heatsink 204 has a shorter distance to CMOS Die than to the Photonics SOI).
Regarding claims 37 and 38, Watts discloses the electronic device of claim 36 and 11 respectively, wherein:
a footprint of the PIC is within a footprint of the heat spreader, and
a footprint of the integrated circuit is within the footprint of the heat spreader (see Fig. 2 and 14 where the heatsink has horizontal overlap with the laser and CMOS die in the views shown; these overlaps are interpreted as the overlapping footprints).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Watts et al. in US 20190243081 A1 (hereinafter "Watts") as applied above, and in view of Mahgerefteh et al. in US 20170179680 (hereinafter "Mahgerefteh").
Regarding claim 3, Watts discloses the laser package of claim 1, but fails to teach:
wherein the second surface of the PIC includes a first grating coupler (GC) and the laser circuitry includes a second GC at a surface of the laser circuitry that is closest to the PIC.
Mahgerefteh teaches a similar device (see Para. 60-65):
wherein the second surface of the PIC (the surface of Si PIC 104 including second surface grating 108) includes a first grating coupler (GC) (second surface grating 108 is interpreted as a grating coupler; see Fig. 1) and the laser circuitry (laser 102) includes a second GC (first surface grating 106 is interpreted as a grating coupler) at a surface of the laser circuitry that is closest to the PIC (the surface of 102 containing 106 facing 104; the surface is interpreted as being the closest since there is no intervening structure between the gratings; see Fig. 1).
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the grating-to-grating system of Mahgerefteh in the package of Watts for the purpose of increasing the alignment tolerance thereby achieving a device that can be assembled passively thus saving manufacturing time.
Regarding claim 15, Watts discloses the electronic device of claim 11, but fails to teach:
wherein the second surface of the PIC includes a first grating coupler (GC), and the first laser circuitry surface includes a second GC.
Mahgerefteh teaches a similar device (see Para. 60-65):
wherein the second surface of the PIC (the surface of Si PIC 104 including second surface grating 108) includes a first grating coupler (GC) (second surface grating 108 is interpreted as a grating coupler; see Fig. 1), and the first laser circuitry surface includes a second GC (the first laser circuitry surface is interpreted as the surface of laser 102 containing 106 facing 104; the surface is interpreted as being the closest since there is no intervening structure between the gratings; see Fig. 1).
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the grating-to-grating system of Mahgerefteh in the package of Watts for the purpose of increasing the alignment tolerance thereby achieving a device that can be assembled passively thus saving manufacturing time.
Claim(s) 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Watts et al. in US 20190243081 A1 (hereinafter "Watts") as applied above, and in view of Bettman et al. in US 20200144151 A1 (hereinafter "Bettman").
Regarding claim 12, Watts discloses the electronic device of claim 11, but fails to teach:
further comprising a pedestal vertically stacked between and attached to the heat spreader and the second laser circuitry surface.
Bettman teaches using a pedestal to adjust heights relative to heat spreaders within a similar device.
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the pedestal of Bettman in the package of Watts for the purpose of adjusting the device to handle height mismatches and/or a variety of laser and/or IC heights thereby achieving an even platform for the heatsink thereby increasing stability and potential component diversity. (The examiner notes that modifying the thermal design by adjusting spacing of components is well-known; see, for example, US 20220107229 A1, Para. 2 and 12)
Regarding claim 13, Watts/Bettman discloses the electronic device of claim 12, suggests, but fails to explicitly teach, further comprising a thermal interface material vertically stacked between the second laser circuitry surface and the pedestal. Watts, Para. 39 teaches “a thermal paste or other thermally conducting compound”, which is interpreted as thermal interface material, between the laser and heatsink. A person having ordinary skill in the art would have found it obvious before the time of filing to provide the interpreted thermal interface material between the pedestal and the laser in the device of Watts/Bettman for the purpose of increasing overall thermal flow to the heatsink thereby achieving increased heat dissipation and which is especially beneficial in heat-sensitive applications.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Watts et al. in US 20190243081 A1 (hereinafter "Watts") as applied above, and in view of Meade et al. in US 20190271819 A1 (hereinafter "Meade").
Regarding claim 14, Watts discloses the electronic device of claim 11, further comprising a thermal interface material (Para. 39 states “a thermal paste or other thermally conducting compound”, which is interpreted as thermal interface material, between the laser and heatsink), but fails to teach:
a thermo-electric cooler, wherein the thermo-electric cooler is vertically stacked between the thermal interface material and a portion of the heat spreader.
wherein the thermal interface material is vertically stacked between the second laser circuitry surface and the thermo-electric cooler.
Meade teaches thermo-electric coolers (TEC 3000) as a means of dissipating heat from a laser to a heat sink (see Fig. 9 and Para. 31; laser is 1230).
Taken together, Watts/Meade suggest a device comprising:
a thermo-electric cooler, wherein the thermo-electric cooler is vertically stacked between the thermal interface material and a portion of the heat spreader.
wherein the thermal interface material is vertically stacked between the second laser circuitry surface and the thermo-electric cooler, since Meade places the TEC between the laser and the heat sink, and since Watts suggests using a thermal interface material between components.
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the TEC of Meade in the laser package of Watts for the purpose of more efficiently removing heat generated by the laser thereby achieving increased temperature control near heat-sensitive and/or heat-generating components.
Additionally, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the placed the thermal interface material between any components, as suggested by Watts, including a laser and a TEC as well as a TEC and a heat spreader in the laser package of Watts/Meade for the purpose of more efficiently moving unwanted laser-generated heat to the TEC and heat spreader thereby achieving reduced temperatures near heat-sensitive and/or heat-generating components.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Watts et al. in US 20190243081 A1 (hereinafter "Watts") as applied above, and in view of Bulumulla et al. in US 20200166704 A1 (hereinafter "Bulumulla").
Regarding claim 17, Watts discloses a method for assembling a laser package, the method comprising:
attaching laser circuitry to a second surface of the PIC, wherein the second surface of the PIC is opposite the first surface of the PIC (laser module 170 is interpreted as laser circuitry; see Para. 35 and Fig. 9 for attachment; the second surface of the PIC is interpreted as the surface of the Photonics SOI closest to the laser; the first surface of the PIC is interpreted as the surface of the Photonics SOI closest to the Glass Wafer; see Fig. 2 and 14); and
providing a heat spreader over the laser circuitry, wherein a distance between the heat spreader and the laser circuitry is smaller than a distance between the heat spreader and the PIC (heatsink 204 is interpreted as the heat spreader; see Fig. 2 and 14 where heatsink 204 is closer to laser 170 than to the Photonics SOI and thus necessarily has a smaller distance to the laser than to the Photonics SOI).
Watts suggests loosening alignment requirements by attaching the interpreted PIC to the interpreted substrate before forming the cavity around the PIC and thus fails to explicitly teach:
positioning a first surface of a photonic integrated circuit (PIC) within a cavity in a substrate, wherein the cavity extends from a front surface of the substrate into the substrate.
Bulumulla teaches that PIC may be positioned into already formed cavities, such as:
positioning a first surface of a photonic integrated circuit (PIC) within a cavity in a substrate, wherein the cavity extends from a front surface of the substrate into the substrate (see claim 20 and Fig. 1Q);
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have positioned the PIC into a cavity as taught by Bulumulla in the laser package of Watts for the purpose of avoiding dicing after attachment thereby preventing debris accumulation near or on sensitive components.
The examiner notes that the claim does not require a specific order of the performance of the steps, only that the steps be performed. See MPEP 2111.01(II).
Claim(s) 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Watts et al. in US 20190243081 A1 (hereinafter "Watts") in view of Bulumulla et al. in US 20200166704 A1 (hereinafter "Bulumulla") as applied above, and in view of Meade et al. in US 20190271819 A1 (hereinafter "Meade").
Regarding claim 28, Watts/Bulumulla discloses the method of claim 17, wherein:
the laser circuitry has a first laser circuitry surface and a second laser circuitry surface (the first laser circuitry surface is interpreted as the surface of laser module 170 closest to the Photonics SOI; the second laser circuitry surface is interpreted as the surface closest to the heatsink; see Fig. 2 and 14),
the second laser circuitry surface is opposite the first laser circuitry surface (see Fig. 2 and 14),
attaching the laser circuitry to the second surface of the PIC includes attaching the first laser circuitry surface to the second surface of the PIC (laser module 170 is interpreted as laser circuitry; see Para. 35 and Fig. 9 for attachment; the second surface of the PIC is interpreted as the surface of the Photonics SOI closest to the laser; the first surface of the PIC is interpreted as the surface of the Photonics SOI closest to the Glass Wafer; see Fig. 2 and 14), but fails to teach that:
the method further comprises:
providing a thermo-electric cooler over the second laser circuitry surface.
Meade teaches thermo-electric coolers (TEC 3000) as a means of dissipating heat from a laser to a heat sink (see Fig. 9 and Para. 31; laser is 1230) and is thus interpreted as (when incorporated with Watts) teaching:
providing a thermo-electric cooler over the second laser circuitry surface.
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the TEC of Meade in the laser package of Watts/Bulumulla for the purpose of more efficiently removing heat generated by the laser thereby achieving increased temperature control near heat-sensitive and/or heat-generating components.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
This prior art, made of record, but not relied upon, is considered pertinent to applicant’s disclosure since the following references have similar structure and/or use similar structure and/or similar optical elements to what is disclosed and/or claimed in the instant application:
US 20200310027 A1
US 20190341359 A1
US 20130308898 A1
DE 102021208953 A1
CN 101836290 A
EP 3929641 A1
TW 201724401 A
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DARBY M THOMASON whose telephone number is (703)756-5817. The examiner can normally be reached Mon.-Fri. 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at (571) 272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DARBY M. THOMASON/Examiner, Art Unit 2874
/UYEN CHAU N LE/Supervisory Patent Examiner, Art Unit 2874
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