DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is in reply to an amendment filed on August 4, 2025 regarding Application No. 17/561,323. Applicants amended claims 4, 10, 15, 20, and 23. Claims 1-25 are pending.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on August 22, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Office.
Response to Arguments
Applicants’ amendments to claims 4, 10, 15, 20, and 23 and remarks regarding claim objections (Remarks, p. 1) are acknowledged. The objections are withdrawn.
Applicants’ argument regarding rejection of claim 17 under 35 U.S.C. 112(a) (Remarks, p. 1) is acknowledged. The rejection is withdrawn.
Applicants’ argument regarding rejection of claim 17 under 35 U.S.C. 112(b) (Remarks, pp. 1-2) is acknowledged. The rejection is withdrawn.
Applicants’ arguments filed on August 4, 2025 have been fully considered but they are not persuasive.
In response to the argument regarding Kwa, features recited in independent claim 1, “sending one or more update messages to update a previous frame, and then also sending an indication that a last of the update messages is the last one to update the same frame” (italics emphasis in original), and Kwa and “no updates at all for the previous claim” (Remarks, p. 3), the Office respectfully disagrees and submits that all features of independent claim 1 are taught by Kwa ‘955. For example, figure 5, block 530 of Kwa ‘955 teaches a no partial frame update indication is sent after a partial frame update.
In response to the arguments regarding independent claim 1 and allowable over Kwa, other independent claims and allowable, and dependent claims and patentably distinct (Remarks, p. 3), the Office respectfully disagrees and submits that all features of independent claims 1, 11, and 16 are taught by Kwa ‘955, as discussed above and in the rejections. As such, independent claims 1, 11, and 16 are not allowable. In addition, the dependent claims are not allowable by virtue of their individual dependencies from one of independent claims 1, 11, and 16, and as discussed in the rejections.
For the reasons discussed above and in the rejections, the pending claims are not allowable.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 5, 7, 10-19, and 25 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by Kwa et al. in US 2019/0041955 A1 (hereinafter Kwa ‘955).
Note: In Kwa ‘955
Panel 18 is misidentified as element “10” in line 10 of [0015]. (Kwa ‘955: see FIG. 1 and [0014]-[0015]).
Display electronics 30 is misidentified as element “28” in line 7 of [0016]. (Kwa ‘955: see FIG. 1 and [0016]).
Timer 26 is misidentified as element “24” in line 10 of [0016]. (Kwa ‘955: see FIG. 1 and [0016]).
“Not” may be missing between “stable frame data is” and “expected” (or “no” may be missing before “stable frame data is expected”) in lines 4-5 and 9-10, and between “stable frames have” and “been received” (or “no” before “stable frames have been received”) in the 2nd to the last and last lines of [0024]. (Kwa ‘955: see FIG. 5, [0026], [0035], and the Abstract). Alternatively, “stable frame(s) (data)” (lls. 4, 9-10, and 11) may refer to “stable frame(s) (data). (Kwa: see [0017] and [0021]).
FIG. 7 is misidentified as “FIG. 12” in the 1st line of [0040]. (Kwa ‘955: See FIG. 7 and [0040]).
Regarding claim 1, Kwa ‘955 teaches:
An apparatus comprising (Kwa ‘955: 10 and 18; FIG. 1 and [0014], see also FIG. 7 and [0040]):
display engine circuitry to (Kwa ‘955: 12 and 14; FIG. 1 and [0015]):
send, to a display of a computing device, one or more update messages to the display to update a previous frame (Kwa ‘955: display 18, computing device 10 and 18, and partial and full frame update messages; FIGs. 1-4, [0014]-[0015], [0019]-[0021], and [0023]-[0024], see also FIG. 5); and
send, to the display, an indication that a last of the one or more update messages is the last of the one or more update messages to update the previous frame (Kwa ‘955: no frame updates are expected indication; [0024], [0026], and [0029], see also FIG. 5, [0035], and the Abstract).
Regarding claim 2, Kwa ‘955 teaches:
The apparatus of claim 1, wherein the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame comprises an indication of a period during which the display engine circuitry will not send update messages to the display (Kwa ‘955: link shut down period; [0024]-[0025], see also FIG. 5, [0017], [0022], and [0035]-[0036]).
Regarding claim 3, Kwa ‘955 teaches:
The apparatus of claim 1, wherein to send the one or more update messages to the display comprises to send the one or more update messages over a link between the display engine circuitry and the display (Kwa ‘955: link 16; FIGs. 1-4 and [0015]),
wherein the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame comprises an indication of a low-power state into which the display should place the link (Kwa ‘955: [0024], see also [0017], [0020], and [0022]).
Regarding claim 5, Kwa ‘955 teaches:
The apparatus of claim 1, wherein to send the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame comprises to send an update notification message to the display (Kwa ‘955: partial or full frame update notification message; FIGs. 2-4, [0019]-[0021], and [0023]-[0024], see also FIG. 5),
wherein the update notification message comprises an indication of a location, width, and length of an update region and the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame (Kwa ‘955: location, width, and length of an update region indication corresponding to partial or full frame update; see FIGs. 2-4 and [0015], [0019]-[0021], [0023]-[0024], [0026], and [0029], see also FIG. 5, [0035], and the Abstract).
Regarding claim 7, Kwa ‘955 teaches:
The apparatus of claim 1, wherein to send the one or more update messages to the display to update the previous frame comprises asynchronously sending the one or more update messages to the display to update the previous frame (Kwa ‘955: asynchronously corresponding to partial, full, and no frame updates; see FIG. 2, [0011], and [0019], see also FIG. 5 and [0036]).
Regarding claim 10, Kwa ‘955 teaches:
A system comprising the apparatus of claim 1, further comprising the computing device and the display, the display to (Kwa ‘955: system 100; FIG. 1 and [0014]; claim 1 above):
receive, from the display engine circuitry, the one or more update messages over a link between the display and the display engine circuitry (Kwa ‘955: link 16; FIGs. 1-4, [0014]-[0015], [0019]-[0021], and [0023]-[0024], see also FIG. 5; claim 1 above);
receive, from the display engine circuitry, the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame (Kwa ‘955: [0024], [0026], and [0029], see also FIG. 5, [0035], and the Abstract; claim 1 above); and
place the link in a low-power state in response to receipt of the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame (Kwa ‘955: [0024], see also [0017], [0020], and [0022]; claim 1 above).
Regarding claim 11, this claim is rejected under similar rationale as claim 1 above.
However, it is noted that claim 11 differs from claim 1 above in that the following are recited:
A method comprising:
said send(ing) said one or more update messages, by display engine circuitry of a computing device; and
said sending said indication, by the display engine circuitry.
Kwa ‘955 teaches:
A method comprising (Kwa ‘955: see FIG. 4 and [0023]-[0026], see also FIGs. 2-3 and 5):
sending, by display engine circuitry of a computing device and to a display of the computing device, one or more update messages to the display to update a previous frame (Kwa ‘955: display engine circuitry 12 and 14, and computing device 10 and 18; FIG. 1 and [0014]-[0015]; claim 1 above); and
sending, by the display engine circuitry to the display, an indication that a last of the one or more update messages is the last of the one or more update messages to update the previous frame (Kwa ‘955: [0024], [0026], and [0029], see also FIG. 5, [0035], and the Abstract; claim 1 above).
Regarding claim 12, this claim is rejected under similar rationale as claim 2 above.
Regarding claim 13, this claim is rejected under similar rationale as claim 3 above.
Regarding claim 14, this claim is rejected under similar rationale as claim 7 above.
Regarding claim 15, this claim is rejected under similar rationale as claim 10 above.
However, it is noted that claim 15 differs from claim 10 above in that the following are recited:
said receiv(e/ing) said one or more update messages, by said display;
said receiv(e/ing) said indication, by said display; and
said plac(e/ing), by said display.
Kwa ‘955 teaches:
The method of claim 11, further comprising:
receiving, by the display from the display engine circuitry, the one or more update messages over a link between the display and the display engine circuitry (Kwa [0015]; claim 10 above);
receiving, by the display and from the display engine circuitry, the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame Kwa ‘955: [0024], [0026], and [0029], see also FIG. 5, [0035], and the Abstract; claim 10 above); and
placing, by the display, the link in a low-power state in response to receipt of the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame (Kwa ‘955: [0024], see also [0017], [0020], and [0022]; claim 10 above).
Regarding claim 16, Kwa ‘955 teaches:
An apparatus comprising (Kwa ‘955: 10 and 18; FIG. 1 and [0014], see also FIG. 7 and [0040]):
display controller circuitry to (Kwa ‘955: 20, 26, and 28; FIG. 1 and [0016]):
receive, from display engine circuitry of a computing device, one or more update regions to update a previous frame over a link between the display controller circuitry and the display engine circuitry (Kwa ‘955: display engine circuitry 12 and 14, computing device 10 and 18, partial and full frame update regions, and link 16; FIGs. 1-4, [0014]-[0016], [0019]-[0021], and [0023]-[0024], see also FIG. 5);
receive, from the display engine circuitry, an indication that one of the one or more update regions is a last update region to update the previous frame (Kwa ‘955: no frame updates are expected indication; [0024], [0026], and [0029], see also FIG. 5, [0035], and the Abstract); and
place the link in a low-power state in response to receipt of the indication that the one of the one or more update regions is the last update region to update the previous frame (Kwa ‘955: [0017] and [0024], see also [0020] and [0022]).
Regarding claim 17, Kwa ‘955 teaches:
The apparatus of claim 16, wherein the display controller circuitry is further to:
access, by the display controller circuitry, a link policy engine to determine a link state for the link (Kwa ‘955: link policy engine 22 (link policy/rules corresponding to a number of frames in which the link is in a low-power link state, and non-low-power link state), and a low-power or non-low power link state; FIG. 1, [0016]-[0017], [0022], and [0024]-[0025], see also FIG. 5, [0020], and [0036]); and
determine, by the display controller circuitry, the link state based on the indication that the one of the one or more update regions is the last update region to update the previous frame and based on the link policy engine (Kwa ‘955: [0017], [0022], and [0024]-[0025], see also FIG. 5, [0020], and [0036]),
wherein the link state is the low-power state (Kwa ‘955: [0017] and [0024], see also [0020] and [0022]),
wherein to place the link in the low-power state comprises to place the link in the low-power state in response to a determination to place the link in the link state based on the indication that the one of the one or more update regions is the last update region to update the previous frame and based on the link policy engine (Kwa ‘955: [0017], [0022], and [0024]-[0025], see also FIG. 5, [0020], and [0036]).
Regarding claim 18, Kwa ‘955 teaches:
The apparatus of claim 16, wherein the indication that the one of the one or more update regions is the last update region to update the previous frame comprises an indication of a period during which the display engine circuitry will not send update messages to the display controller circuitry (Kwa ‘955: link shut down period; [0024]-[0025], see also FIG. 5, [0017], [0022], and [0035]-[0036]).
Regarding claim 19, Kwa ‘955 teaches:
The apparatus of claim 16, wherein the indication that the one of the one or more update regions is the last update region to update the previous frame comprises an indication of the low-power state into which the display controller circuitry should place the link (Kwa ‘955: [0024], see also [0017], [0020], and [0022]),
wherein to place the link in the low-power state comprises to place the link in the low- power state in response to the indication of the low-power state into which the display controller circuitry should place the link (Kwa ‘955: [0024], see also [0017], [0020], and [0022]).
Regarding claim 25, Kwa ‘955 teaches:
The apparatus of claim 16, wherein to receive the one or more update regions comprises to asynchronously receive the one or more update regions (Kwa ‘955: asynchronously corresponding to partial, full, and no frame updates; see FIG. 2, [0011], and [0019], see also FIG. 5 and [0036]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicants are advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 4, 8-9, and 20-22 are rejected under 35 U.S.C. 103 as being unpatentable over Kwa ‘955 in view of Tan et al. in US 2019/0369703 A1 (hereinafter Tan).
Regarding claim 4, Kwa ‘955 teaches:
The apparatus of claim 3.
However, it is noted that Kwa ‘955 does not teach:
wherein said link is a peripheral component interconnect express (PCIe) link, wherein said indication of said low-power state into which said display should place said link comprises an indication of an L1.2 link state into which said display should place the PCIe link.
Tan teaches:
wherein a link is a peripheral component interconnect express (PCIe) link (Tan: link 106; Fig. 1, [0001], and [0042]),
wherein an indication of a low-power state into which an endpoint device should place the link comprises an indication of an L1.2 link state into which the endpoint device should place the PCIe link (Tan: low-power state 400, and endpoint device 104; Figs. 1, 2b, and 4-6, [0042], [0051], [0053], and [0058]).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify the link and indication of the low-power state taught by Kwa ‘955 to include: the features taught by Tan, such that Kwa ‘955 as modified teaches: wherein the link is a peripheral component interconnect express (PCIe) link (link taught by Kwa ‘955 combined with the link taught by Tan), wherein the indication of the low-power state into which the display should place the link comprises an indication of an L1.2 link state into which the display should place the PCIe link (indication taught by Kwa ‘955 combined with the indication taught by Tan), to connect two devices and reduce power consumption.
Regarding claim 8, Kwa ‘955 teaches:
The apparatus of claim 1, wherein to send the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame comprises to send, over a link, the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame (Kwa ‘955: link 16; FIGs. 1 and 4, [0015], and [0024], see also [0029]).
However, it is noted that Kwa ‘955 does not teach:
said link is a peripheral component interconnect express (PCIe) link.
Tan teaches:
a peripheral component interconnect express (PCIe) link (Tan: PCIe link 106; Fig. 1, [0001], and [0042]).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify the link taught by Kwa ‘955 to include: the feature taught by Tan, such that Kwa ‘955 as modified teaches: wherein to send the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame comprises to send, over a peripheral component interconnect express (PCIe) link, the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame (send and link taught by Kwa ‘955 combined with the link taught by Tan), to connect two devices.
Regarding claim 9, Kwa ‘955 as modified by Tan teaches:
The apparatus of claim 8, wherein to send, over the PCIe link, the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame comprises to send, over the PCIe link with a vendor defined message the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame (Tan: Figs. 12a-13 and [0090]-[0094], see also Figs. 8-11 and 14a-15b; a vendor defined message; claim 8 above).
Regarding claim 20, Kwa ‘955 teaches:
The apparatus of claim 19.
However, it is noted that Kwa ‘955 does not teach:
wherein said link is a peripheral component interconnect express (PCIe) link, wherein said indication of said low-power state into which said display controller circuitry should place said link comprises an indication of an L 1.2 link state into which said display controller circuitry should place the PCIe link.
Tan teaches:
wherein a link is a peripheral component interconnect express (PCIe) link (Tan: link 106; Fig. 1, [0001], and [0042]),
wherein an indication of a low-power state into which an endpoint device controller circuitry should place the link comprises an indication of an L 1.2 link state into which the endpoint device controller circuitry should place the PCIe link (Tan: low-power state 400, endpoint device controller circuitry 128 and 138; Figs. 1, 2b, and 4-6, [0044], [0047], [0051], [0053], and [0058]-[0060]).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify the link and the indication of the low-power state taught by Kwa ‘955 to include: the features taught by Tan, such that Kwa ‘955 as modified teaches: wherein the link is a peripheral component interconnect express (PCIe) link (link taught by Kwa ‘955 combined with the link taught by Tan), wherein the indication of the low-power state into which the display controller circuitry should place the link comprises an indication of an L 1.2 link state into which the display controller circuitry should place the PCIe link (indication taught by Kwa ‘955 combined with the indication taught by Tan), to connect two devices and reduce power consumption.
Regarding claim 21, Kwa ‘955 is modified in the same manner and for the same reason set forth in the discussion of claim 20 with respect to the link. Thus, claim 21 is rejected under similar rationale as claim 20 with respect to the link.
Regarding claim 22, Kwa ‘955 as modified by Tan teaches:
The apparatus of claim 21, wherein to receive the indication that the one of the one or more update regions is the last update region to update the previous frame comprises to receive, in a vendor-defined PCIe message, the indication that the one of the one or more update regions is the last update region to update the previous frame (Tan: Figs. 12a-13 and [0090]-[0094], see also Figs. 8-11 and 14a-15b; a vendor defined message; claim 16 above).
Claims 6 and 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over Kwa ‘955 in view of Kwa et al. in US 2019/0043458 A1 (hereinafter Kwa ‘458).
Regarding claim 6, Kwa ‘955 teaches:
The apparatus of claim 5.
However, it is noted that Kwa ‘955 does not teach:
wherein said to send said indication that said last of said one or more update messages is said last of said one or more update messages to update said previous frame comprises to send said update notification message before sending said last of the one or more update messages.
Kwa ‘458 teaches:
send an update notification message before sending one or more update messages (Kwa ‘458: partial (or full) frame update notification message 650 (or 630), and partial (or full) frame update messages 660 (or 640); FIG. 6 and [0038]-[0039], see also FIGs. 1-5).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify the apparatus taught by Kwa ‘955 to include: the features taught by Kwa ‘458, such that Kwa ‘955 as modified teaches: wherein to send the indication that the last of the one or more update messages is the last of the one or more update messages to update the previous frame comprises to send the update notification message before sending the last of the one or more update messages (send as taught by Kwa ‘955 combined with send as taught by Kwa ‘458), to provide notification of a frame update.
Regarding claim 23, Kwa ‘955 teaches:
The apparatus of claim 16, wherein to receive the indication that the one of the one or more update regions is the last update region to update the previous frame comprises to receive an update notification message (Kwa ‘955: partial or full frame update notification message; FIGs. 2-4 and [0019]-[0021], and [0023]-[0024], see also FIG. 5),
wherein the update notification message comprises an indication of an update region of the one or more update regions to update the previous frame (Kwa ‘955: update region indication corresponding to partial or full frame update; see FIGs. 2-4, [0015], [0019]-[0021], and [0023]-[0024], see also FIG. 5).
However, it is noted that Kwa ‘955 does not teach:
said update notification message comprises said indication that said update region of said one or more update regions will be sent to update said previous frame, wherein said update notification message is separate from messages carrying said one or more update regions.
Kwa ‘458 teaches:
wherein an update notification message comprises an indication that an update region of one or more update regions will be sent to update a previous frame (Kwa ‘458: partial (or full) frame update notification message 650 (or 630), and partial (or full) frame update regions; FIG. 6 and [0038]-[0039], see also FIGs. 1-5),
wherein the update notification message is separate from messages carrying one or more update regions (Kwa: see FIG. 6 and [0038]-[0039]).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to modify the apparatus taught by Kwa ‘955 to include: the features taught by Kwa ‘458, such that Kwa ‘955 as modified teaches: wherein the update notification message comprises an indication that an update region of the one or more update regions will be sent to update the previous frame (update notification message taught by Kwa ‘955 combined with the update notification message taught by Kwa ‘458), wherein the update notification message is separate from messages carrying the one or more update regions (update notification message taught by Kwa ‘955 combined with the update notification message taught by Kwa ‘458), to provide notification of a frame update.
Regarding claim 24, Kwa ‘955 as modified by Kwa ‘458 teaches:
The apparatus of claim 23, wherein the update notification message comprises an indication of a location, width, and length of an update region of the one or more update regions (Kwa ‘955: location, width, and length of an update region indication corresponding to partial or full frame update; see FIGs. 2-4 and [0015], [0019]-[0021], and [0023]-[0024], see also FIG. 5 and [0035]).
Conclusion
THIS ACTION IS MADE FINAL. Applicants are reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to K. Kiyabu whose telephone number is (571) 270-7836. The examiner can normally be reached Monday to Thursday 9:00 A.M. - 5:00 P.M. EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae, can be reached at (571) 272-3017. The fax number for the organization where this application or proceeding is assigned is (571) 273-8300.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicants are encouraged to use the USPTO Automated Interview Request (AIR) at https://www.uspto.gov/patents/uspto-automated-interview-request-air-form.
Information regarding the status of an application may be obtained from Patent Center. Status information for published applications may be obtained from Patent Center. Status information for unpublished applications is available through Patent Center for authorized users only. Should you have questions about access to Patent Center, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/K. K./
Examiner, Art Unit 2626
/TEMESGHEN GHEBRETINSAE/Supervisory Patent Examiner, Art Unit 2626 9/30/2025