DETAILED ACTION
This office action addresses Applicant’s response filed on 12 May 2026. Claims 1-20 are pending.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract mental processes without significantly more. The claim(s) recite(s) accessing a netlist and attributes including boundary regions, having various characteristics, for placement of power signals in redistribution layers (RDLs) and minimum overlap junction area thresholds, and generating first and second placement data ‘indicative of’ placement of the power signals based on the junction region, evaluate whether overlap junction area satisfies the threshold, and adjusting metal width/spacing if not, and generating updated mask layout data, which could be performed by a designer entirely in the mind or with pen and paper. The claimed invention is directed to an abstract design process that places/routes signals in a circuit design according to regions that constrain routing direction and density, and checking that signals overlap sufficiently to place vias. A circuit designer thinking about or receiving a design specification with signal direction and density characteristics in specified regions (as illustrated in Fig. 8), and then thinking about, writing, drawing, etc. any information ‘indicative of’ where to place signals according to the specification, checking whether signals have enough overlap to place vias, and moving or widening the signals if not, satisfies the claim.
This judicial exception is not integrated into a practical application because the only additional elements recited are a processor, data stored on a storage device, and files, which are merely generic computer elements used as tools for implementing the otherwise abstract mental process. Generic computer implementation of an abstract idea does not qualify as integrating the abstract idea into a patentable practical application. Similarly, the claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because generic computer implementation of an abstract idea does not qualify as ‘significantly more’ than the abstract idea itself.
Claim 2 recites two boundary regions; claim 3 recites using the metal density of the first region for generating placement data; claim 4 recites that one boundary region has higher priority; claim 7 recites using supported metal widths and spacings. Claims 2-4 and 7 thus recite merely characteristics of the data received or generated by the process, and do not change the abstract nature of the process itself. Claim 5 recites generating a report that indicates whether placement includes a minimum junction area, which is another abstract mental step similar to the data generation of parent claim 1. Claim 6 recites that generating placement is in an order specified by the attributes, which does not change the abstract nature of the placement generation itself. Claims 8-14 recite the methods performed by the processor of claims 1-7 and are rejected under the same reasoning. Claims 15-20 similarly recite a computer system that performs the same method performed by the processor of claims 1-5 and 7, with an additional step of receiving the netlist and basing the data generation also on the netlist in addition to the attributes, which are also abstract mental steps of receiving additional information and using the additional information in the data generation of claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 8-11, and 15-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2020/0020644) in view of Hetzel (US 2005/0273748), Ou (US 2023/0014110), Bales (US 2016/0267204), Teig (US 2002/0147958), Igeta (US 2008/0059934), and Chiang (US 2019/0370433).
Regarding claim 1, Lee discloses a processor comprising circuitry configured to (Fig. 12; ¶¶74-75): access mask layout data comprising a netlist for a plurality of levels of redistribution layers between one or more integrated circuits and a package substrate and access a plurality of attributes (Fig. 1; ¶¶15-16, 25, 66); execute an automated redistribution-layer power rail generator to generate first placement data indicative of placement of the power or ground voltage reference signal in the selected level (¶¶31, 66); and generate updated mask layout data with the first placement data (¶¶66, 71, 72).
Lee does not appear to explicitly disclose accessing a plurality of attributes including: boundary regions for placement of power and ground voltage reference signals in the redistribution layers, for a power or ground voltage reference signal in a selected level of the plurality of levels of redistribution layers, a first boundary region having a first metal density, a second boundary region having a second metal density different from the first metal density, wherein the power or ground voltage reference signal is placed in the first boundary region and in the second boundary region using the same routing orientation. Hetzel discloses these limitations (Fig. 17; ¶¶56, 71, 82). Although Hetzel clearly discloses regions having a same orientation and two different metal densities by contrasting between embodiments where each region has its own density and embodiments where a density is set for each orientation, if Hetzel is found to be unclear regarding regions having a same orientation and two different metal densities, Ou also explicitly discloses the same (Fig. 4). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, and Ou, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of increasing routing flexibility by allowing designers to route signals in different directions and using different track pitches as desired. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Lee discloses routing metal layers of an interposer. Hetzel discloses that routing metal layers should be done according to regions that define different allowable routing orientations and densities; Ou similarly discloses that routing should be done according to regions that define different allowable densities even when the orientations are the same. The teachings of Hetzel and Ou are directly applicable to Lee in the same way, so that Lee would similarly route interposers using regions that define allowable routing orientations and densities, in order to increase routing flexibility by allowing designers to route signals using different orientations, densities, and combinations thereof.
Lee does not appear to explicitly disclose priorities associated with the first boundary region and the second boundary region; Bales discloses these limitations (Abstract, ¶7). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, and Bales, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of allowing designers to prioritize some design constraints over others when routing an interposer. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Lee discloses routing an interposer. Hetzel and Ou teach regions with defined routing directions and densities. Bales teaches that the regions should have relative priorities, so that the constraints defined for higher priority regions take precedence over those defined for lower priority regions. The teachings of Bales are directly applicable to Lee, Hetzel and Ou, so that Lee would similarly route interposers using routing regions having different relative priorities, to provider greater routing flexibility while allowing designers to prioritize selected routing constraints over others.
Lee does not appear to explicitly disclose that when an overlap region exists between the first boundary region and the second boundary region and the first boundary region has a higher priority than the second boundary region, generate second placement data indicative of a placement of the power and ground voltage reference signal using the first metal density in the overlap region and in a region adjacent to the overlap region in the second boundary region, so that the updated mask layout data is generated with the second placement data. Hetzel discloses these limitations (Fig. 59C-D; ¶¶3, 82); Teig also discloses the same, where the two boundary regions have the same orientation (Fig. 72). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, Bales, and Teig, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of increasing routing flexibility using defined routing regions by allowing routing across region boundaries. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Lee discloses routing metal layers of an interposer. Hetzel discloses that routing metal layers should be done according to regions that define different allowable routing orientations and densities; Ou similarly discloses that routing should be done according to regions that define different allowable densities even when the orientations are the same; Teig further teaches that routing regions having the same orientations can overlap. Hetzel further teaches that when regions overlap, routing density of one region can also be used in the overlap region. The teachings of Hetzel, Ou, and Teig are directly applicable to Lee in the same way, so that Lee would similarly route interposers using regions that define allowable routing orientations and densities, while further increasing routing flexibility by also allowing routing across overlapping region boundaries.
Lee does not appear to explicitly disclose a minimum overlap junction area threshold for via generation between the selected level and an adjacent level, evaluating whether an overlap junction area between the power or ground voltage reference signal in the selected level and the power or ground voltage reference signal in the adjacent level satisfies the minimum overlap junction area threshold for via generation; responsive to the overlap junction area not satisfying the minimum overlap junction area threshold, automatically adjust a metal width or a metal spacing of the power or ground voltage reference signal in the selected level or the adjacent level. Igeta discloses these limitation (Figs 2A and 6A-C; ¶10). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, Bales, Teig, and Igeta, because doing so would have involved merely the routine combination of known elements according to known techniques to produce merely the predictable results of ensuring sufficient area for vias. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1395. Lee discloses routing signals across multiple layers. Igeta teaches that the signals on different layers should have sufficient overlap for via insertion. The teachings of Igeta are directly applicable to Lee in the same, way, so that Lee would similarly check signal overlap to ensure sufficient area for via insertion.
If Lee is found to be unclear regarding a plurality of levels of redistribution layers between one or more integrated circuits and a package substrate, Chiang discloses the same (Fig. 1a; ¶2). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, Bales, Teig, Igeta, and Chiang, because doing so would have involved merely the routine combination of known elements according to known techniques to produce merely the predictable results of allowing ICs to connect to each other and external circuitry through PCBs/packaging. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1395. Lee discloses an interposer having redistribution layers (RDLs) connected to a PCB or package substrate and on which ICs are mounted. Persons having ordinary skill in the art would recognize interposers comprise a plurality of RDLs between the ICs and PCB/package to allow connection between the ICs and PCB/package. The teachings of Chiang are directly applicable to Lee in the same way, so that Lee would similarly be used for routing of RDLs to provide connectivity between ICs and PCBs/package substrates.
Regarding claim 2, Lee does not appear to explicitly disclose that the first boundary region uses a first orientation and the first metal density; and the second boundary region uses the first orientation and a second metal density different from the first metal density. As discussed above with regard to claim 1, Hetzel (Fig. 17; ¶¶82) and Ou (Fig. 4) disclose these limitations. Motivation to combine remains consistent with claim 1.
Regarding claim 3, Lee does not appear to explicitly disclose that when the overlap region exists between the first boundary region and the second boundary region, the circuitry is further configured to generate data indicative of a placement of the power or ground voltage reference signal using the first metal density in a region adjacent to the overlap region in the first boundary region and in a region adjacent to the overlap region in the second boundary region. Hetzel discloses these limitations (Fig. 59A and C; routing density from, e.g., upper LPDR, used in both LPDRs adjacent to boundary overlap).
Regarding claim 4, Lee does not appear to explicitly disclose that the circuitry is further configured to select the first boundary region as having higher priority than the second boundary region based on the plurality of attributes before generating the second placement data. Bales discloses these limitations (Abstract, ¶7). Motivation to combine remains consistent with claim 1.
Claims 8-11 are directed to the methods performed by the processor of claims 1-4, recite substantially similar limitations, and are rejected under the same reasoning.
Claims 15-18 are directed to computing systems comprising a processing circuit, a memory circuit coupled to the processing circuit configured to store a netlist, wherein the circuitry of the processing circuit is configured to perform the methods of claims 1-4, recite substantially similar limitations, and are rejected under the same reasoning. As discussed above with regard to claim 1, Lee discloses computing systems comprising a processing circuit, a memory circuit coupled to the processing circuit configured to store a netlist, wherein the circuitry of the processing circuit is configured to perform the claimed methods (Fig. 12; ¶¶66, 74, 75).
Claim(s) 5, 12, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Hetzel, Ou, Bales, Teig, Igeta, Chiang, and Culp (US 2004/0210863).
Regarding claims 5, 12, and 19, Lee does not appear to explicitly disclose that the circuitry is further configured to generate a report that indicates whether the placement of the power and ground voltage reference signals in the plurality of levels of redistribution layers includes a minimum overlap junction area specified by the plurality of attributes; Culp discloses these limitations (¶¶5, 37, 38). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, Bales, Teig, Igeta, Chiang, and Culp, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of ensuring that there is sufficient overlap to meet design requirements for a properly functioning circuit. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Lee discloses routing signals of an interposer. Culp teaches that when routed signals should be checked for minimum junction area in order to meet design requirements. The teachings of Culp are directly applicable to Lee in the same way, so that Lee would similarly check that routed signals have minimum junction area to meet design requirements for a properly functioning circuit.
Claim(s) 6 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Hetzel, Ou, Bales, Teig, Igeta, Chiang, and Yaguchi (US 2005/0278679).
Regarding claims 6 and 13, Lee does not appear to explicitly disclose that the circuitry is further configured to generate placement of the power and ground voltage reference signals in the plurality of levels of redistribution layers in an order of sequences specified by the plurality of attributes, wherein each sequence identifies one of the plurality of levels of redistribution layers; Yaguchi discloses these limitations (Abstract, ¶99). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, Bales, Teig, Igeta, Chiang, and Yaguchi, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of correctly routing signals through required routing layers according to design specifications. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Lee discloses routing signals through regions in various layers. Yaguchi teaches that the routing should progress through layers in a specified sequence. The teachings of Yaguchi are directly applicable to Lee in the same way, so that Lee would similarly route signals through layers in a given sequence in accordance with design intent.
Claim(s) 7 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Hetzel, Ou, Bales, Teig, Igeta, Chiang, and Cibrario (US 2014/0303941).
Regarding claims 7 and 14, Lee does not appear to explicitly disclose that responsive to the overlap junction area being less than the minimum overlap junction area threshold, the circuitry is further configured to access a file that identifies supported metal widths and supported metal spacings for the selected level and the adjacent level, and to select the adjusted metal width or the adjusted metal spacing from the supported metal widths and the supported metal spacings identified in the file. However, these limitations are conventional; the supported metal widths and spacing for each level are provided as design rules in, e.g., process development kits (PDKs), which designs are then required to adhere to, as taught by Cibrario (¶8). As discussed above with regard to claim 1, Igeta already discloses that responsive to the overlap junction area being less than the minimum overlap junction area threshold, the metal width or spacing is adjusted; such adjustment would necessarily use the allowed widths/spacings in the PDK in order for the design to be legal. It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, Bales, Teig, Igeta, Chiang, and Cibrario, because doing so would have involved merely the routine combination of known elements according to known techniques to produce merely the predictable results of ensuring that design changes are legal. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1395. Lee discloses routing signals in metal layers. Igeta teaches that if overlap between signals is below a threshold, adjusting the width or spacing of the signals. Cibrario teaches that legal widths and spacings are provided in rule files. The teachings of Cibrario are directly applicable to Lee in the same way, so that Lee would make legal adjustments to signals.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Hetzel, Ou, Bales, Teig, Igeta, Chiang, Culp, and Cibrario.
Regarding claim 20, Lee does not appear to explicitly disclose that responsive to the overlap junction area being less than the minimum overlap junction area threshold, the circuitry is further configured to access a file that identifies supported metal widths and supported metal spacings for the selected level and the adjacent level, and to select the adjusted metal width or the adjusted metal spacing from the supported metal widths and the supported metal spacings identified in the file. However, these limitations are conventional; the supported metal widths and spacing for each level are provided as design rules in, e.g., process development kits (PDKs), which designs are then required to adhere to, as taught by Cibrario (¶8). As discussed above with regard to claim 1, Igeta already discloses that responsive to the overlap junction area being less than the minimum overlap junction area threshold, the metal width or spacing is adjusted; such adjustment would necessarily use the allowed widths/spacings in the PDK in order for the design to be legal. It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Lee, Hetzel, Ou, Bales, Teig, Igeta, Chiang, Culp, and Cibrario, because doing so would have involved merely the routine combination of known elements according to known techniques to produce merely the predictable results of ensuring that design changes are legal. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1395. Lee discloses routing signals in metal layers. Igeta teaches that if overlap between signals is below a threshold, adjusting the width or spacing of the signals. Cibrario teaches that legal widths and spacings are provided in rule files. The teachings of Cibrario are directly applicable to Lee in the same way, so that Lee would make legal adjustments to signals.
Response to Arguments
Applicant's arguments filed 12 May 2026 have been fully considered but they are not persuasive.
New limitations are addressed above in the rejections using newly-cited prior art, and are not further addressed here.
Applicant asserts that the amended claims go beyond boundary regions, or merely receiving layout information and generating revised layout information, and thus are directed to particular technological solution for correcting routing geometry that is patent-eligible. Remarks 12. The examiner disagrees. The claims are rejected under § 101 as being directed to abstract mental processes without significantly more; specifically, the claims recite a circuit design process that receives and modifies design data according to various rules/attributes (the mental process), which is performed through generic computer implementation (and thus not ‘significantly more’). Though the claim has been amended to clarify the boundary regions and recite further steps of determining if there is sufficient overlap between signals and adjusting width or spacing if not, these steps remain performable manually by designers, in the mind or with pen and paper.
Circuit designers have been generating and modifying circuit routing manually for decades. The claimed boundary regions are merely constraints specifying the direction and density of routing in a particular area. That the boundary regions have different priorities does not elevate the routing beyond a mental process; circuit designers could clearly note that one set of constraints takes precedence over another in a given region and route signals accordingly. Similarly, verifying that there is sufficient overlap between layers and adjusting the width or spacing of signals to ensure sufficient overlap is a basic aspect of routing (specifically, connecting signal wires on adjacent layers using vias), and circuit designers are more than capable of noting when overlaps are insufficient for via insertion and adjusting (e.g. enlarging or moving) signal wires to increase the overlap.
In short, the process recited in the claim still falls in the realm of abstract mental processes, and the claim recites nothing beyond the mental process itself except for generic computer implementation, which neither qualifies as a patentable practical application of the abstract mental process, nor as ‘significantly more’ than the abstract mental process itself.
Conclusion
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13 June 2026
/ARIC LIN/ Examiner, Art Unit 2851
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