Prosecution Insights
Last updated: April 19, 2026
Application No. 17/565,960

METHODS FOR ENGINEERING VOLUMES IN LEDS FOR HIGHER OPERATING EFFICIENCIES AND DEVICES THEREOF

Final Rejection §102§103§112
Filed
Dec 30, 2021
Examiner
HSIEH, HSIN YI
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nanotech Strategies LLC
OA Round
2 (Final)
51%
Grant Probability
Moderate
3-4
OA Rounds
3y 10m
To Grant
57%
With Interview

Examiner Intelligence

Grants 51% of resolved cases
51%
Career Allow Rate
321 granted / 631 resolved
-17.1% vs TC avg
Moderate +6% lift
Without
With
+6.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 10m
Avg Prosecution
57 currently pending
Career history
688
Total Applications
across all art units

Statute-Specific Performance

§103
39.3%
-0.7% vs TC avg
§102
23.1%
-16.9% vs TC avg
§112
35.3%
-4.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 631 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1-3 and 6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "the one other one" in the second last line of the claim. It is unclear what the limitation indicates. Claims 2, 3 and 6 are rejected because they depend on the rejected claim 1. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Huang et al. (US 20190393382 A1). Regarding claim 1, Huang et al. teach a method (the method of making LED 10; Figs. 1A-1B, [0019]) comprising: forming a first semiconductor region (100; Figs. 1A-1B, [0019]) of a light emitting diode (10; Figs. 1A-1B; [0019]) doped with a first dopant concentration (the dopant concentration of 100); and forming a second semiconductor region (300; Figs. 1A-1B, [0019]) of the light emitting diode (10) doped with a second dopant concentration (the dopant concentration of 300) coupled to the first semiconductor region (100; see Figs. 1A-1B); wherein the forming the first semiconductor region (100) or the forming the second semiconductor region (300) further comprises forming a volume of the first semiconductor region (the volume of 100) or another volume of the second semiconductor region (the volume of 300) based on a calculation (the calculation of the electron concentration and the hole concentration assuming all dopants are ionized) so that an electron concentration in one of the first semiconductor region or the second semiconductor region (the electron concentration of 100, 1015 cm−3 assuming all dopants are ionized) substantially matches within a first set percentage (100%) a hole concentration (the hole concentration of 300, 5×1016 cm−3 assuming all dopants are ionized) in the one other one of the first semiconductor region or the second semiconductor region (300). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. as applied to claim 1 above, and further in view of Kang (US 20110198664 A1). Regarding claim 2, Huang et al. teach the method as set forth in claim 1 further comprising: forming at least one intermediate region (200; Figs. 1A-1B; [0019]) between the first semiconductor region (100) and the second semiconductor region (300); wherein the first semiconductor region (100) comprises one of a p-type or an n-type layer (n-type layer; [0019]), the second semiconductor region (300) comprises the other one of the p-type or the n-type layer (p-type layer; [0019]). Huang et al. do not teach the intermediate region comprises a multiple quantum wells region. In the same field of endeavor of LEDs, Kang teaches intermediate region (140; Fig. 12, [0049]) comprises a multiple quantum wells region ([0049]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the inventions of Huang et al. and Kang, and to use the multiple quantum wells region of Kang as the intermediate region of Huang et al., because Huang et al. teach the intermediate region to be a light emitting layer (200; Figs. 1A-1B, [0019]), but is silent about the detail of the light emitting layer, while Kang teaches that multiple quantum well region is one of the common types of the light emitting layer ([0049]). Response to Arguments Applicant’s amendments, filed 11/14/2025, overcome the objections to the drawings. The objections to the drawings have been withdrawn. Applicant’s amendments, filed 11/14/2025, partially overcome the rejections to claims 1-3 and 6 under 35 U.S.C. 112. The rejections to claims 1-3 and 6 under 35 U.S.C. 112 have been partially withdrawn. Please see the 112 rejections above for details. On page 8 of Applicant' s Response, Applicant argues that Huang fails to teach or suggest, "wherein the forming the first semiconductor region or the forming the second semiconductor region further comprises forming a volume of the first semiconductor region or another volume of the second semiconductor region based on a calculation so that an electron concentration in one of the first semiconductor region or the second semiconductor region substantially matches within a first set percentage a hole concentration in the one other one of the first semiconductor region or the second semiconductor region" as recited in claim 1, based on that Huang fails to teach or suggest intentionally forming volumes based on calculations to achieve the specific matching of carrier concentrations as recited in claim 1. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “intentionally forming volumes based on calculations to achieve the specific matching of carrier concentrations”) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hartensveld et al. (US 2020/0066786 A1) teach a LED having an active layer between a top semiconductor layer and a bottom semiconductor layer, where the width of the top semiconductor layer is wider than the width of the bottom semiconductor layer. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HSIN YI HSIEH whose telephone number is (571)270-3043. The examiner can normally be reached 8:30 - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra V Smith can be reached on 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HSIN YI HSIEH/Primary Examiner, Art Unit 2899 2/25/2026
Read full office action

Prosecution Timeline

Dec 30, 2021
Application Filed
May 13, 2025
Non-Final Rejection — §102, §103, §112
Nov 14, 2025
Response Filed
Feb 25, 2026
Final Rejection — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12550486
OPTOELECTRONIC DEVICE WITH AXIAL THREE-DIMENSIONAL LIGHT-EMITTING DIODES
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LIGHT EMITTING DIODE WITH OPTIMISED ELECTRIC INJECTION FROM A SIDE ELECTRODE
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Patent 12538617
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2y 5m to grant Granted Jan 27, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
51%
Grant Probability
57%
With Interview (+6.2%)
3y 10m
Median Time to Grant
Moderate
PTA Risk
Based on 631 resolved cases by this examiner. Grant probability derived from career allow rate.

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