DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 8/24/2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-4 and 18-24 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
(Re Claims 1 and 18) “the base layer” lacks antecedence.
During examination, “the base layer” was read as “the common base layer”.
Claims 2-4 and 19-24 inherit this rejection for lack of antecedence.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-4 are rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (US 2018/0083088), Lee (US 2018/0110122), Iwata et al. (US 2022/0393130), and Oda (US 2011/0096540) all of record, and Moon et al. (US 2021/0126081) newly cited.
(Re Claim 1) Bae teaches a display device comprising: a first substrate (110; Fig. 2) comprising a display area (DA; Fig. 1), and a non-display area (NDA; Fig. 1) on at least one side (top side; Fig. 1 and 2) of the display area; light emitting elements (PX; Fig. 1) in different respective rows and columns on a first surface (top surface; Fig. 2) of the first substrate in the display area (Fig. 1; ¶¶79-80), and comprising respective active layers (720; Fig. 6, ¶98); a connection electrode (P1; Fig. 1) on the first surface of the first substrate in the non-display area, and electrically connected (through the power lines PL; ¶¶78-79, 97) to the light emitting elements for receiving a constant voltage (Fig. 5) and for concurrently delivering the same constant voltage to the light emitting elements in the different respective rows and columns (Fig. 1 and 5; “the plurality of pixels PX may receive the first power voltage through the plurality of power supplying wires PL1-PLn”, ¶¶79); first pads (P2 and Pk-1; Fig. 1) in the non-display area and spaced from the connection electrode in a direction (to the right; Fig. 1); a second pad (P3; Fig. 1, ¶63) spaced from the connection electrode.
Bae has not been shown to explicitly teach a display device comprising:
the light emitting elements comprising respective first semiconductor layers, the respective active layers respectively on the first semiconductor layers, and commonly connected and integral second semiconductor layers respectively on the active layers;
the connection electrode electrically connected to the light emitting elements for receiving a constant voltage and for concurrently delivering a same constant voltage to the light emitting elements in different respective rows and columns via the second semiconductor layers commonly connected to each other; second pads spaced from the connection electrode in another direction; a circuit board on a second surface of the first substrate, and comprising a first circuit board pad and a second circuit board pad on a first surface of the circuit board; a first pad connection electrode connected to the first pads and the first circuit board pad, and comprising a first connection part in a first via hole corresponding to the first pads and passing through the first substrate, and a first electrode part on the second surface of the first substrate; and a second pad connection electrode connected to the second pads and the second circuit board pad, and comprising a second connection part in a second via hole corresponding to the second pads and passing through the first substrate, and a second electrode part on the second surface of the first substrate,
wherein the second semiconductor layers comprise a common base layer continuously located on the display area and the portion of the non-display area and a plurality of protruding parts protruding from the base layer and spaced from each other, wherein a thickness of each of the protruding parts is greater than a thickness of a portion of the base layer that does not overlap the first semiconductor layers.
Lee teaches a display device (Fig. 1A) comprising a circuit board (700; Fig. 1A) on a second surface (bottom surface; Fig. 3) of a first substrate (100; Fig. 3, ¶¶51, 71), and comprising a first circuit board pad (pad second from left side of 700; Fig. 1A) and a second circuit board pad (pad touching the leader for 750; Fig. 1A) on a first surface (top surface; Fig. 1A) of the circuit board;
a first pad connection electrode (conductive material filling via holes 510+410 that corresponds to the location of the first circuit board pad; Fig. 1A and 3; ¶106) connected to first pads (310 second from the left side of PA; Fig. 1A) and the first circuit board pad (Fig. 3), and comprising a first connection part (conductive material filling via hole 510 that corresponds to the location of the first circuit board pad) in a first via hole (510; Fig. 1A) corresponding to the first pads (Fig. 1A) and passing through the first substrate (Fig. 3), and a first electrode part (410 that corresponds to the location of the first circuit board pad; Fig. 3) on the second surface of the first substrate (Fig. 3); and
a second pad connection electrode (conductive material filling via holes 510+410 that correspond to the location of the second circuit board pad; Fig. 1A and 3, ¶106) connected to the second pads (310 to the right of the first pads; Fig. 1A) and the second circuit board pad (Fig. 1A and 3), and comprising a second connection part (conductive material filling via holes 510 that corresponds to the location of the second circuit board pad; Fig. 1A and 3) in a second via hole (510; Fig. 1A and 3) corresponding to the second pads (Fig. 1A and 3) and passing through the first substrate (Fig. 3) and a second electrode part (410 that corresponds to the location of the second circuit board pad) on the second surface of the first substrate (Fig. 3).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to implement connections between first and second pads, and first and second circuit board pads on a circuit board, as taught by Lee such that the first and second pads correspond to an immediately underlying first and second circuit board pad, in order to reduce an amount of dead space as compared to alternative circuit board connections in display panels (Lee: ¶73), and to achieve the predictable result of forming electrical connections to drive the light emitting elements of the display panel, allowing it to display images.
Furthermore, Lee teaches a configuration of pads in a pad area (PA; Fig. 17), including first and second pads (Fig. 17 markup).
A PHOSITA would find it obvious to implement the pad configuration of Lee as shown in Fig. 17 to reduce the required width of the underlying circuit board (Lee: ¶73), P1 of Bae remains as the connection electrode, while the first and second pads are located as shown in the Fig. 17 markup from Lee. The first pads are spaced from the connection electrode in a top to bottom direction, and the second pads are spaced from the connection electrode in a bottom to top direction.
Iwata teaches forming light emitting elements (XR, XB, and XG; Fig. 3) comprising respective first semiconductor layers (each respective 30 contains semiconductor particles; Fig. 3, ¶80), respective active layers (24G, 24B, and 24R; Fig. 3) respectively on the first semiconductor layers, and commonly connected second semiconductor layers (31, 32, and 33 each contain semiconductor particles; the second semiconductor layers are commonly connected through element 25; Fig. 3, ¶80) respectively on the active layers.
A PHOSITA would find it obvious to form the light emitting elements of modified Bae such that they have the first and second semiconductor layers taught by Iwata for each color (Bae: ¶91), arranged in the same order such that the active layer of modified Bae is between them, in order to suppress exciton deactivation and improve the efficiency of each light emitting element (Iwata: ¶¶59, 61, and 118).
Doing so results in the second semiconductor layers being commonly connected through Bae’s element 730 (¶98); and the second semiconductor layers are integral through their connections to each other through the pixel defining layer (Bae: 190; Fig. 6).
Oda teaches forming second semiconductor layers (the portions of 201 overlapping each individual 12; Fig. 1) such that they are continuously formed as one common layer (¶18).
A PHOSITA would find it obvious to form the second semiconductor layers of modified Bae such that they are formed continuously as one common layer as taught by Oda in order to make it easier to form the second semiconductor layers (Oda: ¶18).
Doing so results in modified Bae teaches the display device wherein the second semiconductor layers are continuously located on the display area (due to the second semiconductor layers being formed on the active layers of modified Bae) and a portion (the left half NDA in Bae’s Fig. 1) of the non-display area (neither contact nor a particular overlap is required by “located on…a portion of the non-display area”; it is enough for the second semiconductor layers to be on the non-display area) as one common layer (Oda: ¶18).
Moon shows a common base layer (Fig. 4, the part of 223 that is horizontal and covers only the topmost part of pixel defining layer 119+the topmost half of the remaining parts of 223;) continuously located on a display area (DA; Fig. 1) and a portion of a non-display area (PA; Fig. 1; neither contact nor a particular overlap is required by “located on…a portion of the non-display area), and a plurality of protruding parts (the remainder of 223; Fig. 4).
Moon also shows forming the base layer (Fig. 4) such that they follow the slope of a pixel defining layer (119; Fig. 4) after deposition, and so the thickness of the protruding greater than the horizontal part of the second semiconductor layer on the topmost part of the pixel defining layer.
A PHOSITA would find it obvious that when forming the second semiconductor layers continuously as taught by Oda, the second semiconductor layers will follow the slope of the pixel defining layer (190; Fig. 6) of Bae as taught by Moon. This results in a thickness of each of the protruding parts – taken in a direction from top to bottom as seen in Bae’s Fig. 6 – that is sloped along the angled sidewall of Bae’s pixel defining layer being greater than a thickness of a portion of the base layer (the part of the base layer that is horizontal along Bae’s pixel defining layer) that does not overlap the first semiconductor layers. Additionally, as the second semiconductor layers are formed continuously across the display area in view of Oda, the base layer will be continuously located on the display area and a portion (a left side portion) of the non-display area of modified Bae.
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(Re Claim 2) Modified Bae teaches the display device of claim 1, wherein a distance between one of the light emitting elements in an outermost part of the display area and the first pads is greater than a distance between the one of the light emitting elements in the outermost part of the display area and the second pads (Fig. 17 markup).
(Re Claim 3) Modified Bae teaches the display device of claim 1, wherein the first connection part directly contacts the first pads (Lee: Fig. 3), wherein the second connection part directly contacts the second pads (Lee; Fig. 3), wherein the first electrode part directly contacts the first circuit board pad (Lee; Fig. 3), and wherein the second electrode part directly contacts the second circuit board pad (Lee; Fig. 3).
(Re Claim 4) Modified Bae teaches the display device of claim 3, wherein the first electrode part of the first pad connection electrode and the first circuit board pad correspond to the first pads (as defined in claim 1 and shown in Lee’s Fig. 1A and 3), and wherein the second electrode part of the second pad connection electrode and the second circuit board pad correspond to the second pads (as defined in claim 1 and shown in Lee’s Fig. 1A and 3).
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (US 2018/0083088), Ryu et al. (US 2011/0291119), Lee (US 2018/0110122), Iwata et al. (US 2022/0393130, and Oda (US 2011/0096540), all of record, and Moon et al. (US 2021/0126081) newly cited.
(Re Claim 18) Bae teaches a display device comprising: a first substrate (110; Fig. 2) comprising a display area (DA; Fig. 1) in which light emitting elements (PX; Fig. 1) in different respective rows and columns are located, and a non-display area (NDA; Fig. 1) surrounding the display area, and the light emitting elements comprising respective active layers (720; Fig. 6, ¶98); common electrodes (P1 and Pk; Fig. 1) in the non-display area spaced apart from each other (Fig. 1), and electrically connected (through the power lines PL; ¶97) to the light emitting elements for receiving a constant voltage (Fig. 5) and for concurrently delivering the same constant voltage to the light emitting elements in the different respective rows and columns ((Fig. 1 and 5; “the plurality of pixels PX may receive the first power voltage through the plurality of power supplying wires PL1-PLn”, ¶¶79)); first pads (P2 and Pk-1; Fig. 1) outside the common electrodes in the non-display area; a circuit board on a second surface of the first substrate, which is opposite to a first surface of the first substrate on which the light emitting elements are located, and comprising first circuit board pads and second circuit board pads; first pad connection electrodes in first via holes passing through the first substrate and corresponding to the first pads, and respectively contacting the first pads and the first circuit board pads; and second pad connection electrodes in second via holes passing through the first substrate and corresponding to the second pads, and respectively contacting the second pads and the second circuit board pads.
Bae does not explicitly teach a display device comprising:
the light emitting elements comprising respective first semiconductor layers, the respective active layers respectively on the first semiconductor layers, and commonly connected and integral second semiconductor layers respectively on the active layers;
common electrodes in the non-display area to surround the display area, electrically connected to the light emitting elements for receiving a constant voltage and for concurrently delivering the same constant voltage to the light emitting elements in different respective rows and columns via the second semiconductor layers commonly connected to each other;
second pads between the common electrodes and the display area;
a circuit board on a second surface of the first substrate, which is opposite to a first surface of the first substrate on which the light emitting elements are located, and comprising first circuit board pads and second circuit board pads; first pad connection electrodes in first via holes passing through the first substrate and corresponding to the first pads, and respectively contacting the first pads and the first circuit board pads; and second pad connection electrodes in second via holes passing through the first substrate and corresponding to the second pads, and respectively contacting the second pads and the second circuit board pads,
wherein the second semiconductor layers comprise a common base layer continuously located on the display area and the portion of the non-display area and a plurality of protruding parts protruding from the base layer and spaced from each other, wherein a thickness of each of the protruding parts is greater than a thickness of a portion of the base layer that does not overlap the first semiconductor layers.
Lee teaches a display device (Fig. 1A) comprising a circuit board (700; Fig. 1A) on a second surface (bottom surface; Fig. 3) of a first substrate (100; Fig. 3, ¶¶51, 71), and comprising first circuit board pads (pad second from left side and right side of 700; Fig. 1A) and second circuit board pads (pad third from left side and right side of 700; Fig. 1A) on a first surface (top surface; Fig. 1A) of the circuit board;
first pad connection electrodes (conductive material filling via holes 510+410 that corresponds to the location of the first circuit board pads; Fig. 1A and 3; ¶106) in first via holes (510; Fig. 3) passing through the first substrate and corresponding to the first pads (Fig. 1A and 3), and respectively contacting the first pads and the first circuit board pads (Fig. 3); and
second pad connection electrodes (conductive material filling via holes 510+410 that corresponds to the location of the second circuit board pads; Fig. 1A and 3; ¶106) in second via holes (510; Fig. 3) passing through the first substrate and corresponding to the second pads (Fig. 1A and 3), and respectively contacting the second pads and the second circuit board pads (Fig. 3);
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to implement connections between first and second pads, and first and second circuit board pads on a circuit board, as taught by Lee such that the first and second pads correspond to an immediately underlying first and second circuit board pad, in order to reduce an amount of dead space as compared to alternative circuit board connections in display panels (Lee: ¶73), and to achieve the predictable result of forming electrical connections to drive the light emitting elements of the display panel, allowing it to display images.
Furthermore, Lee teaches a configuration of pads in a pad area (PA; Fig. 17), including first and second pads (Fig. 17 markup).
A PHOSITA would find it obvious to implement the pad configuration of Lee as shown in Fig. 17 to reduce the required width of the underlying circuit board (Lee: ¶73), P1 of Bae remains as the connection electrode, while the first and second pads are located as shown in the Fig. 17 markup from Lee. Second pads are then between the common electrodes and the display area.
Ryu teaches forming common electrodes (33+35; Fig. 2) in a non-display area (area outside of DA; Fig. 2) spaced apart from each other (Fig. 2) and electrically connected (through lines 31 and 32; Fig. 2) to the light emitting elements (12; Fig. 1) for receiving a constant voltage (“possible to uniformly apply driving power to the pixels” ¶79; “¶¶89, 111).
A PHOSITA would find it obvious to form common electrodes surrounding the display area of modified Bae, as taught by Ryu, to ensure luminance uniformity of the display region (Ryu: ¶27).
The common electrodes of modified Bae are then P1 and Pkt as seen in Bae’s Fig. 1, and each common electrode 33 and 35 disposed around the display area as taught by Ryu. This results in common electrodes in the non-display area that also surround the display area.
Iwata teaches forming light emitting elements (XR, XB, and XG; Fig. 3) comprising respective first semiconductor layers (each respective 30 contains semiconductor particles; Fig. 3, ¶80), respective active layers (24G, 24B, and 24R; Fig. 3) respectively on the first semiconductor layers, and commonly connected second semiconductor layers (31, 32, and 33 each contain semiconductor particles; the second semiconductor layers are commonly connected through element 25; Fig. 3, ¶80) respectively on the active layers.
A PHOSITA would find it obvious to form the light emitting elements of modified Bae such that they have the first and second semiconductor layers taught by Iwata for each color (Bae: ¶91), arranged in the same order such that the active layer of modified Bae is between them, in order to suppress exciton deactivation and improve the efficiency of each light emitting element (Iwata: ¶¶59, 61, and 118).
Doing so results in the second semiconductor layers being commonly connected through Bae’s element 730 (¶98); and the second semiconductor layers are integral through their connections to each other through the pixel defining layer (Bae: 190; Fig. 6).
Oda teaches forming second semiconductor layers (the portions of 201 overlapping each individual 12; Fig. 1) such that they are continuously formed as one common layer (¶18).
A PHOSITA would find it obvious to form the second semiconductor layers of modified Bae such that they are formed continuously as one common layer as taught by Oda in order to make it easier to form the second semiconductor layers (Oda: ¶18).
Doing so results in modified Bae teaches the display device wherein the second semiconductor layers are continuously located on the display area (due to the second semiconductor layers being formed on the active layers of modified Bae) and a portion (the left half NDA in Bae’s Fig. 1) of the non-display area (neither contact nor a particular overlap is required by “located on…a portion of the non-display area”; it is enough for the second semiconductor layers to be on the non-display area) as one common layer (Oda: ¶18).
Moon shows a common base layer (Fig. 4, the part of 223 that is horizontal and covers only the topmost part of pixel defining layer 119+the topmost half of the remaining parts of 223;) continuously located on a display area (DA; Fig. 1) and a portion of a non-display area (PA; Fig. 1; neither contact nor a particular overlap is required by “located on…a portion of the non-display area), and a plurality of protruding parts (the remainder of 223; Fig. 4).
Moon also shows forming the base layer (Fig. 4) such that they follow the slope of a pixel defining layer (119; Fig. 4) after deposition, and so the thickness of the protruding greater than the horizontal part of the second semiconductor layer on the topmost part of the pixel defining layer.
A PHOSITA would find it obvious that when forming the second semiconductor layers continuously as taught by Oda, the second semiconductor layers will follow the slope of the pixel defining layer (190; Fig. 6) of Bae as taught by Moon. This results in a thickness of each of the protruding parts – taken in a direction from top to bottom as seen in Bae’s Fig. 6 – that is sloped along the angled sidewall of Bae’s pixel defining layer being greater than a thickness of a portion of the base layer (the part of the base layer that is horizontal along Bae’s pixel defining layer) that does not overlap the first semiconductor layers. Additionally, as the second semiconductor layers are formed continuously across the display area in view of Oda, the base layer will be continuously located on the display area and a portion (a left side portion) of the non-display area of modified Bae.
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(Re Claim 19) Modified Bae teaches the display device of claim 18, wherein the light emitting elements are arranged in a first direction (left to right; Fig. 1), and in a second direction (top to bottom; Fig. 1) intersecting the first direction, wherein the first pads are spaced apart from at least some of the common electrodes in the first direction (Fig. 17 markup), and wherein the second pads are spaced apart from at least some of the common electrodes in a direction that is opposite to the first direction (right to left; Fig. 1).
(Re Claim 20) Modified Bae teaches the display device of claim 19, wherein at least some of the first pads are not located side by side with the second pads in the first direction (Fig. 17 markup).
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (US 2018/0083088), Ryu et al. (US 2011/0291119), Lee (US 2018/0110122), Iwata et al. (US 2022/0393130, and Oda (US 2011/0096540), all of record, and Moon et al. (US 2021/0126081) newly cited, and further in view of Yamazaki et al. (US 2007/0085938) of record.
(Re Claim 21) Modified Bae teaches the display device of claim 18, but does not explicitly teach the display device further comprising a heat dissipation layer overlapping the light emitting elements in the display area, and directly contacting the second surface of the first substrate.
Yamazaki teaches a display device (Fig. 28) comprising a heat dissipation layer (2812; Fig. 28) overlapping light emitting elements (2804+2805; ¶293) in a display area (3701; Fig. 11, ¶253), and directly contacting a second surface of the first substrate (“heat sink 2812 may be provided in contact with the TFT substrate 2800”; Fig. 28, ¶294).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to place a heat dissipation layer overlapping the light emitting elements in the display area of modified Bae, and directly contacting the second surface of the first substrate of Bae, as taught by Yamazaki, in order to increase heat dissipation of the display device of modified Bae (Yamazaki: ¶294).
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (US 2018/0083088), Ryu et al. (US 2011/0291119), Lee (US 2018/0110122), Yamazaki et al. (US 2007/0085938), and Iwata et al. (US 2022/0393130) all of record, and Oda (US 2011/0096540) newly cited, as applied to claim 21 above, and further in view of Tsai (US 2005/0180142) of record.
(Re Claim 22) Modified Bae teaches the display device of claim 21, but does not explicitly teach the display device further comprising heat dissipation patterns directly contacting the heat dissipation layer, and located in third via holes passing through the first substrate and corresponding to at least some of the light emitting elements.
Tsai teaches forming heat dissipation patterns (500; Fig. 3 and 4) directly contacting a heat dissipation layer (400; Fig. 3 and 4), located in via holes (12; Fig. 3 and 4) passing through a first substrate (10; Fig. 3 and 4, ¶23) and corresponding to at least some of the light emitting elements (20; Fig. 3 and 4, ¶23).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form heat dissipation patterns directly contacting the heat dissipation layer of modified Bae, located in third via holes passing through the first substrate of modified Bae and corresponding to at least some of the light emitting elements, in order to reduce the thermal resistance between the light emitting elements and heat dissipation layer of modified Bae (Tsai: ¶22).
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (US 2018/0083088), Lee (US 2018/0110122), Iwata et al. (US 2022/0393130), and Oda (US 2011/0096540) all of record, and Moon et al. (US 2021/0126081) newly cited, as applied to claim 1 above, and further in view of Liu et al. (US 2021/0210588) newly cited.
(Re Claim 23) Modified Bae teaches the display device of claim 1, further comprising a first connection electrode (710; Fig. 6) in contact with one light-emitting element (the light-emitting element as seen in Bae’s Fig. 6) of the light-emitting elements, and
wherein the second semiconductor layers are in contact (they are in electrical contact; “contact” alone does not preclude this type of contact) with the connection electrode (Fig. 6).
Modified Bae has not been explicitly shown to teach a length of the first connection electrode in a thickness direction the first substrate is smaller than a length of the connection electrode in the thickness direction.
Liu teaches forming a first connection electrode (1024; Fig. 11) with a length (e.g., 1250 Angstrom; ¶108) in a thickness direction of a first substrate (1011; Fig. 11) that is smaller than a length (e.g., 5000 Angstrom; ¶105) of a connection electrode (1021; Fig. 9) in the thickness direction (“Further, simultaneously forming the source 1018, the drain 1019, and the power line in the second metal layer by the fifth mask process and the fifth etching process.” (¶73); see also ¶105).
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). A PHOSITA would find it obvious to use the larger length values in the range taught by Liu to form the connection electrode to reduce the resistance of the connection electrode, reducing voltage losses over the total span of the connection electrode.
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (US 2018/0083088), Lee (US 2018/0110122), Iwata et al. (US 2022/0393130), and Oda (US 2011/0096540) all of record, and Moon et al. (US 2021/0126081) newly cited as applied to claim 1 above, and further in view of Yamazaki et al. (US 2007/0085938) of record.
(Re Claim 24) Modified Bae teaches the display device of claim 1, but has not been explicitly shown to teach the display device further comprising a heat dissipation substrate on a second surface of the circuit board and located in the display area and the non-display area, and wherein a thickness of a first portion the heat dissipation substrate which overlaps the circuit board is smaller than a thickness of a second portion of the heat dissipation substrate which does not overlap the circuit board
Yamazaki teaches a display device (Fig. 28) comprising a heat dissipation substrate (2812; Fig. 28) directly contacting a second surface of the first substrate (“heat sink 2812 may be provided in contact with the TFT substrate 2800”; Fig. 28, ¶294) and on a second surface (bottom surface) of a circuit board (2810; ¶294) and located in a display area (commensurate with the light-emitting elements (2804+2805; Fig. 28) and a non-display area (the part of the display to the left of 2804; Fig. 28), and
a thickness of a first portion (the portion underneath 2804; Fig. 28) the dissipation substrate which overlaps the circuit board is smaller than a thickness of a second portion (the vertical part of the heat dissipation substrate that curls around the circuit board; Fig. 28) that does not overlap the circuit board.
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to place a heat dissipation substrate overlapping the light emitting elements in the display area of modified Bae and extending into the non-display area, and directly contacting the second surface of the first substrate of Bae, as taught by Yamazaki, in order to increase heat dissipation of the display device of modified Bae (Yamazaki: ¶294). A PHOSITA would also find it obvious to curl the heat dissipation substrate of Yamazaki as taught to provide for a heat pipe to improve heat dissipation (Yamazaki: ¶294).
Response to Arguments
Applicant's arguments filed 8/24/2026 have been fully considered but are moot in view of the new rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher A Schodde whose telephone number is (571)270-1974. The examiner can normally be reached M-F 1000-1800 EST.
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/CHRISTOPHER A. SCHODDE/Examiner, Art Unit 2898
/ERIK T. K. PETERSON/Primary Examiner, Art Unit 2898
