DETAILED ACTION
This action is in response to the amendment filed 01/14/2026. Claims 1-16 and 18-21 are pending and have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: the comparator in claims 1 and 2. Regarding the comparator, in paragraph 0043, the specification states:
Thus, for example, any of the example communication interface 106, the example interface 110, the example tree-based decision circuitry 112, the example mode determination circuitry 114, the example interface(s) 200, the example logic circuitry 202, the example counter 204, and/or the example comparator 206, and/or, more generally, the example random forest circuitry 104 and/or the example tree-based decision circuitry 112 of FIGS. 1-2 could be implemented by one or more analog or digital circuit(s), logic circuits, programmable processor(s), programmable controller(s), graphics processing unit(s) (GPU(s)), digital signal processor(s) (DSP(s)), application specific integrated circuit(s) (ASIC(s)), programmable logic device(s) (PLD(s)) and/or field programmable logic device(s) (FPLD(s)). When reading any of the apparatus or system claims of this patent to cover a purely software and/or firmware implementation, at least one of the example communication interface 106, the example interface 110, the example tree-based decision circuitry 112, the example mode determination circuitry 114, the example interface(s) 200, the example logic circuitry 202, the example counter 204, and/or the example comparator 206, and/or, more generally, the example random forest circuitry 104 and/or the example tree- based decision circuitry 112 of FIGS. 1-2 is/are hereby expressly defined to include a non-transitory computer readable storage device or storage disk such as a memory, a digital versatile disk (DVD), a compact disk (CD), a Blu-ray disk, etc. including the software and/or firmware.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-4, 13-14, and 21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites the limitation "the updated outputted node identifier" in line 3. There is insufficient antecedent basis for this limitation in the claim. It is unclear as to what node identifier this updated outputted node identifier is referring to. For purposes of examination, Examiner has interpreted this outputted node identifier to be “the third updated node identifier or the fourth updated node identifier.”
Claim 4 is rejected at least for the same reasons as claim 3, since claim 4 depends on claim 3.
Claim 4 recites the limitation "the updated node identifier" in line 2. There is insufficient antecedent basis for this limitation in the claim. It is unclear as to what node identifier this updated node identifier is referring to. For purposes of examination, Examiner has interpreted this updated node identifier to be the same as the updated outputted node identifier from claim 3.
Claim 13 recites the limitation "the updated node identifier" in line 3. There is insufficient antecedent basis for this limitation in the claim. It is unclear as to what node identifier this updated node identifier is referring to. For purposes of examination, Examiner has interpreted this outputted node identifier to be “the third updated node identifier or the fourth updated node identifier”
Claim 13 recites the limitation “determine that the updated node identifier corresponding to a classification when the updated node identifier is a negative value.” It is unclear as to what is being determined as the negative value. For purposes of examination, Examiner has interpreted this limitation to be “determine that the updated node identifier corresponds to a classification when the updated node identifier is a negative value.”
Claim 14 is rejected at least for the same reasons as claim 13, since claim 14 depends on claim 13.
Claim 21 recites the limitation "a node identifier" in line 3. It is unclear as to whether this node identifier is the same as a previously stated node identifier from claim 1, or if this is a new node identifier. For purposes of examination, Examiner has interpreted this node identifier to be the same as the initial node identifier from claim 1.
Claim 21 recites the limitation "a first updated node identifier" in line 7. It is unclear as to whether this node identifier is the same as the previously stated first updated node identifier from claim 1, or if this is a new node identifier. For purposes of examination, Examiner has interpreted this node identifier to be the same as the first updated node identifier from claim 1.
Claim 21 recites the limitation "a second updated node identifier" in line 9. It is unclear as to whether this node identifier is the same as the previously stated second updated node identifier from claim 1, or if this is a new node identifier. For purposes of examination, Examiner has interpreted this node identifier to be the same as the second updated node identifier from claim 1.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-16 and 18-21 are rejected under 35 U.S.C. 101 because they are directed to an abstract idea without significantly more.
Regarding Claim 1:
Subject Matter Eligibility Analysis Step 1:
Claim 1 recites an apparatus and is thus a machine, one of the four statutory categories of patentable subject matter.
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 1 recites
compare the feature value to a threshold corresponding to the initial node identifier; (This limitation is a mental process as it encompasses a human mentally compare the feature value to a threshold.)
determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold (This limitation is a mental process as it encompasses a human mentally determining an updated node identifier based on the comparison.)
Therefore, claim 1 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 1 further recites additional elements of
An apparatus to implement a random forest (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Logic circuitry to for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array; (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
A comparator to compare the feature value to a threshold (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
The logic circuitry to compare the feature value to a threshold (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
the logic circuitry to use the updated node identifier for a second cycle. (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
a register to store the updated node identifier, after determining the updated node identifier (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
the logic circuitry to access the updated node identifier for a second cycle (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
Therefore, claim 1 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 1 do not provide significantly more than the abstract idea itself, taken alone and in combination because
An apparatus to implement a random forest uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Logic circuitry to for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93).
A comparator to compare the feature value to a threshold uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
The logic circuitry to compare the feature value to a threshold uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
a register to store an updated node identifier after determining the updated node identifier is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93).
the logic circuitry to access the updated node identifier for a second cycle is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93).
Therefore, claim 1 is subject-matter ineligible.
Regarding Claim 2:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 2 recites
for the second cycle, identify a second feature value corresponding to the updated node identifier; (This limitation is a mental process as it encompasses a human mentally identifying a second feature value.)
compare the second feature value to a second threshold corresponding to the updated node identifier (This limitation is a mental process as it encompasses a human mentally comparing the second feature value to a second threshold.)
Therefore, claim 2 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 2 further recites additional elements of
the logic circuitry to…identify a feature value (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
the comparator to compare the feature value to a threshold (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
the logic circuitry is to output (a) a third updated node identifier when the second feature value exceeds the second threshold or (b) a fourth updated node identifier when the second feature value is less than the second threshold. (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
Therefore, claim 2 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 2 do not provide significantly more than the abstract idea itself, taken alone and in combination because
the logic circuitry to…identify a feature value uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
the comparator to compare the feature value to a threshold uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
the logic circuitry is to output (a) a third updated node identifier when the second feature value exceeds the second threshold or (b) a fourth updated node identifier when the second feature value is less than the second threshold is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)).
Therefore, claim 2 is subject-matter ineligible.
Regarding Claim 3:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 3 recites
determine if the updated outputted node identifier is a value that corresponds to a leaf of a tree based on a value of the updated outputted node identifier. (This limitation is a mental process as it encompasses a human mentally determining if the outputted node identifier is a leaf of a tree.)
Therefore, claim 3 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 3 further recites additional elements of
the logic circuitry to determine if the outputted node identifier is a leaf of a tree (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Therefore, claim 3 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 3 do not provide significantly more than the abstract idea itself, taken alone and in combination because
the logic circuitry to determine if the outputted node identifier is a leaf of a tree uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Therefore, claim 3 is subject-matter ineligible.
Regarding Claim 4:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 4 recites the same abstract ideas as claim 3. Therefore, claim 4 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 4 further recites additional elements of
the logic circuitry is to output a classification for the input feature array based on the value of the updated node identifier when the updated node identifier is a value that corresponds to a leaf. (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
Therefore, claim 4 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 4 do not provide significantly more than the abstract idea itself, taken alone and in combination because
the logic circuitry is to output a classification for the input feature array based on the value of the outputted node identifier when the outputted node identifier is a leaf. is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)).
Therefore, claim 4 is subject-matter ineligible.
Regarding Claim 5:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 5 recites
wherein the first cycle and the second cycle correspond to a classification process (This limitation is a mental process as it encompasses a human mentally corresponding cycles to classification processes and performing the classification process.)
pause the classification process after the first cycle is complete (This limitation is a mental process as it encompasses a human mentally pausing a classification process.)
resume the classification process before the second cycle (This limitation is a mental process as it encompasses a human mentally resuming a classification process.)
Therefore, claim 5 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 5 further recites additional elements of
the logic circuitry to: pause the classification process (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
the register to maintain storage of the updated node identifier during the pause; (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
accessing the updated node identifier from the register. (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
Therefore, claim 5 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 5 do not provide significantly more than the abstract idea itself, taken alone and in combination because
the logic circuitry to: pause the classification process uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
the register to maintain storage of the updated node identifier during the pause is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93).
accessing the updated node identifier from the register is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)).
Therefore, claim 5 is subject-matter ineligible.
Regarding Claim 6:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 6 recites
a counter to increment a count corresponding to a number of cycles. (This limitation is a mental process as it encompasses a human mentally incrementing a mental counter.)
Therefore, claim 6 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 6 does not further recite any additional elements. Therefore, claim 6 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
Since there are no additional elements, claim 6 does not provide significantly more than the abstract idea itself, taken alone and in combination. Therefore, claim 6 is subject-matter ineligible.
Regarding Claim 7:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 7 recites
discard an output classification when the count exceeds a second threshold (This limitation is a mental process as it encompasses a human mentally discard an output classification.)
Therefore, claim 7 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 7 further recites additional elements of
the logic circuitry is to discard an output classification (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Therefore, claim 7 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 7 do not provide significantly more than the abstract idea itself, taken alone and in combination because
the logic circuitry is to discard an output classification uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Therefore, claim 7 is subject-matter ineligible.
Regarding Claim 8:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 8 recites
generate an output classification of the input feature array based on the updated node identifier. (This limitation is a mental process as it encompasses a human mentally generat an output classification of the input feature array.)
Therefore, claim 8 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 8 further recites additional elements of
the logic circuitry is to generate an output classification (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Therefore, claim 8 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 8 do not provide significantly more than the abstract idea itself, taken alone and in combination because
the logic circuitry is to generate an output classification uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Therefore, claim 8 is subject-matter ineligible.
Regarding Claim 9:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 9 recites
determine a final output classification based on a plurality of output classifications, the plurality of output classifications including the output classification generated (This limitation is a mental process as it encompasses a human mentally determine a final output classification.)
Therefore, claim 9 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 9 further recites additional elements of
mode determination circuitry to determine a final output (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
the output classification generated by the logic circuitry (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Therefore, claim 9 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 9 do not provide significantly more than the abstract idea itself, taken alone and in combination because
mode determination circuitry to determine a final output uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
the output classification generated by the logic circuitry uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Therefore, claim 9 is subject-matter ineligible.
Regarding Claim 10:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 10 recites the same abstract ideas as claim 1. Therefore, claim 10 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 10 further recites additional elements of
wherein a position of the feature value in the input feature array, the initial node identifier, the threshold, the first updated node identifier, and the second updated node identifier are included in the data structure, the data structure corresponding to a tree of a trained random forest. (This element does not integrate the abstract idea into a practical application because it recites a technological environment in which to apply a judicial exception (see MPEP 2106.05(h)).)
Therefore, claim 10 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 10 do not provide significantly more than the abstract idea itself, taken alone and in combination because
wherein a position of the feature value in the input feature array, the initial node identifier, the threshold, the first updated node identifier, and the second updated node identifier are included in the data structure, the data structure corresponding to a tree of a trained random forest specifies a particular technological environment to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(h)).
Therefore, claim 10 is subject-matter ineligible.
Regarding Claim 11:
Subject Matter Eligibility Analysis Step 1:
Claim 11 recites a non-transitory computer readable storage medium and is thus a product, one of the four statutory categories of patentable subject matter.
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 11 recites
compare the feature value to a threshold corresponding to the initial node identifier; (This limitation is a mental process as it encompasses a human mentally compare the feature value to a threshold.)
determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold (This limitation is a mental process as it encompasses a human mentally determining an updated node identifier based on the comparison.)
Therefore, claim 11 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 11 further recites additional elements of
A non-transitory computer readable storage medium comprising instructions, which, when executed, cause one or more processors to at least: …identify a feature value (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array; (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
store the updated node identifier after determining the updated node identifier (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
the updated node identifier is accessed for a second cycle (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
Therefore, claim 11 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 11 do not provide significantly more than the abstract idea itself, taken alone and in combination because
A non-transitory computer readable storage medium comprising instructions, which, when executed, cause one or more processors to at least: …identify a feature value uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93).
store an updated node identifier after determining the updated node identifier is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93).
the updated node identifier is accessed for a second cycle is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93).
Therefore, claim 11 is subject-matter ineligible.
Regarding claim 12, claim 12 recites substantially similar limitations to claim 2, and is therefore rejected under the same analysis.
Regarding Claim 13:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 13 recites
determine that the updated node identifier corresponding to a classification when the updated node is a negative value. (This limitation is a mental process as it encompasses a human mentally determining that the updated node corresponds to a classification when the updated node is a negative value.)
Therefore, claim 13 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 13 further recites additional elements of
The non-transitory computer readable storage medium of claim 12 wherein the instructions cause the one or more processors to (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Therefore, claim 13 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 13 do not provide significantly more than the abstract idea itself, taken alone and in combination because
The non-transitory computer readable storage medium of claim 12 wherein the instructions cause the one or more processors to uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Therefore, claim 13 is subject-matter ineligible.
Regarding claim 14, claim 14 recites substantially similar limitations to claim 4, and is therefore rejected under the same analysis.
Regarding claim 15, claim 15 recites substantially similar limitations to claim 5, and is therefore rejected under the same analysis.
Regarding Claim 16:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 16 recites
Increment a count corresponding to a number of cycles (This limitation is a mental process as it encompasses a human mentally incrementing a count.)
Discard an output classification when the count exceeds a second threshold (This limitation is a mental process as it encompasses a human mentally discarding an output.)
Therefore, claim 16 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 16 further recites additional elements of
The non-transitory computer readable storage medium of claim 11, wherein the instructions cause the one or more processors to (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Therefore, claim 16 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 16 do not provide significantly more than the abstract idea itself, taken alone and in combination because
The non-transitory computer readable storage medium of claim 11, wherein the instructions cause the one or more processors to uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Therefore, claim 16 is subject-matter ineligible.
Regarding claim 18, claim 18 recites substantially similar limitations to claim 8, and is therefore rejected under the same analysis.
Regarding claim 19, claim 19 recites substantially similar limitations to claim 9, and is therefore rejected under the same analysis.
Regarding Claim 20:
Subject Matter Eligibility Analysis Step 1:
Claim 20 recites an apparatus and is thus a machine, one of the four statutory categories of patentable subject matter.
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 20 recites
for a first cycle, identify a feature value corresponding to an initial node identifier of a data structure, the feature value included in an input feature array; (This limitation is a mental process as it encompasses a human mentally identifying a feature value.)
compare the feature value to a threshold corresponding to the initial node identifier; (This limitation is a mental process as it encompasses a human mentally compare the feature value to a threshold.)
determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold (This limitation is a mental process as it encompasses a human mentally determining an updated node identifier based on the comparison.)
Therefore, claim 20 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 20 further recites additional elements of
An apparatus to implement a random forest (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Memory; instructions included in the apparatus; and processor circuitry to execute the instructions (This element does not integrate the abstract idea into a practical application because it recites generic computing components on which to perform the abstract idea (see MPEP 2106.05(f)).)
Output a classification for the input feature array responsive to determining that the updated node identifier is a value that corresponds to the classification (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).)
Therefore, claim 20 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 20 do not provide significantly more than the abstract idea itself, taken alone and in combination because
An apparatus to implement a random forest uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Memory; instructions included in the apparatus; and processor circuitry to execute the instructions uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Output a classification for the input feature array responsive to determining that the updated node identifier is a value that corresponds to the classification is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)).
Therefore, claim 20 is subject-matter ineligible.
Regarding Claim 21:
Subject Matter Eligibility Analysis Step 2A Prong 1:
Claim 21 recites
Wherein the threshold is a first threshold (This limitation is a mental process as it further describes the mental process of comparing the feature value to a threshold as recited in claim 1.)
Therefore, claim 21 recites an abstract idea.
Subject Matter Eligibility Analysis Step 2A Prong 2:
Claim 21 further recites additional elements of
the data structure including: a node identifier; a feature identifier corresponding to the node identifier, the feature identifier corresponding to a first feature value in the input feature array; a second threshold corresponding to the node identifier; a first updated node identifier for the node identifier, the first updated node identifier corresponding to the first feature value satisfying the second threshold; and a second updated node identifier for the node identifier, the second updated node identifier corresponding to the first feature value not satisfying the second threshold. (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).)
Therefore, claim 21 is not integrated into a practical application.
Subject Matter Eligibility Analysis Step 2B:
The additional elements of claim 21 do not provide significantly more than the abstract idea itself, taken alone and in combination because
the data structure including: a node identifier; a feature identifier corresponding to the node identifier, the feature identifier corresponding to a first feature value in the input feature array; a second threshold corresponding to the node identifier; a first updated node identifier for the node identifier, the first updated node identifier corresponding to the first feature value satisfying the second threshold; and a second updated node identifier for the node identifier, the second updated node identifier corresponding to the first feature value not satisfying the second threshold uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)).
Therefore, claim 21 is subject-matter ineligible.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 8-13, 14, and 18-21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Fu et al. (US 2017/0255878 A1) (hereafter referred to as Fu).
Regarding claim 1, Fu teaches
An apparatus to implement a random forest, the apparatus comprising (Fu, page 14, paragraph 0003, “Embodiments of the invention relate generally to automata processors, and more specifically, to implementing Random Forests utilizing automata processors.”):
logic circuitry to, for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019). Examiner notes that the feature vector is the feature array. Examiner further notes that the logic circuitry is the processor. Additionally, the state of the automata processor is the initial node identifiers of a data structure);
a comparator to compare the feature value to a threshold corresponding to the initial node identifier (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the processor is the comparator and the threshold is the cut.);
the logic circuitry to determine an updated node identifier based on the comparison (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the previous state or next-state is the updated node identifier, and the logic circuitry is the processor)
the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold (Fu, page 18, paragraph 0059, “Each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met.” Examiner notes that the next-state is the first updated node identifier.)
or (b) a second updated node identifier when the feature value is below the threshold, (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met.” Examiner notes that the previous state is the second updated node identifier).
and a register to store the updated node identifier after determining the updated node identifier (Fu, page 19, paragraph 0063, “The Random forests model may be compiled, converted into a set of STEs (e.g., automata), and stored (e.g., within the system memory 26 and/or onboard of the processor 12) to be executed at run-time on the automata processor(s)” where “certain apparatus, including computational electronic devices and systems, may include a number of processing resources (e.g., one or more processors), which may retrieve and execute instructions and store the results of the executed instructions to a suitable location” (Fu, page 14, paragraph 0005).),
the logic circuitry to access the updated node identifier for a second cycle (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met. The automata processor(s) 30 may continue this learning process until a maximum depth or minimum error threshold is met.” Examiner notes that the previous state is the second updated node identifier, the logic circuitry is the processor, and continuing the learning process is the second cycle.)
Regarding claim 2, Fu teaches
The apparatus of claim 1, wherein:
the logic circuitry is to, for the second cycle, identify a second feature value corresponding to the updated node identifier (Fu, page 19, paragraph 0060, “the automata processor 30 may traverse a root-to-leaf path based on the values of the features of the input data” and Fu, FIG. 9
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Examiner notes that the logic circuitry is the processor and the second cycle is blocks 102, 106, and 108. Examiner further notes that the second feature value is f4.);
the comparator to compare the second feature value to a second threshold corresponding to the updated node identifier ( Fu, page 18, paragraph 0059, “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” and Fu, FIG 9
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Examiner notes that the comparator is the processor, the second feature value is f4, and the second threshold is 0.75.);
and the logic circuitry is to output (a) a third updated node identifier when the second feature value exceeds the second threshold or (b) a fourth updated node identifier when the second feature value is less than the second threshold (Fu, page 18, paragraph 0059, “The processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met. Similarly, each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met.” Examiner notes that the logic circuitry is the processor. Examiner further notes that the next-state is the third updated node identifier and the previous state is the fourth updated node identifier.).
Regarding claim 3, Fu teaches
The apparatus of claim 2, wherein the logic circuitry is to determine if the updated outputted node identifier is a value that corresponds to a leaf of a tree based on a value of the outputted node identifier (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the logic circuitry is the processor, and the classification node is the updated outputted node identifier with the value of “Class 2”.).
Regarding claim 4, Fu teaches
The apparatus of claim 3, wherein the logic circuitry is to output a classification for the input feature array based on the value of the updated node identifier when the updated node identifier is a value that corresponds to a leaf (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the logic circuitry is the processor and the classification node is the outputted node identifier with the value of “Class 2”.).
Regarding claim 8, Fu teaches,
The apparatus of claim 1, wherein the logic circuitry is to generate an output classification of the input feature array based on the updated node identifier (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the logic circuitry is the processor and the classification node is the outputted node identifier.).
Regarding claim 9, Fu teaches
The apparatus of claim 8, further including mode determination circuitry to determine a final output classification based on a plurality of output classifications, the plurality of output classifications including the output classification generated by the logic circuitry (Fu, page 19, paragraph 0066, “The processor 12 may post-process the classifications from each decision tree 150 (e.g., “T1”), 152 (e.g., “T2”), 154 (e.g., “T3”), 156 (e.g., “T4”) to generate the final classification of the input data. For example, the processor may apply, for example, a majority-consensus model (e.g., a majority voting technique to identify a final classification of the input data.” Examiner notes that the final classification is the final output classification, and the processor is the mode determination circuitry.).
Regarding claim 10, Fu teaches
The apparatus of claim 1, wherein a position of the feature value in the input feature array, the initial node identifier, the threshold, the first updated node identifier, and the second updated node identifier are included in the data structure, the data structure corresponding to a tree of a trained random forest (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019) and where “The processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met. Similarly, each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” (Fu, page 18, paragraph 0059) and Fu, FIG 9
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Examiner notes that the position of the feature value is the number associated with the feature, and the feature vector is the feature array. Examiner further notes that the logic circuitry is the processor. Additionally, the state of the automata processor is the initial node identifiers of a data structure. Examiner further notes that the first updated node identifier is the state associated with block 102 of FIG 9 and the second updated node identifier is the state associated with block 104 in FIG 9. ).
Regarding claim 11, Fu teaches
A non-transitory computer readable storage medium comprising instructions, which, when executed, cause one or more processors to at least: …identify a feature value (Fu, page 15, paragraph 0026, “In certain embodiments, such as where the processor 12 may be used to control the functioning of the processor-based system 10 by executing instructions, a system memory 26 may be used to allow the processor 12 to efficiently carry out its functionality. As depicted, the system memory 26 may be coupled to the processor 12 to store and facilitate execution of various instructions…. The system memory 26 may also include nonvolatile memory such as, for example, read-only memory (ROM), EEPROM, NAND flash memory, NOR flash memory, phase change random access memory (PCRAM), resistive random access memory (RRAM), magnetoresistive random access memory (MRAM), and/or spin torque transfer random access memory (STT RAM).”):
for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019). Examiner notes that the feature vector is the feature array. Additionally, the state of the automata processor is the initial node identifiers of a data structure);
compare the feature value to a threshold corresponding to the initial node identifier (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the threshold is the cut.);
determine an updated node identifier based on the comparison (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the previous state or next-state is the updated node identifier.)
the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold (Fu, page 18, paragraph 0059, “Each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met.” Examiner notes that the next-state is the first updated node identifier.)
or (b) a second updated node identifier when the feature value is below the threshold, (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met.” Examiner notes that the previous state is the second updated node identifier).
store the updated node identifier after determining the updated node identifier (Fu, page 19, paragraph 0063, “The Random forests model may be compiled, converted into a set of STEs (e.g., automata), and stored (e.g., within the system memory 26 and/or onboard of the processor 12) to be executed at run-time on the automata processor(s)” where “certain apparatus, including computational electronic devices and systems, may include a number of processing resources (e.g., one or more processors), which may retrieve and execute instructions and store the results of the executed instructions to a suitable location.”),
the updated node identifier accessed for a second cycle (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met. The automata processor(s) 30 may continue this learning process until a maximum depth or minimum error threshold is met.” Examiner notes that the previous state is the second updated node identifier, the logic circuitry is the processor, and continuing the learning process is the second cycle.)
Regarding claim 12, claim 12 recites substantially similar limitations to claim 2, and is therefore rejected under the same analysis.
Regarding claim 14, claim 14 recites substantially similar limitations to claim 4, and is therefore rejected under the same analysis.
Regarding claim 18, claim 18 recites substantially similar limitations to claim 8, and is therefore rejected under the same analysis.
Regarding claim 19, claim 19 recites substantially similar limitations to claim 9, and is therefore rejected under the same analysis.
Regarding claim 20, Fu teaches
An apparatus to implement a random forest, the apparatus comprising: memory; instructions included in the apparatus; and processor circuitry to execute the instructions to; (Fu, page 14, paragraph 0003, “Embodiments of the invention relate generally to automata processors, and more specifically, to implementing Random Forests utilizing automata processors” where “In certain embodiments, such as where the processor 12 may be used to control the functioning of the processor-based system 10 by executing instructions, a system memory 26 may be used to allow the processor 12 to efficiently carry out its functionality. As depicted, the system memory 26 may be coupled to the processor 12 to store and facilitate execution of various instructions” (Fu, page 15, paragraph 0026).):
for a first cycle, identify a feature value corresponding to an initial node identifier of a data structure, the feature value included in an input feature array (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019). Examiner notes that the feature vector is the feature array. Additionally, the state of the automata processor is the initial node identifiers of a data structure);
compare the feature value to a threshold corresponding to the initial node identifier (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the threshold is the cut.);
determine an updated node identifier based on the comparison (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the previous state or next-state is the updated node identifier, and the logic circuitry is the processor)
the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold (Fu, page 18, paragraph 0059, “Each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met.” Examiner notes that the next-state is the first updated node identifier.)
or (b) a second updated node identifier when the feature value is below the threshold, the updated node identifier used for a second cycle (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met.” Examiner notes that the previous state is the second updated node identifier).
Output a classification for the input feature array responsive to determining that the updated node identifier is a value that corresponds to the classification (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “An output vector of the automata processor(s) 30 identifies the classifications 159 (e.g., C0, C1, C2, …,#,…). The processor 12 may post-process the classifications from each decision tree 150 (e.g., “T1”), 152 (e.g., “T2”), 154 (e.g., “T3”), 156 (e.g., “T4”) to generate the final classification of the input data. ” (Fu, page 18, paragraph 0059). Examiner notes that the classification node is the updated node identifier with the classification of “Class 2”.)
Regarding claim 21, Fu teaches
The apparatus of claim 1, wherein the threshold is a first threshold (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the threshold is the cut.),
the data structure including: a node identifier (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019).. Examiner notes the state of the automata processor is the initial node identifiers of a data structure);
a feature identifier corresponding to the node identifier, the feature identifier corresponding to a first feature value in the input feature array (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019). Examiner notes that a feature value is the feature identifiers and the feature vector is the feature array. Examiner further notes that the logic circuitry is the processor. Additionally, the state of the automata processor is the initial node identifiers of a data structure);
a second threshold corresponding to the node identifier (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the second threshold is the cut.);
a first updated node identifier for the node identifier, the first updated node identifier corresponding to the first feature value satisfying the second threshold (Fu, page 18, paragraph 0059, “Each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met.” Examiner notes that the next-state is the first updated node identifier.);
and a second updated node identifier for the node identifier, the second updated node identifier corresponding to the first feature value not satisfying the second threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met.” Examiner notes that the previous state is the second updated node identifier).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 5 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu in view of Mitchell et al. (“Accelerating the XGBoost Algorithm Using GPU Computing”) (hereafter referred to as Mitchell).
Regarding claim 5, Fu teaches
The apparatus of claim 2, wherein the first cycle and the second cycle correspond to a classification process (Fu, page 18, paragraph 0060, “An automata processor 30 may calculate a classification of the input data (e.g., feature vector 98) utilizing the decision tree 96.”)
Fu does not teach, but Mitchell does teach
the logic circuitry to: pause the classification process after the first cycle is complete (Mitchell, page 23, Algorithm 7,
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384
409
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Greyscale
Where “the purpose of this paper is to describe how to efficiently implement decision tree learning for XGBoost on a GPU. GPUs can be thought of at a high level as having a shared memory architecture with multiple SIMD (single instruction multiple data) processors” (Mitchell, page 9, lines 185-187). Examiner notes that line 9 pauses the process after the first cycle to store the best split and the logic circuitry is the GPU.),
the register to maintain storage of the updated node identifier during the pause (Mitchell, page 23, Algorithm 7,
PNG
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384
409
media_image2.png
Greyscale
Where “the purpose of this paper is to describe how to efficiently implement decision tree learning for XGBoost on a GPU. GPUs can be thought of at a high level as having a shared memory architecture with multiple SIMD (single instruction multiple data) processors” (Mitchell, page 9, lines 185-187). Examiner notes that line 9 maintains the storage of the updated node identifier during the pause, in which the updated node identifiers are the input tiles.);
and resume the classification process before the second cycle by accessing the updated node identifier from the register (Mitchell, page 23, Algorithm 7,
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384
409
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Greyscale
And Mitchell, page 21, Algorithm 6,
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259
622
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Greyscale
Examiner notes that line 7 through line 10 is a cycle in Algorithm 7. Examiner further notes that the process in line 6 in Algorithm 7 is shown in Algorithm 6, in which line 5 of Algorithm 7 and the whole of Algorithm 6 show the process of accessing the updated node classifier from the register. Examiner additionally notes that the input tiles are the updated node identifiers.).
Fu and Mitchell are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to pause the classification process as in Mitchell. Doing so is advantageous because “GPUs are an effective tool for accelerating the gradient boosting process and can provide significant speed advantages” (Mitchell, page 3, lines 35-36).
Regarding claim 15, claim 15 recites substantially similar limitations to claim 5, and is therefore rejected under the same analysis.
Claim(s) 6-7 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu in view of Ahuja et al. (“US 2023/0075424 A1”) (hereafter referred to as Ahuja).
Regarding claim 6, Fu teaches the method of claim 1. Fu does not teach, but Ahuja does teach
further including a counter to increment a count corresponding to a number of cycles (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached.”).
Fu and Ahuja are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to have a counter as int Ahuja. Doing so is advantageous because “this allows for a simplified decision tree processing system to be implemented that eliminates the need of storing the history of all the paths and, thus, can have a high throughput” (Ahuja, page 10, paragraph 0026).
Regarding claim 7, Fu teaches the method of claim 6. Fu does not teach, but Ahuja does teach
wherein the logic circuitry is to discard an output classification when the count exceeds a second threshold (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached. A final decision may be reached when the decision tree processes all its levels and arrives at a specific leaf node, where the value(s) of the specific leaf node are the decision for the respective decision tree. The system 400 can be reset once the level counter ‘L’ is greater the total number of levels in the decision tree” where “methods and functions may be performed by modules or engines, both of which may include one or more physical components of a computing device (e.g., logic circuits, processors, controllers, etc.)” (Ahuja, page 8 paragraph 0012). Examiner notes that by resetting the system, an output classification is discarded.).
Fu and Ahuja are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to have a counter as int Ahuja. Doing so is advantageous because “this allows for a simplified decision tree processing system to be implemented that eliminates the need of storing the history of all the paths and, thus, can have a high throughput” (Ahuja, page 10, paragraph 0026).
Regarding claim 16, Fu teaches the non-transitory computer readable storage medium of claim 11. Fu does not teach, but Ahuja does teach
increment a count corresponding to a number of cycles (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached.”).
and discard an output classification when the count exceeds a second threshold (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached. A final decision may be reached when the decision tree processes all its levels and arrives at a specific leaf node, where the value(s) of the specific leaf node are the decision for the respective decision tree. The system 400 can be reset once the level counter ‘L’ is greater the total number of levels in the decision tree” where “methods and functions may be performed by modules or engines, both of which may include one or more physical components of a computing device (e.g., logic circuits, processors, controllers, etc.)” (Ahuja, page 8 paragraph 0012). Examiner notes that by resetting the system, an output classification is discarded.).
Fu and Ahuja are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to have a counter as int Ahuja. Doing so is advantageous because “this allows for a simplified decision tree processing system to be implemented that eliminates the need of storing the history of all the paths and, thus, can have a high throughput” (Ahuja, page 10, paragraph 0026).
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu in view of Lefkofsky et al. (“US 2020/0211716 A1”) (hereafter referred to as Lefkofsky).
Regarding claim 13, Fu teaches the non-transitory computer readable storage medium of claim 12. Fu does not teach, but Lefkofsky does teach
wherein the instruction cause the one or more processors to determine that the updated node identifier corresponding to a classification when the updated node identifier is a negative value (Lefkofsky, page 58, paragraph 0240, “In other cases leaf nodes may also generate low negative values for the difference of “prediction minus target”; for example, a prediction minus target may be [0.05-1 ]= -0.95, which would indicate that the patient’s condition would be unlikely to progress but in some instance it may still progress” and “The processing device 3402 is configured to execute instructions 3422 for performing the operations and steps discussed herein” (Lefkofsky, page 63, paragraph 0295). Examiner notes that the leaf is the updated node identifier, and the classification is the indication that the patient’s condition would be unlikely to progress.)
Fu and Lefkofsky are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to use negative values. Doing so is advantageous because it “enable[s] deeper exploration of the change in feature importance with varying feature value”.
Response to Arguments
The objection to the specification has been withdrawn in light of the instant amendments.
The objections to the claims has been withdrawn in light of the instant amendments
On pages 9-10, Applicant argues:
The Office action interprets the claim limitation "comparator" of claims 1 and 2 under 35 U.S.C. § 112(f). However, because claims 1 and 2 are not "means plus function" claims, 35 U.S.C. § 112(f) does not apply. Accordingly, the applicant respectfully traverses the Office's interpretation of claims 1 and 2 under 35 U.S.C. § 112(f).
It is well established that "a claim limitation that does not use the phrase 'means for' or 'step for' will trigger the rebuttable presumption that 35 U.S.C. 112(f) does not apply." See M.P .E.P § 2181 (I). In the instant application, none of the pending claims includes the phrases "means for" or "step for" and, thus, it is presumed that 35 U.S.C. 112(f) does not apply to any of the pending claims. Moreover, "[t]his presumption is a strong one that is not readily overcome," but "may be overcome if the claim limitation is shown to use a non-structural term that is 'a nonce word or a verbal construct that is not recognized as the name of structure' but is merely a substitute for the term 'means for,' associated with functional language." Id. (internal citations omitted). In the instant application, the strong presumption that 35 U.S.C. 112(f) does not apply is not overcome with respect to any of the pending claims because none of the claims use nonce words or verbal constructs that are substitutes for "means for" language.
The term "comparator" in pending claims 1 and 2 does not invoke 35 U.S.C. 112(f) because a "comparator" denotes a type of structural device with a generally understood meaning to a person of ordinary skill in the art. For example, at least FIG. 2 and paragraph [0038] of the specification describe particular example structural implementations of the "comparator." In view of the structural meaning of the foregoing claim elements, the presumption that 35 U.S.C. 112(f) does not apply to any of the pending claims holds. Accordingly, it is improper for the Office to invoke 35 U.S.C. 112(f) when interpreting the pending claims.
Regarding the Applicant’s argument that “the comparator” does not invoke 35 U.S.C 112(f), the Examiner respectfully disagrees. Specifically, Examiner respectfully notes that the “means plus function” is the limitation of “the comparator to compare”. Examiner further notes that it is unclear as what the comparator’s structure is beyond what is supplied in paragraph [0043] of the specification. For example, the broadest reasonable interpretation of comparator encompasses an organization, activity, etc. that is used to judge the performance of another similar organization or activity as defined by dictionary.cambridge.org. Alternatively, when narrowing the scope of a comparator to electronics, a comparator encompasses an electronic circuit that compares two voltages or electrical currents as defined by dictionary.cambridge.org. However, the claims do not recite voltages nor currents and therefore, the structure of the comparator is not generally understood by a person of ordinary skill in the art. For this reason, “the comparator to compare” invokes 35 U.S.C 112(f). Examiner respectfully notes that while Figure 2 depicts a comparator and paragraph [0038] describes how a comparator is used, Figure 2 nor paragraph [0038] define the structure of a comparator as a person of ordinary skill in the art would understand it. As such, the comparator has been interpreted to have the structure supplied in paragraph [0043] of the specification such that a comparator is implemented by a circuit or processor.
On page 10, Applicant argues
The Office action rejected claims 3, 4, 13, and 14 under 35 U.S.C. § l 12(b) for allegedly being indefinite. However, the rejection is moot in view of the amendments to claims 3, 4, 13, and 14. Reconsideration is respectfully requested.
Regarding the applicant’s argument that the 112(b) rejections have been overcome, Examiner respectfully disagrees. Specifically, Examiner notes that "the updated outputted node identifier" in line 3 of claim 3 and "the updated node identifier" in line 3 of claim 13 remain unclear. Examiner further respectfully notes that additional 112(b) rejections have been made in light of the instant amendments. Examiner respectfully points the applicant to the above 112(b) rejections.
On pages 11-12, Applicant argues:
Independent claim 1 does not recite a judicial exception and, thus, satisfies Prong One of Revised Step 2A of the test outlined in the 2019 Eligibility Guidance and the 2024 Update on Patent Subject Matter Eligibility. In the recent decision from the Patent Trial and Appeal Board, Ex parte Guillaume Desjardins et al., No. 2024-000567 (P.T.A.B. Sept. 26, 2025) (hereinafter "Desjardins"), Director Squires re-emphasized the difference between a claim involving an abstract idea and a claim directed to an abstract idea.
According to Alice, "[ w ]e must first determine whether the claims at issue are directed to a patent-ineligible concept." Id at 218 (emphasis added).
Under Alice step one, we consider whether the
claims at issue are directed to patent-ineligible
subject matter, here, an abstract idea. This "directed
to" inquiry does more than "simply ask whether the
claims involve a patent-ineligible concept." Enfish,
LLC v. Microsoft Corp., 822 F.3d 1327, 1335 (Fed.
Cir. 2016) (emphasis in original). Instead, we must
look to the character of the claims as a whole to
determine whether they are "directed to" patent
ineligible subject matter. Id
AI Visualize, Inc. v. Nuance Commc'ns, Inc., 97 F.4th 1371, 1378 (Fed. Cir. 2024).
Desjardins at§ II(C), pages 4-5. Here, claim 1 is in no way directed to an abstract idea.
Like the claims at issue in Desjardins, claim 1 is directed to patent eligible subject
matter. For example, as described below, the originally filed specification discloses improvements to the problem of excessive resources needed to implement a traditional random forest classifier. Specification at paragraph [0015]. Claim 1 reflects the disclosed improvements, which include "logic circuitry to, for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array; a comparator to compare the feature value to a threshold corresponding to the initial node identifier; and the logic circuitry to determine an updated node identifier based on the comparison, the updated node identifier being ( a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold; and a register to store the updated node identifier after determining the updated node identifier, the logic circuitry to access the updated node identifier for a second cycle." Thus, following the same reasoning presented by Director Squires in Desjardins, claim 1 is patent eligible. The other independent claims are similarly statutory. Thus, the§ 101 rejections must be withdrawn.
Regarding the Applicant’s argument that claim 1 does not recite a judicial exception, the Examiner respectfully disagrees. Specifically, Examiner respectfully notes that the limitations of “compare the feature value to a threshold corresponding to the initial node identifier” and “determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold” are mental processes. Examiner further notes that the process of claim 1 is directed to the comparing feature values to thresholds and determining an update based on the comparison. Examiner additionally respectfully notes that a claim that requires a computer may still recite a mental process (MPEP 2106.04(a)(2)(III)(C)).
On pages 13-14, Applicant argues:
The specification teaches utilizing "a data structure to implement a random forest classifier with less resources than a traditional random forest classifier" Id at paragraph [0016] (emphasis added). Further, the specification teaches that "complementary logic to translate a random forest into a flat format (e.g., all decisions correspond to a single self-contained structure and do not require external references to implement), thereby allowing for a complex forest algorithm to be implemented in a resource limited system." Id. (emphasis added). Thus, the specification teaches that "random forest classifiers can be utilized in limited resource systems, whereas the amount of resources to implement a traditional random forest can be insufficient and/or impractical to implement in such limited resource systems." Id at paragraph [0023]. As such, at least the foregoing portions of the specification provide sufficient details such that one of ordinary skill in the art would recognize claim 1 as providing an improvement.
Additionally, the MPEP instructs that after the specification has been consulted and it has been "determined that the disclosed invention improves technology, the claim must be evaluated to ensure the claim itself reflects the disclosed improvement in technology" which includes determining whether the claim "include[s] the components or steps of the invention that provide the improvement described in the specification." MPEP at§ 2106.0S(a) (citing Intellectual Ventures I LLC v. Symantec Corp., 838 F.3d 1307, 1316 (Fed. Cir. 2016)) (noting that "the claim itself does not need to explicitly recite the improvement described in the specification"). The above-described improvements are reflected in claim 1 which recites "logic circuitry to, for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array; a comparator to compare the feature value to a threshold corresponding to the initial node identifier; and the logic circuitry to determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold; and a register to store the updated node identifier after determining the updated node identifier, the logic circuitry to access the updated node identifier for a second cycle." Thus, claim 1 reflects the disclosed improvement in technology.
Regarding the Applicant’s argument that claim 1 recites a specific improvement, Examiner respectfully disagrees. Specifically, Examiner respectfully notes that the improvements in paragraph [0016] of the specification are not reflected in claim 1. Specifically, claim 1 does not reflect “the table of information that corresponds to a decision tree to exercise every path in a tree through a pseudo regression model.” Examiner additionally notes that the claims do not reflect “leverag[ing] the data structure with complementary logic to translate a random forest into a flat format…thereby allowing for a complex forest algorithm to be implemented in a resource limited system.” Since the claims do not reflect the improvements to the technology, the claims do not recite a specific improvement (MPEP 2106.04(d)(1)).
On pages 16-17, Applicant argues:
In the instant application, the originally filed specification teaches that "in limited resource systems, the amount of resources to implement a traditional random forest can be insufficient and/or impractical to implement" because "traditional random forest classifiers include a plurality of decision trees that include if-else statements or static evaluators." Specification at paragraph [0015]. To address the issues of traditional random forest classifiers, the originally filed specification teaches "a data structure to implement a random forest classifier with less resources than a traditional random forest classifier." Id at paragraph [0025]. The originally filed specification teaches that leveraging "the data structure with complementary logic to translate a random forest into a flat format (e.g., all decisions correspond to a single self-contained structure and do not require external references to implement), thereby allowing for a complex forest algorithm to be implemented in a resource limited system." Id at paragraph [0016] (emphasis added). As such, the originally filed specification teaches how random forest data structure and corresponding logic implementing disclosed techniques provides an improvement to traditional random forest classifiers.
Additionally, claim 1 recites a specific implementation to achieve the improvements described in the specification. For example, claim 1 recites a "logic circuitry to, for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array; a comparator to compare the feature value to a threshold corresponding to the initial node identifier; and the logic circuitry to determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold; and a register to store the updated node identifier after determining the updated node identifier, the logic circuitry to access the updated node identifier for a second cycle." As such, even assuming claim 1 recites an abstract idea (it does not), claim 1 amounts to significantly more than the abstract idea as demonstrated under the analysis of McRO outlined in MPEP § 2106.05(a)(II). Accordingly, claim 1 is patent eligible under Step 2B of the subject matter eligibility analysis sets forth in§ 2106 of the MPEP.
Regarding the Applicant’s argument that claim 1 recites a specific implementation to achieve an improvement, Examiner respectfully disagrees. Specifically, Examiner respectfully notes that the improvements in paragraph [0015] of the specification are further described in paragraph [0016] of the specification, but are not reflected in the claims. Specifically, claim 1 does not reflect “the table of information that corresponds to a decision tree to exercise every path in a tree through a pseudo regression model” (instant specification, [0016]). Examiner additionally notes that the claims do not reflect “leverag[ing] the data structure with complementary logic to translate a random forest into a flat format…thereby allowing for a complex forest algorithm to be implemented in a resource limited system” (instant specification, [0016]). Since the claims do not reflect the improvements to the technology, the claims do not recite a specific improvement (MPEP 2106.04(d)(1)). Examiner further respectfully notes that paragraph 0025 of the specification does not have the quotation “a data structure to implement a random forest classifier with less resources than a traditional random forest classifier.” This quotation is from paragraph [0016] of the instant specification. Examiner recommends amending the claims to further reflect the improvements described in the specification.
On page 17, Applicant argues:
Thus, independent claim 1 and all claims depending therefrom are directed to statutory subject matter in compliance with 35 USC§ 101 under the subject matter eligibility analysis set forth in§ 2106 of the MPEP. Likewise, independent claims 11 and 20, and all claims depending respectively therefrom, set forth patent eligible subject matter under the subject matter eligibility analysis set forth in§ 2106 of the MPEP. Therefore, withdrawal of the§ 101 rejections of independent claims 1, 11, and 20, and all claims depending respectively therefrom, is respectfully requested.
Regarding the Applicant’s argument that the dependent claims are allowable at least due in part to their dependency on the independent claims, the Examiner respectfully disagrees and notes the instant rejections and response to arguments regarding the independent claims above.
On pages 17-18, Applicant argues:
Fu mentions "Random Forest models composed of, for example, a number of binary decision trees." Fu, paragraph [0058]. Fu further mentions that "the random forest models may be ... stored." Id at paragraph [0063] However, Fu does not teach or suggest determining an updated node identifier, storing an updated node identifier after determining the updated node identifier, or accessing the updated node identifier for a second cycle. In fact, there is no need for Fu to use node identifiers because Fu uses a traditional random forest model composed of binary decision trees and not a data structure. Accordingly, after a comparison of a node of the traditional random forest model of Fu, the processor moves on to the next binary decision based on the structure of the traditional random forest and determining an updated no identifier is not needed.
Regarding the Applicant’s argument that Fu does not teach “node identifiers”, Examiner respectfully disagrees. Specifically, Examiner notes that the broadest reasonable interpretation of node identifiers encompasses any form of identification for a node. As such, Fu’s identification of the state of the automata which processes nodes is a node identifier. Fu further stores the state of the automata after updating the state (Fu, page 19, paragraph 0063; Fu, page 14, paragraph 0005) and accesses the state of the automata to execute a second cycle (Fu, page 18, paragraph 0059). Examiner respectfully points the Applicant to the above 102 rejections.
On page 18, Applicant argues:
Additionally, the Office action alleges that the storing of a random forest model in Fu teaches or suggests storing an updated node identifier. Office action, p. 27. However, the random forest model in Fu does not include updated node identifiers. Even if the Examiner assumes that the random forest model includes node identifiers (which is not taught or suggested in Fu), it is impossible for Fu to store an updated node identifier after determining the updated node identifier based on the comparison, because you cannot make a comparison in Fu without first storing the random forest model. Thus, Fu does not teach or suggest an apparatus comprising "logic circuitry to determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold" and "a register to store the updated node identifier after determining the updated node identifier, the logic circuitry to access the updated node identifier for a second cycle," as set forth in claim 1. Therefore, claim 1 and all claims depending therefrom are allowable over Fu.
Regarding the Applicant’s argument that the prior art does not disclose “a register to store the updated node identifier after determining the updated node identifier”, Examiner respectfully disagrees. Specifically, Fu teaches this (Fu, page 19, paragraph 0063, “The Random forests model may be compiled, converted into a set of STEs (e.g., automata), and stored (e.g., within the system memory 26 and/or onboard of the processor 12) to be executed at run-time on the automata processor(s)” where “certain apparatus, including computational electronic devices and systems, may include a number of processing resources (e.g., one or more processors), which may retrieve and execute instructions and store the results of the executed instructions to a suitable location” (Fu, page 14, paragraph 0005).). Examiner notes that the updated node identifier is a state of the automata in which the automata is stored in memory. Examiner further notes that the results (including the updated node identifier) may be stored.
On page 18, Applicant argues:
Independent claim 11 sets forth a instructions to cause one or more processors to
"determine an updated node identifier based on the comparison, the updated node identifier being (a) a first updated node identifier when the feature value exceeds the threshold or (b) a second updated node identifier when the feature value is below the threshold; and store the updated node identifier after determining the updated node identifier, the updated node identifier accessed for a second cycle." Fu fails to teach or suggest such instructions. Thus, independent claim 11 and all claims depending therefrom are allowable.
Regarding the Applicant’s argument that the prior art fails to teach or suggest claim 11, Examiner respectfully disagrees. Specifically, Examiner notes that claim 11 is rejected similarly to claim 1. Examiner respectfully points the applicant to the above 102 rejections.
Regarding the Applicant’s argument that Fu does not teach “node identifiers”, Examiner respectfully disagrees. Specifically, Examiner notes that the broadest reasonable interpretation of node identifiers encompasses any form of identification for a node. As such, Fu’s identification of the state of the automata which processes nodes is a node identifier. Fu further stores the state of the automata after updating the state (Fu, page 19, paragraph 0063; Fu, page 14, paragraph 0005) and accesses the state of the automata to execute a second cycle (Fu, page 18, paragraph 0059). Examiner respectfully points the Applicant to the above 102 rejections.
Regarding the Applicant’s argument that the prior art does not disclose “store the updated node identifier after determining the updated node identifier”, Examiner respectfully disagrees. Specifically, Fu teaches this (Fu, page 19, paragraph 0063, “The Random forests model may be compiled, converted into a set of STEs (e.g., automata), and stored (e.g., within the system memory 26 and/or onboard of the processor 12) to be executed at run-time on the automata processor(s)” where “certain apparatus, including computational electronic devices and systems, may include a number of processing resources (e.g., one or more processors), which may retrieve and execute instructions and store the results of the executed instructions to a suitable location” (Fu, page 14, paragraph 0005).). Examiner notes that the updated node identifier is a state of the automata in which the automata is stored in memory. Examiner further notes that the results (including the updated node identifier) may be stored.
On page 19, Applicant argues:
Fu mentions "Random Forest models composed of, for example, a number of binary decision trees." Fu, paragraph [0058]. As described above, there is no need for Fu to use node identifiers because Fu uses a traditional random forest model composed of binary decision trees and not a data structure. Therefore, there is no need for Fu to determine whether an updated node identifier corresponds to a subsequent comparison or a classification. Because claim I utilizes a data structure, as opposed to a traditional if-else or static random tree evaluators, the processor circuitry needs to determine whether to perform a subsequent comparison or whether the result of the current comparison results in a classification. Accordingly, claim I sets forth "output a classification for the input feature array responsive to determining that the updated node identifier is a value that corresponds to the classification." Thus, Fu does not teach or suggest processor circuitry to "output a classification for the input feature array responsive to determining that the updated node identifier is a value that corresponds to the classification," as set forth in claim 20. Therefore, claim 20 and all claims depending therefrom are allowable over Fu.
Regarding the Applicant’s argument that the prior art of record does not teach or suggest claim 20, the Examiner respectfully disagrees. Specifically, Specifically, Examiner notes that the broadest reasonable interpretation of node identifiers encompasses any form of identification for a node. As such, Fu’s identification of the state of the automata which processes nodes is a node identifier. Fu further stores the state of the automata after updating the state (Fu, page 19, paragraph 0063; Fu, page 14, paragraph 0005) and accesses the state of the automata to execute a second cycle (Fu, page 18, paragraph 0059). Examiner respectfully points the Applicant to the above 102 rejections. Examiner further notes that the broadest reasonable interpretation of data structure encompasses any structure that processes data, to which a random forest model falls under.
Regarding the Applicant’s argument that the prior art of record does not teach or suggest “output a classification for the input feature array responsive to determining that the updated node identifier is a value that corresponds to the classification”, Examiner respectfully disagrees. Specifically, Examiner notes that Fu teaches this (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “An output vector of the automata processor(s) 30 identifies the classifications 159 (e.g., C0, C1, C2, …,#,…). The processor 12 may post-process the classifications from each decision tree 150 (e.g., “T1”), 152 (e.g., “T2”), 154 (e.g., “T3”), 156 (e.g., “T4”) to generate the final classification of the input data. ” (Fu, page 18, paragraph 0059). Examiner notes that the classification node is the updated node identifier with the classification of “Class 2”.). Examiner notes that the final classification is the outputted classification and the value that corresponds to the classification is the value of “Class 2”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Sharp (“Implementing Decision Trees and Forests on a GPU”) also discusses decision trees and random forests used for classification.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/K.R.H./Examiner, Art Unit 2148 /MICHELLE T BECHTOLD/Supervisory Patent Examiner, Art Unit 2148