Prosecution Insights
Last updated: October 02, 2026
Application No. 17/575,415

METHODS AND APPARATUS TO IMPLEMENT A RANDOM FOREST

Non-Final OA §101§102§103§112
Filed
Jan 13, 2022
Examiner
LAU, KAITLYN RENEE
Art Unit
2148
Tech Center
2100 — Computer Architecture & Software
Assignee
General Electric Company
OA Round
3 (Non-Final)
60%
Grant Probability
Moderate
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
6 granted / 10 resolved
+5.0% vs TC avg
Strong +67% interview lift
Without
With
+66.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 11m
Avg Prosecution
27 currently pending
Career history
40
Total Applications
across all art units

Statute-Specific Performance

§101
28.8%
-11.2% vs TC avg
§103
34.3%
-5.7% vs TC avg
§102
14.3%
-25.7% vs TC avg
§112
21.9%
-18.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 10 resolved cases

Office Action

§101 §102 §103 §112
DETAILED ACTION This action is in response to the amendment filed 04/24/2026. Claims 1-16 and 18-20 are pending and have been examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 13 is objected to because of the following informalities: Regarding claim 13, “the selected fourth of fifth entry” in the last line should read “the selected fourth or fifth entry”. Appropriate correction is required. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: the comparator in claims 1 and 2. Regarding the comparator, in paragraph 0043, the specification states: Thus, for example, any of the example communication interface 106, the example interface 110, the example tree-based decision circuitry 112, the example mode determination circuitry 114, the example interface(s) 200, the example logic circuitry 202, the example counter 204, and/or the example comparator 206, and/or, more generally, the example random forest circuitry 104 and/or the example tree-based decision circuitry 112 of FIGS. 1-2 could be implemented by one or more analog or digital circuit(s), logic circuits, programmable processor(s), programmable controller(s), graphics processing unit(s) (GPU(s)), digital signal processor(s) (DSP(s)), application specific integrated circuit(s) (ASIC(s)), programmable logic device(s) (PLD(s)) and/or field programmable logic device(s) (FPLD(s)). When reading any of the apparatus or system claims of this patent to cover a purely software and/or firmware implementation, at least one of the example communication interface 106, the example interface 110, the example tree-based decision circuitry 112, the example mode determination circuitry 114, the example interface(s) 200, the example logic circuitry 202, the example counter 204, and/or the example comparator 206, and/or, more generally, the example random forest circuitry 104 and/or the example tree- based decision circuitry 112 of FIGS. 1-2 is/are hereby expressly defined to include a non-transitory computer readable storage device or storage disk such as a memory, a digital versatile disk (DVD), a compact disk (CD), a Blu-ray disk, etc. including the software and/or firmware. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-16, and 17-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Regarding claim 1, lines 3-4 read “memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest.” Examiner notes that the paragraphs that offers the most support are paragraph 0035 which states “the logic circuitry 202 may increment the example counter 204 for each iteration through entries in the parametric classification data structure” and paragraph 0040 which states “the values in the example parametric data structure 300 are based on a trained random forest classification data structure 300 which includes 10 entries, there are additional rows corresponding to additional node identifiers.” These two paragraphs support the data structure includes a plurality of entries, but does not support each entry being associated with a node of the random forest. Regarding claim 1, lines 4-5 read “access a first entry of the plurality of entries, the first entry including a first feature value.” Examiner notes that the paragraphs that offers the most support are paragraph 0035 which states “the logic circuitry 202 may increment the example counter 204 for each iteration through entries in the parametric classification data structure” and paragraph 0040 which states “the values in the example parametric data structure 300 are based on a trained random forest classification data structure 300 which includes 10 entries, there are additional rows corresponding to additional node identifiers.” These two paragraphs support the a plurality of entries, but does not support a first entry including a first feature value. Regarding claim 1, lines 13-14 read “select a second entry of the plurality of entries when the first feature value exceeds the first threshold.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the input feature exceeds a threshold, the logic circuitry 202 identifies a first output node value corresponding to the first node.” This paragraph supports a feature value exceeding the threshold, but does not support a selecting a second entry. Regarding claim 1, lines 15-16 read “select a third entry of the plurality of entries when the first feature value is below the first threshold.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the input feature is below the threshold, the logic circuitry 202 identifies a second output node value corresponding to the first node.” This paragraph supports a feature value exceeding the threshold, but does not support a selecting a third entry. Regarding claim 1, lines 17-28 read “when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “the logic circuitry 202 of FIG. 2 utilizes obtained data structure and the input feature array to perform a function that results in a leaf node of the tree (e.g., corresponding to a classification). As further described below, the logic circuitry 202 uses the parametric classification data structure to make determinations based on results of a comparison and/or to determine when a leaf has been reached. The example logic circuitry 202 performs multiple iterations of comparisons using the input feature array to result in a leaf (e.g., an output classification).” This paragraph supports a leaf and a classification output associated with the input feature array, but does not support the selected entry associated with a leaf. Regarding claim 1, lines 19-20 read “when the selected entry is not associated with the leaf of the random forest, initiate a second cycle.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the logic circuitry 202 determines that the output node does not correspond to a leaf, the logic circuitry 202 stores the output node in the example register 208 (e.g., for another iteration). In this manner, the output node is used as an input for a second iteration through the parametric classification data structure.” This paragraph supports initiating a second cycle when the output node is not associated with the leaf, but does not support when the selected entry is not associated with the leaf. Regarding claims 2-10, claims 2-10 are rejected for at least the same reasons as claim 1 since claims 2-10 depend on claim 1. Regarding claim 2, lines 2-3 read “the logic circuitry is to, for the second cycle, identify a second feature value corresponding to the selected entry.” Examiner notes that the paragraph that offers the most support is paragraph 0069 which states “wherein the logic circuitry is to, for the second cycle, identify a second feature value corresponding to the updated node identifier.” This paragraph supports the logic circuitry identifies a second feature value for the second cycle, it does not support the feature value corresponding to the selected entry. Regarding claim 2, lines 3-4 read “the comparator to compare the second feature value to a second threshold corresponding to the selected entry.” Examiner notes that the paragraph that offers the most support is paragraph 0069 which states “the comparator to compare the second feature value to a second threshold corresponding to the updated node identifier.” This paragraph supports the comparator comparing the second feature value to a second threshold, it does not support a second threshold corresponding to the selected entry. Regarding claim 2, lines 6-8 read “the logic circuitry is to select a fourth entry when the second feature value exceeds the second threshold or select a fifth entry when the second feature value is less than the second threshold.” Examiner notes that the paragraph that offers the most support is paragraph 0079 which states “output (a) a third updated node identifier when the second feature value exceeds the second threshold of (b) a fourth updated node identifier when the second feature value is less than the second threshold.” This paragraph supports the second feature value exceeds the second threshold, but does not support selecting a fourth and fifth entry. Regarding claim 3, claim 3 reads “wherein the logic circuitry is to determine if the selected fourth or fifth entry corresponds to the leaf of the random forest based on a value of the selected fourth or fifth entry.” Examiner notes that the paragraph that offers the most support is paragraph 0055 which states “At block 420 of FIG. 4B, the example logic circuitry 202 determines if the stored value in the register 208 an/or the output node value from the cycle corresponds to a leaf node.” This paragraph supports the logic circuitry determining if a value corresponds to a leaf, but does not support a fourth and fifth entry corresponding to a leaf. Regarding claim 4, claim 4 reads “wherein the logic circuitry is to output a classification for the input feature array based on the value of the selected fourth or fifth entry when the selected fourth or fifth entry corresponds to the leaf of the random forest.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “The example logic circuitry 202 performs multiple iterations of comparisons using the input feature array to result in a leaf (e.g., an output classification). For example, for a first iteration, the example logic circuitry 202 starts at a first node of the parametric classification data structure and identifies a input feature corresponding to the first node. After the input feature is identified, the example logic circuitry 202 uses the comparator 206 to compare the input feature to a threshold corresponding to the first node. If the input feature exceeds a threshold, the logic circuitry 202 identifies a first output node value corresponding to the first node. If the input feature is below the threshold, the logic circuitry 202 identifies a second output node value corresponding to the first node. The logic circuitry 202 determines if the output node value corresponds to a leaf. If the logic circuitry 202 determines that the output node corresponds to a leaf, the logic circuitry 202 outputs the classification as a final output classification.” This paragraph supports the logic circuitry outputting a classification for the input feature array based on a value when the value corresponds to a leaf, but does not support a fourth and fifth entry corresponding to a leaf. Regarding claim 5, claim 5 reads “pause the classification process after the first cycle is complete, a register of the apparatus to maintain storage of the selected entry during the pause; and resume the classification process before the second cycle by accessing the selected entry form the register.” Examiner notes that the paragraph which provides the most support is paragraph 0072 which states “wherein the first cycle and the second cycle correspond to a classification process. The logic circuitry to pause the classification process after the first cycle is complete, the register to maintain storage of the updated node identifier during the pause and resume the classification process before the second cycle by accessing the updated node identifier from the register.” This paragraph supports pausing the classification process after the first cycle, maintaining storage during the pause, and resuming the process before the second cycle. This paragraph does not support a selected entry. Regarding claim 8, claim 8 recites, “wherein the logic circuitry is to generate an output classification of the input feature array based on the selected entry.” Examiner notes that the paragraph which provides the most support is paragraph 0075 which states “wherein the logic circuitry is to generate an output classification of the input feature array based on the updated node identifier.” This paragraph supports the logic circuitry generating an output classification of the input feature array, but does not support the selected entry. Regarding claim 10, claim 10 recites “wherein a position of the first feature value in the input feature array, the initial node, the first threshold, the first entry, the second entry, and the third entry are included in the classification data structure.” Examiner notes that the paragraph which provides the most support is paragraph 0077 which states “wherein a position of the feature value in the input feature array, the node identifier, the threshold, the first updated node identifier, and the second updated node identifier are included in the data structure.” This paragraph supports a position of the feature value in the input feature array, the initial node, and the first threshold are included in the classification data structure, but does not support the first, second, and third entry. Regarding claim 11, lines 3-5 read “access a first entry of the plurality of entries, ones of the plurality of entries associated with a node of a random forest, the first entry including a first feature value.” Examiner notes that the paragraphs that offers the most support are paragraph 0035 which states “the logic circuitry 202 may increment the example counter 204 for each iteration through entries in the parametric classification data structure” and paragraph 0040 which states “the values in the example parametric data structure 300 are based on a trained random forest classification data structure 300 which includes 10 entries, there are additional rows corresponding to additional node identifiers.” These two paragraphs support the a plurality of entries, but does not support a first entry including a first feature value. Regarding claim 11, lines 11-12 read “select a second entry of the plurality of entries when the first feature value exceeds the first threshold.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the input feature exceeds a threshold, the logic circuitry 202 identifies a first output node value corresponding to the first node.” This paragraph supports a feature value exceeding the threshold, but does not support a selecting a second entry. Regarding claim 11, lines 13-14 read “select a third entry of the plurality of entries when the first feature value is below the first threshold.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the input feature is below the threshold, the logic circuitry 202 identifies a second output node value corresponding to the first node.” This paragraph supports a feature value exceeding the threshold, but does not support a selecting a third entry. Regarding claim 11, lines 15-16 read “when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “the logic circuitry 202 of FIG. 2 utilizes obtained data structure and the input feature array to perform a function that results in a leaf node of the tree (e.g., corresponding to a classification). As further described below, the logic circuitry 202 uses the parametric classification data structure to make determinations based on results of a comparison and/or to determine when a leaf has been reached. The example logic circuitry 202 performs multiple iterations of comparisons using the input feature array to result in a leaf (e.g., an output classification).” This paragraph supports a leaf and a classification output associated with the input feature array, but does not support the selected entry associated with a leaf. Regarding claim 11, lines 17-18 read “when the selected entry is not associated with the leaf of the random forest, initiate a second cycle.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the logic circuitry 202 determines that the output node does not correspond to a leaf, the logic circuitry 202 stores the output node in the example register 208 (e.g., for another iteration). In this manner, the output node is used as an input for a second iteration through the parametric classification data structure.” This paragraph supports initiating a second cycle when the output node is not associated with the leaf, but does not support when the selected entry is not associated with the leaf. Regarding claims 12-16 and 18-19, claims 12-16 and 18-19 are rejected for at least the same reasons as claim 11 since claims 12-16 and 18-19 depend on claim 11. Regarding claim 12, claim 12 recites substantially similar limitations to claim 2, and is therefore rejected under the same analysis. Regarding claim 13, claim 13 reads “wherein the instructions case the one or more processors to determine that the selected fourth or fifth entry corresponds to a classification when the selected fourth or fifth entry is a negative value.” Examiner notes that the paragraph that provides the most support is paragraph 0055 which states “leave nodes may be nodes that correspond to specific values (e.g., negative numbers). Accordingly if the output node identifier from a cycle (e.g., that is stored in the register 208) corresponds to a predetermined leaf value (e.g., a negative value), the logic circuitry 202 determines that the result corresponds to a leaf. If the example logic circuitry 202 determines that the stored value corresponds to a leaf node (block 420: YES), control continues to block 428, as further described below.” This paragraph supports a negative value corresponding to a classification, but does not support the selected fourth or fifth entry. Regarding claim 14, claim 14 recites substantially similar limitations to claim 4, and is therefore rejected under the same analysis. Regarding claim 15, claim 15 recites substantially similar limitations to claim 5, and is therefore rejected under the same analysis. Regarding claim 18, claim 18 recites substantially similar limitations to claim 8, and is therefore rejected under the same analysis. Regarding claim 20, lines 3-4 read “memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest.” Examiner notes that the paragraphs that offers the most support are paragraph 0035 which states “the logic circuitry 202 may increment the example counter 204 for each iteration through entries in the parametric classification data structure” and paragraph 0040 which states “the values in the example parametric data structure 300 are based on a trained random forest classification data structure 300 which includes 10 entries, there are additional rows corresponding to additional node identifiers.” These two paragraphs support the data structure includes a plurality of entries, but does not support each entry being associated with a node of the random forest. Regarding claim 20, lines 7-8 read “access a first entry of the plurality of entries, the first entry including a first feature value.” Examiner notes that the paragraphs that offers the most support are paragraph 0035 which states “the logic circuitry 202 may increment the example counter 204 for each iteration through entries in the parametric classification data structure” and paragraph 0040 which states “the values in the example parametric data structure 300 are based on a trained random forest classification data structure 300 which includes 10 entries, there are additional rows corresponding to additional node identifiers.” These two paragraphs support the a plurality of entries, but does not support a first entry including a first feature value. Regarding claim 20, lines 14-15 read “select a second entry of the plurality of entries when the first feature value exceeds the first threshold.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the input feature exceeds a threshold, the logic circuitry 202 identifies a first output node value corresponding to the first node.” This paragraph supports a feature value exceeding the threshold, but does not support a selecting a second entry. Regarding claim 20, lines 15-17 read “select a third entry of the plurality of entries when the first feature value is below the first threshold.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the input feature is below the threshold, the logic circuitry 202 identifies a second output node value corresponding to the first node.” This paragraph supports a feature value exceeding the threshold, but does not support a selecting a third entry. Regarding claim 20, lines 18-19 read “when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “the logic circuitry 202 of FIG. 2 utilizes obtained data structure and the input feature array to perform a function that results in a leaf node of the tree (e.g., corresponding to a classification). As further described below, the logic circuitry 202 uses the parametric classification data structure to make determinations based on results of a comparison and/or to determine when a leaf has been reached. The example logic circuitry 202 performs multiple iterations of comparisons using the input feature array to result in a leaf (e.g., an output classification).” This paragraph supports a leaf and a classification output associated with the input feature array, but does not support the selected entry associated with a leaf. Regarding claim 20, lines 20-21 read “when the selected entry is not associated with the leaf of the random forest, initiate a second cycle.” Examiner notes that the paragraph that offers the most support is paragraph 0035 which states “If the logic circuitry 202 determines that the output node does not correspond to a leaf, the logic circuitry 202 stores the output node in the example register 208 (e.g., for another iteration). In this manner, the output node is used as an input for a second iteration through the parametric classification data structure.” This paragraph supports initiating a second cycle when the output node is not associated with the leaf, but does not support when the selected entry is not associated with the leaf. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 11-16 and 18-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 11, lines 3-6 recite “for a first cycle, access a first entry of a plurality of entries of a classification data structure, ones of the plurality of entries associated with a node of a random forest, the first entry including a first feature value corresponding to an initial node of the random forest.” It is unclear as to what “ones of the plurality of entries” is intended to mean. Further if interpreted to be one of the plurality of entries associated with a node of a random forest, it is then redundant with the limitation directly after which reads “the first entry including a first feature value corresponding to an initial node of the random forest.” For the purpose of examination, Examiner has interpreted this limitation to be accessing a first entry of a plurality of entries of a classification data structure where one of the entries is associated with a node of a random forest. Regarding claims 12-16 and 18-19, claims 12-16 and 18-19 are rejected for at least the same reasons as claim 11 since claims 12-16 and 18-19 depend on claim 11. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-16 and 18-20 are rejected under 35 U.S.C. 101 because they are directed to an abstract idea without significantly more. Regarding Claim 1: Subject Matter Eligibility Analysis Step 1: Claim 1 recites an apparatus and is thus a machine, one of the four statutory categories of patentable subject matter. Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 1 recites compare the feature value to a threshold corresponding to the initial node identifier; (This limitation is a mental process as it encompasses a human mentally compare the feature value to a threshold and is thus an evaluation.) select a second entry of the plurality of entries when the first feature value exceeds the first threshold (This limitation is a mental process as it encompasses a human mentally selecting an entry when the first feature value exceed a threshold and is thus a judgment.) or select a third entry when the first feature value is below the first threshold (This limitation is a mental process as it encompasses a human mentally selecting a third entry when the first feature value is below a threshold and is thus a judgment.) Therefore, claim 1 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 1 further recites additional elements of An apparatus to implement a random forest (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest (This element does not integrate the abstract idea into a practical application because it recites generic computing components on which to apply the abstract idea (see MPEP 2106.05(f)).) Logic circuitry to for a first cycle, access a first entry of the plurality of entries, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array; (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) A comparator to compare the first feature value to a first threshold (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) the logic circuitry (This element does not integrate the abstract idea into a practical application because it recites generic computing components on which to apply the abstract idea (see MPEP 2106.05(f)).) when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) Therefore, claim 1 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 1 do not provide significantly more than the abstract idea itself, taken alone and in combination because An apparatus to implement a random forest uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Logic circuitry to for a first cycle, access a feature value corresponding to an initial node identifier from a data structure, the feature value included in an input feature array is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93). A comparator to compare the first feature value to a first threshold uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). the logic circuitry uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)). and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle is the well understood, routine, and conventional activity of “Performing repetitive calculations” (see MPEP 2106.05(d)(II); Flook, 437 U.S. at 594, 198 USPQ2d at 199 (recomputing or readjusting alarm limit values); Bancorp Services v. Sun Life, 687 F.3d 1266, 1278, 103 USPQ2d 1425, 1433 (Fed. Cir. 2012) ("The computer required by some of Bancorp’s claims is employed only for its most basic function, the performance of repetitive calculations, and as such does not impose meaningful limits on the scope of those claims.")). Therefore, claim 1 is subject-matter ineligible. Regarding Claim 2: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 2 recites for the second cycle, identify a second feature value corresponding to the selected entry; (This limitation is a mental process as it encompasses a human mentally identifying a second feature value and is thus an observation.) compare the second feature value to a second threshold corresponding to the selected entry (This limitation is a mental process as it encompasses a human mentally comparing the second feature value to a second threshold and is thus an evaluation.) select a fourth entry when the second feature value exceeds the second threshold or select a fifth entry when the second feature value is less than the second threshold (This limitation is a mental process as it encompasses a human mentally selecting an entry when a value exceeds a threshold or selecting an entry when a value is less than a threshold and is thus a judgement.) Therefore, claim 2 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 2 further recites additional elements of the logic circuitry to…identify a feature value (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) the comparator to compare the second feature value to a second threshold (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Therefore, claim 2 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 2 do not provide significantly more than the abstract idea itself, taken alone and in combination because the logic circuitry to…identify a feature value uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). the comparator to compare the second feature value to a second threshold uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Therefore, claim 2 is subject-matter ineligible. Regarding Claim 3: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 3 recites determine if the selected fourth or fifth entry corresponds to the leaf of the random forest based on a value of the selected fourth or fifth entry. (This limitation is a mental process as it encompasses a human mentally determining if the selected fourth or fifth entry is a leaf.) Therefore, claim 3 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 3 further recites additional elements of the logic circuitry to determine if the selected fourth or fifth entry corresponds to the leaf of the random forest (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Therefore, claim 3 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 3 do not provide significantly more than the abstract idea itself, taken alone and in combination because the logic circuitry to determine if the selected fourth or fifth entry corresponds to the leaf of the random forest uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Therefore, claim 3 is subject-matter ineligible. Regarding Claim 4: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 4 recites the same abstract ideas as claim 3. Therefore, claim 4 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 4 further recites additional elements of the logic circuitry is to output a classification for the input feature array based on the value of the selected fourth or fifth entry when the selected fourth or fifth entry corresponds to the leaf of the random forest. (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) Therefore, claim 4 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 4 do not provide significantly more than the abstract idea itself, taken alone and in combination because the logic circuitry is to output a classification for the input feature array based on the value of the selected fourth or fifth entry when the selected fourth or fifth entry corresponds to the leaf of the random forest is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)). Therefore, claim 4 is subject-matter ineligible. Regarding Claim 5: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 5 recites wherein the first cycle and the second cycle correspond to a classification process (This limitation is a mental process as it encompasses a human mentally corresponding cycles to classification processes and performing the classification process.) pause the classification process after the first cycle is complete (This limitation is a mental process as it encompasses a human mentally pausing a classification process.) resume the classification process before the second cycle (This limitation is a mental process as it encompasses a human mentally resuming a classification process.) Therefore, claim 5 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 5 further recites additional elements of the logic circuitry to: pause the classification process (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) a register of the apparatus to maintain storage of the selected entry during the pause; (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) accessing the selected entry from the register. (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) Therefore, claim 5 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 5 do not provide significantly more than the abstract idea itself, taken alone and in combination because the logic circuitry to: pause the classification process uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). a register of the apparatus to maintain storage of the selected entry during the pause; is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93). accessing the selected entry from the register is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)). Therefore, claim 5 is subject-matter ineligible. Regarding Claim 6: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 6 recites a counter to increment a count corresponding to a number of cycles. (This limitation is a mental process as it encompasses a human mentally incrementing a mental counter.) Therefore, claim 6 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 6 does not further recite any additional elements. Therefore, claim 6 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: Since there are no additional elements, claim 6 does not provide significantly more than the abstract idea itself, taken alone and in combination. Therefore, claim 6 is subject-matter ineligible. Regarding Claim 7: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 7 recites discard an output classification when the count exceeds a second threshold (This limitation is a mental process as it encompasses a human mentally discard an output classification.) Therefore, claim 7 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 7 further recites additional elements of the logic circuitry is to discard an output classification (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Therefore, claim 7 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 7 do not provide significantly more than the abstract idea itself, taken alone and in combination because the logic circuitry is to discard an output classification uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Therefore, claim 7 is subject-matter ineligible. Regarding Claim 8: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 8 recites generate an output classification of the input feature array based on the selected entry. (This limitation is a mental process as it encompasses a human mentally generat an output classification of the input feature array.) Therefore, claim 8 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 8 further recites additional elements of the logic circuitry is to generate an output classification (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Therefore, claim 8 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 8 do not provide significantly more than the abstract idea itself, taken alone and in combination because the logic circuitry is to generate an output classification uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Therefore, claim 8 is subject-matter ineligible. Regarding Claim 9: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 9 recites determine a final output classification based on a plurality of output classifications, the plurality of output classifications including the output classification generated (This limitation is a mental process as it encompasses a human mentally determine a final output classification.) Therefore, claim 9 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 9 further recites additional elements of mode determination circuitry to determine a final output (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) the output classification generated by the logic circuitry (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Therefore, claim 9 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 9 do not provide significantly more than the abstract idea itself, taken alone and in combination because mode determination circuitry to determine a final output uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). the output classification generated by the logic circuitry uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Therefore, claim 9 is subject-matter ineligible. Regarding Claim 10: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 10 recites the same abstract ideas as claim 1. Therefore, claim 10 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 10 further recites additional elements of wherein a position of the first feature value in the input feature array, the initial node, the first threshold, the first entry, the second entry, and the third entry are included in the classification data structure, the classification data structure corresponding to a tree of a trained random forest. (This element does not integrate the abstract idea into a practical application because it recites a technological environment in which to apply a judicial exception (see MPEP 2106.05(h)).) Therefore, claim 10 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 10 do not provide significantly more than the abstract idea itself, taken alone and in combination because wherein a position of the first feature value in the input feature array, the initial node, the first threshold, the first entry, the second entry, and the third entry are included in the classification data structure, the classification data structure corresponding to a tree of a trained random forest specifies a particular technological environment to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(h)). Therefore, claim 10 is subject-matter ineligible. Regarding Claim 11: Subject Matter Eligibility Analysis Step 1: Claim 11 recites a non-transitory computer readable storage medium and is thus a product, one of the four statutory categories of patentable subject matter. Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 11 recites compare the feature value to a threshold corresponding to the initial node identifier; (This limitation is a mental process as it encompasses a human mentally compare the feature value to a threshold and is thus an evaluation.) select a second entry of the plurality of entries when the first feature value exceeds the first threshold (This limitation is a mental process as it encompasses a human mentally selecting an entry when the first feature value exceed a threshold and is thus a judgment.) or select a third entry when the first feature value is below the first threshold (This limitation is a mental process as it encompasses a human mentally selecting a third entry when the first feature value is below a threshold and is thus a judgment.) Therefore, claim 11 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 11 further recites additional elements of A non-transitory computer readable storage medium comprising instructions, which, when executed, cause one or more processors to at least: …identify a feature value (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) for a first cycle, access a first entry of the plurality of entries of a classification data structure, ones of the plurality of entries associated with a node of a random forest, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array; (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) Therefore, claim 11 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 11 do not provide significantly more than the abstract idea itself, taken alone and in combination because A non-transitory computer readable storage medium comprising instructions, which, when executed, cause one or more processors to at least: …identify a feature value uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). for a first cycle, access a first entry of the plurality of entries of a classification data structure, ones of the plurality of entries associated with a node of a random forest, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93). when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) Therefore, claim 11 is subject-matter ineligible. Regarding claim 12, claim 12 recites substantially similar limitations to claim 2, and is therefore rejected under the same analysis. Regarding Claim 13: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 13 recites determine that the selected fourth or fifth entry corresponds to a classification when the selected fourth of fifth entry is a negative value. (This limitation is a mental process as it encompasses a human mentally determining that the selected fourth or fifth entry corresponds to a classification when the selected fourth or fifth entry is a negative value.) Therefore, claim 13 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 13 further recites additional elements of The non-transitory computer readable storage medium of claim 12 wherein the instructions cause the one or more processors to (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Therefore, claim 13 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 13 do not provide significantly more than the abstract idea itself, taken alone and in combination because The non-transitory computer readable storage medium of claim 12 wherein the instructions cause the one or more processors to uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Therefore, claim 13 is subject-matter ineligible. Regarding claim 14, claim 14 recites substantially similar limitations to claim 4, and is therefore rejected under the same analysis. Regarding claim 15, claim 15 recites substantially similar limitations to claim 5, and is therefore rejected under the same analysis. Regarding Claim 16: Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 16 recites Increment a count corresponding to a number of cycles (This limitation is a mental process as it encompasses a human mentally incrementing a count.) Discard an output classification when the count exceeds a second threshold (This limitation is a mental process as it encompasses a human mentally discarding an output.) Therefore, claim 16 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 16 further recites additional elements of The non-transitory computer readable storage medium of claim 11, wherein the instructions cause the one or more processors to (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Therefore, claim 16 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 16 do not provide significantly more than the abstract idea itself, taken alone and in combination because The non-transitory computer readable storage medium of claim 11, wherein the instructions cause the one or more processors to uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Therefore, claim 16 is subject-matter ineligible. Regarding claim 18, claim 18 recites substantially similar limitations to claim 8, and is therefore rejected under the same analysis. Regarding claim 19, claim 19 recites substantially similar limitations to claim 9, and is therefore rejected under the same analysis. Regarding Claim 20: Subject Matter Eligibility Analysis Step 1: Claim 20 recites an apparatus and is thus a machine, one of the four statutory categories of patentable subject matter. Subject Matter Eligibility Analysis Step 2A Prong 1: Claim 20 recites compare the feature value to a threshold corresponding to the initial node identifier; (This limitation is a mental process as it encompasses a human mentally compare the feature value to a threshold and is thus an evaluation.) select a second entry of the plurality of entries when the first feature value exceeds the first threshold (This limitation is a mental process as it encompasses a human mentally selecting an entry when the first feature value exceed a threshold and is thus a judgment.) or select a third entry when the first feature value is below the first threshold (This limitation is a mental process as it encompasses a human mentally selecting a third entry when the first feature value is below a threshold and is thus a judgment.) Therefore, claim 20 recites an abstract idea. Subject Matter Eligibility Analysis Step 2A Prong 2: Claim 20 further recites additional elements of An apparatus to implement a random forest (This element does not integrate the abstract idea into a practical application because it amounts to mere “apply it on a computer” (see MPEP 2106.05(f)).) Memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest; instructions included in the apparatus; and processor circuitry to execute the instructions (This element does not integrate the abstract idea into a practical application because it recites generic computing components on which to perform the abstract idea (see MPEP 2106.05(f)).) for a first cycle, access a first entry of the plurality of entries of a classification data structure, ones of the plurality of entries associated with a node of a random forest, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array; (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) Therefore, claim 20 is not integrated into a practical application. Subject Matter Eligibility Analysis Step 2B: The additional elements of claim 20 do not provide significantly more than the abstract idea itself, taken alone and in combination because An apparatus to implement a random forest uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). Memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest; instructions included in the apparatus; and processor circuitry to execute the instructions uses a computer as a tool to perform the abstract idea and cannot provide significantly more (see MPEP 2106.05(f)). for a first cycle, access a first entry of the plurality of entries of a classification data structure, ones of the plurality of entries associated with a node of a random forest, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array is the well understood, routine, and conventional activity of “storing and retrieving information in memory” (see MPEP 2106.05(d)(II); Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93). when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (This element does not integrate the abstract idea into a practical application because it recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) Therefore, claim 20 is subject-matter ineligible. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 8-13, and 18-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Fu et al. (US 2017/0255878 A1) (hereafter referred to as Fu). Regarding claim 1, Fu teaches An apparatus to implement a random forest, the apparatus comprising (Fu, page 14, paragraph 0003, “Embodiments of the invention relate generally to automata processors, and more specifically, to implementing Random Forests utilizing automata processors.”): Memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest (Fu, page 15, paragraph 0026, “As depicted, the system memory 26 may be used to allow the processor 12 to efficiently carry out its functionality. As depicted, the system memory 26 may be coupled to the processor 12 to store and facilitate execution of various instructions” where “In certain embodiments, the processor 12 and the automata processor(s) 30 may, in some embodiments, operate in conjunction or alone to generate and compute Random Forest models composed of, for example a number of binary decision trees. An example decision tree 96, and feature vector 98 are illustrated in FIG. 9” and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that Figure 9 displays the classification structure. Examiner further notes the entries are the features.) logic circuitry to, for a first cycle, access a first entry of the plurality of entries, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array associated with the apparatus (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that Figure 9 displays nodes of a random forest. Examiner notes that the feature vector is the feature array. Examiner further notes that the logic circuitry is the processor. Additionally, the features are the entries with the first entry being F0 and the initial node being node 100.); a comparator to compare the first feature value to a first threshold corresponding to the initial node (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the processor is the comparator and the threshold is the cut. Specifically, the first threshold or cut is 0.2 as shown in node 100.); the logic circuitry to: select a second entry of the plurality of entries when the first feature value exceeds the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that next-state 102 selects the second entry of f4 when f1, the first feature value exceeds the first threshold of 0.2. The logic circuitry is the processor.); or select a third entry of the plurality of entries when the first feature value is below the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that previous-state 104 selects the second entry of f3 when f1, the first feature value is below the first threshold of 0.2. The logic circuitry is the processor.); when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) where “An output vector of the automata processor(s) 30 identifies the classifications 159” (Fu, page 19, paragraph 0066) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes the selected entry is one of the features. Examiner further notes that the leaves are classes 0-3 and are used in the output vector of classifications.); when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met The automata processor(s) 30 may continue this learning process until a maximum depth or minimum error threshold is met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes the selected entry is one of the features. Examiner further notes that the leaves are classes 0-3 and are used in the output vector of classifications. Continuing the learning process is the second cycle.). Regarding claim 2, Fu teaches The apparatus of claim 1, wherein: the logic circuitry is to, for the second cycle, identify a second feature value corresponding to the selected entry (Fu, page 19, paragraph 0060, “the automata processor 30 may traverse a root-to-leaf path based on the values of the features of the input data” and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the logic circuitry is the processor and the second cycle is blocks 102, 106, and 108. Examiner further notes that the second feature value is f4.); the comparator to compare the second feature value to a second threshold corresponding to the selected entry ( Fu, page 18, paragraph 0059, “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” and Fu, FIG 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the comparator is the processor, the second feature value is f4, and the second threshold is 0.75.); and the logic circuitry is to select a fourth entry when the second feature value exceeds the second threshold or select a fifth entry when the second feature value is less than the second threshold (Fu, page 18, paragraph 0059, “The processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met. Similarly, each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met.” Examiner notes that the logic circuitry is the processor. Examiner further notes that the next-state is the act of selecting a the fourth entry and the previous state is the act of selecting a fifth entry.). Regarding claim 3, Fu teaches The apparatus of claim 2, wherein the logic circuitry is to determine if the selected fourth or fifth entry corresponds to the leaf of random forest based on a value of the selected fourth or fifth entry (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the logic circuitry is the processor, the next-state is the selected fourth entry with an associated feature value, and the classification node leaf.). Regarding claim 4, Fu teaches The apparatus of claim 3, wherein the logic circuitry is to output a classification for the input feature array based on the value of the selected fourth or fifth entry when the fourth or fifth entry corresponds to the leaf of the random forest (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the logic circuitry is the processor and the classification node is the leaf. Examiner further notes that the next-state is the selected fourth entry with a feature value of f2.). Regarding claim 8, Fu teaches, The apparatus of claim 1, wherein the logic circuitry is to generate an output classification of the input feature array based on the selected entry (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059). Examiner notes that the logic circuitry is the processor and the classification node is the outputted node identifier.). Regarding claim 9, Fu teaches The apparatus of claim 8, further including mode determination circuitry to determine a final output classification based on a plurality of output classifications, the plurality of output classifications including the output classification generated by the logic circuitry (Fu, page 19, paragraph 0066, “The processor 12 may post-process the classifications from each decision tree 150 (e.g., “T1”), 152 (e.g., “T2”), 154 (e.g., “T3”), 156 (e.g., “T4”) to generate the final classification of the input data. For example, the processor may apply, for example, a majority-consensus model (e.g., a majority voting technique to identify a final classification of the input data.” Examiner notes that the final classification is the final output classification, and the processor is the mode determination circuitry.). Regarding claim 10, Fu teaches The apparatus of claim 1, wherein a position of the first feature value in the input feature array, the initial node, the first threshold, the first entry, the second entry, and the third entry are included in the classification data structure, the classification data structure corresponding to a tree of a trained random forest (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019) and where “The processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met. Similarly, each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” (Fu, page 18, paragraph 0059) and Fu, FIG 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the position of the feature value is the number associated with the feature, and the feature vector is the feature array. Examiner further notes that the logic circuitry is the processor. Additionally, node 100 is the initial node of the classification data structure, the first entry is f1, and the first threshold is 0.2. Examiner further notes that the second entry is the feature associated with block 102 of FIG 9 and the third selected entry updated node identifier is the feature associated with block 104 in FIG 9. ). Regarding claim 11, Fu teaches A non-transitory computer readable storage medium comprising instructions, which, when executed, cause one or more processors to at least: …identify a feature value (Fu, page 15, paragraph 0026, “In certain embodiments, such as where the processor 12 may be used to control the functioning of the processor-based system 10 by executing instructions, a system memory 26 may be used to allow the processor 12 to efficiently carry out its functionality. As depicted, the system memory 26 may be coupled to the processor 12 to store and facilitate execution of various instructions…. The system memory 26 may also include nonvolatile memory such as, for example, read-only memory (ROM), EEPROM, NAND flash memory, NOR flash memory, phase change random access memory (PCRAM), resistive random access memory (RRAM), magnetoresistive random access memory (MRAM), and/or spin torque transfer random access memory (STT RAM).”): for a first cycle, access a first entry of the plurality of entries, ones of the plurality of entries associated with a node of a random forest, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array associated with the apparatus (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that Figure 9 displays nodes of a random forest. Examiner notes that the feature vector is the feature array. Examiner further notes that the logic circuitry is the processor. Additionally, the features are the entries with the first entry being F0 and the initial node being node 100.); compare the first feature value to a first threshold corresponding to the initial node (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the processor is the comparator and the threshold is the cut. Specifically, the first threshold or cut is 0.2 as shown in node 100.); select a second entry of the plurality of entries when the first feature value exceeds the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that next-state 102 selects the second entry of f4 when f1, the first feature value exceeds the first threshold of 0.2. The logic circuitry is the processor.); or select a third entry of the plurality of entries when the first feature value is below the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that previous-state 104 selects the second entry of f3 when f1, the first feature value is below the first threshold of 0.2. The logic circuitry is the processor.); when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) where “An output vector of the automata processor(s) 30 identifies the classifications 159” (Fu, page 19, paragraph 0066) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes the selected entry is one of the features. Examiner further notes that the leaves are classes 0-3 and are used in the output vector of classifications.); when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met The automata processor(s) 30 may continue this learning process until a maximum depth or minimum error threshold is met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes the selected entry is one of the features. Examiner further notes that the leaves are classes 0-3 and are used in the output vector of classifications. Continuing the learning process is the second cycle.). Regarding claim 12, claim 12 recites substantially similar limitations to claim 2, and is therefore rejected under the same analysis. Regarding claim 18, claim 18 recites substantially similar limitations to claim 8, and is therefore rejected under the same analysis. Regarding claim 19, claim 19 recites substantially similar limitations to claim 9, and is therefore rejected under the same analysis. Regarding claim 20, Fu teaches An apparatus to implement a random forest, the apparatus comprising: Memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest; instructions included in the apparatus; and processor circuitry to execute the instructions to; (Fu, page 14, paragraph 0003, “Embodiments of the invention relate generally to automata processors, and more specifically, to implementing Random Forests utilizing automata processors” where “In certain embodiments, such as where the processor 12 may be used to control the functioning of the processor-based system 10 by executing instructions, a system memory 26 may be used to allow the processor 12 to efficiently carry out its functionality. As depicted, the system memory 26 may be coupled to the processor 12 to store and facilitate execution of various instructions” (Fu, page 15, paragraph 0026) where “In certain embodiments, the processor 12 and the automata processor(s) 30 may, in some embodiments, operate in conjunction or alone to generate and compute Random Forest models composed of, for example a number of binary decision trees. An example decision tree 96, and feature vector 98 are illustrated in FIG. 9” and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that Figure 9 displays the classification structure. Examiner further notes the entries are the features.) for a first cycle, access a first entry of the plurality of entries, the first entry including a first feature value corresponding to an initial node of the random forest, the first feature value included in an input feature array associated with the apparatus (Fu, page 19, paragraph 0064-0065, “In a first pre-processing stage, the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data. The feature vector 130 may be received by the processor 12. The processor may convert the feature values 144 (e.g., F0, F1, F2,…, #) of the feature vector 130 into labels that may be more efficiently and accurately computed and handled by the automata processor(s) 30. [0065] For example, the processor 12 may access a lookup table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144 (e.g., F0, F1, F2,…, #, … ) of an input data sample that may be concatenated to each other to form a label vector” where “present embodiments relate to implementing and computing Random Forest models utilizing state transition elements (STEs) of, for example, an automaton or automata processor” (Fu, page 14, paragraph 0019) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that Figure 9 displays nodes of a random forest. Examiner notes that the feature vector is the feature array. Examiner further notes that the logic circuitry is the processor. Additionally, the features are the entries with the first entry being F0 and the initial node being node 100.); compare the feature value to a threshold corresponding to the initial node identifier (Fu, page 19, paragraph 0068, “a feature range may include a range of values between two “cuts” in a decision tree of the same feature. Each node in paths 162, 164, 166, 168, 170, 172, and 174 may present a mathematical comparison to be performed. The value with which the comparison is performed for the feature may be referred to as a “cut” (e.g., a cutoff value) for a range. It then follows that the feature values less than or equal to the “cut” value is the range for the feature values. FIG. 11 illustrates the possible “cut” values (e.g., as illustrated by values “v1-v7”) and feature ranges for features f0, f1, f2, f3, and f4” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the processor is the comparator and the threshold is the cut. Specifically, the first threshold or cut is 0.2 as shown in node 100.); select a second entry of the plurality of entries when the first feature value exceeds the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that next-state 102 selects the second entry of f4 when f1, the first feature value exceeds the first threshold of 0.2. The logic circuitry is the processor.); or select a third entry of the plurality of entries when the first feature value is below the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that previous-state 104 selects the second entry of f3 when f1, the first feature value is below the first threshold of 0.2. The logic circuitry is the processor.); when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) where “An output vector of the automata processor(s) 30 identifies the classifications 159” (Fu, page 19, paragraph 0066) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes the selected entry is one of the features. Examiner further notes that the leaves are classes 0-3 and are used in the output vector of classifications.); when the selected entry is not associated with the leaf of the random forest, initiate a second cycle (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met The automata processor(s) 30 may continue this learning process until a maximum depth or minimum error threshold is met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes the selected entry is one of the features. Examiner further notes that the leaves are classes 0-3 and are used in the output vector of classifications. Continuing the learning process is the second cycle.). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 5 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu in view of Mitchell et al. (“Accelerating the XGBoost Algorithm Using GPU Computing”) (hereafter referred to as Mitchell). Regarding claim 5, Fu teaches The apparatus of claim 1, wherein the first cycle and the second cycle correspond to a classification process (Fu, page 18, paragraph 0060, “An automata processor 30 may calculate a classification of the input data (e.g., feature vector 98) utilizing the decision tree 96.”) Fu does not teach, but Mitchell does teach the logic circuitry to: pause the classification process after the first cycle is complete (Mitchell, page 23, Algorithm 7, PNG media_image2.png 384 409 media_image2.png Greyscale Where “the purpose of this paper is to describe how to efficiently implement decision tree learning for XGBoost on a GPU. GPUs can be thought of at a high level as having a shared memory architecture with multiple SIMD (single instruction multiple data) processors” (Mitchell, page 9, lines 185-187). Examiner notes that line 9 pauses the process after the first cycle to store the best split and the logic circuitry is the GPU.), a register to maintain storage of the apparatus of the selected entry during the pause (Mitchell, page 23, Algorithm 7, PNG media_image2.png 384 409 media_image2.png Greyscale Where “the purpose of this paper is to describe how to efficiently implement decision tree learning for XGBoost on a GPU. GPUs can be thought of at a high level as having a shared memory architecture with multiple SIMD (single instruction multiple data) processors” (Mitchell, page 9, lines 185-187). Examiner notes that line 9 maintains the storage of the selected entry during the pause, in which the selected entries are the input tiles.); and resume the classification process before the second cycle by accessing the selected entry from the register (Mitchell, page 23, Algorithm 7, PNG media_image2.png 384 409 media_image2.png Greyscale And Mitchell, page 21, Algorithm 6, PNG media_image3.png 259 622 media_image3.png Greyscale Examiner notes that line 7 through line 10 is a cycle in Algorithm 7. Examiner further notes that the process in line 6 in Algorithm 7 is shown in Algorithm 6, in which line 5 of Algorithm 7 and the whole of Algorithm 6 show the process of accessing the selected entry from the register. Examiner additionally notes that the input tiles are the selected entries.). Fu and Mitchell are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to pause the classification process as in Mitchell. Doing so is advantageous because “GPUs are an effective tool for accelerating the gradient boosting process and can provide significant speed advantages” (Mitchell, page 3, lines 35-36). Regarding claim 15, claim 15 recites substantially similar limitations to claim 5, and is therefore rejected under the same analysis. Claim(s) 6-7 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu in view of Ahuja et al. (“US 2023/0075424 A1”) (hereafter referred to as Ahuja). Regarding claim 6, Fu teaches the method of claim 1. Fu does not teach, but Ahuja does teach further including a counter to increment a count corresponding to a number of cycles (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached.”). Fu and Ahuja are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to have a counter as int Ahuja. Doing so is advantageous because “this allows for a simplified decision tree processing system to be implemented that eliminates the need of storing the history of all the paths and, thus, can have a high throughput” (Ahuja, page 10, paragraph 0026). Regarding claim 7, Fu teaches the method of claim 6. Fu does not teach, but Ahuja does teach wherein the logic circuitry is to discard an output classification when the count exceeds a second threshold (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached. A final decision may be reached when the decision tree processes all its levels and arrives at a specific leaf node, where the value(s) of the specific leaf node are the decision for the respective decision tree. The system 400 can be reset once the level counter ‘L’ is greater the total number of levels in the decision tree” where “methods and functions may be performed by modules or engines, both of which may include one or more physical components of a computing device (e.g., logic circuits, processors, controllers, etc.)” (Ahuja, page 8 paragraph 0012). Examiner notes that by resetting the system, an output classification is discarded.). Fu and Ahuja are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to have a counter as int Ahuja. Doing so is advantageous because “this allows for a simplified decision tree processing system to be implemented that eliminates the need of storing the history of all the paths and, thus, can have a high throughput” (Ahuja, page 10, paragraph 0026). Regarding claim 16, Fu teaches the non-transitory computer readable storage medium of claim 11. Fu does not teach, but Ahuja does teach increment a count corresponding to a number of cycles (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached.”). and discard an output classification when the count exceeds a second threshold (Ahuja, page 10, paragraph 0034, “Once the next node address is computed, the current level counter ‘L’ is also increased by 1 to point to the next active level (depth of the decision tree). The next node address can be retrieved from the memory 402 and the system 400 can process the next level of the decision tree until a final decision has been reached. A final decision may be reached when the decision tree processes all its levels and arrives at a specific leaf node, where the value(s) of the specific leaf node are the decision for the respective decision tree. The system 400 can be reset once the level counter ‘L’ is greater the total number of levels in the decision tree” where “methods and functions may be performed by modules or engines, both of which may include one or more physical components of a computing device (e.g., logic circuits, processors, controllers, etc.)” (Ahuja, page 8 paragraph 0012). Examiner notes that by resetting the system, an output classification is discarded.). Fu and Ahuja are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to have a counter as int Ahuja. Doing so is advantageous because “this allows for a simplified decision tree processing system to be implemented that eliminates the need of storing the history of all the paths and, thus, can have a high throughput” (Ahuja, page 10, paragraph 0026). Claim(s) 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu in view of Lefkofsky et al. (“US 2020/0211716 A1”) (hereafter referred to as Lefkofsky). Regarding claim 13, Fu teaches the non-transitory computer readable storage medium of claim 12. Fu does not teach, but Lefkofsky does teach wherein the instruction cause the one or more processors to determine that the updated node identifier corresponding to a classification when the updated node identifier is a negative value (Lefkofsky, page 58, paragraph 0240, “In other cases leaf nodes may also generate low negative values for the difference of “prediction minus target”; for example, a prediction minus target may be [0.05-1 ]= -0.95, which would indicate that the patient’s condition would be unlikely to progress but in some instance it may still progress” and “The processing device 3402 is configured to execute instructions 3422 for performing the operations and steps discussed herein” (Lefkofsky, page 63, paragraph 0295). Examiner notes that the leaf is the updated node identifier, and the classification is the indication that the patient’s condition would be unlikely to progress.) Fu and Lefkofsky are considered analogous to the claimed invention because they both use decision trees and random forests for classification. It would have been obvious to one having ordinary skill in the art prior to the effective filing date to have modified Fu to use negative values. Doing so is advantageous because it “enable[s] deeper exploration of the change in feature importance with varying feature value”. Regarding claim 14, Fu in view of Lefkofsky teaches the non-transitory computer readable storage medium of claim 13, Fu in view of Lefkofsky further teaches wherein the logic circuitry is to output a classification for the input feature array based on the value of the selected fourth or fifth entry when the fourth or fifth entry corresponds to the leaf of the random forest (Fu, page 19, paragraph 0060, “A root-to-leaf path (e.g., illustrated by the dashed line) is traversed in the decision tree 96 from root node 100 to node 104 to node 112, and finally classified as classification node 118 (e.g., “Class 2”). The automata processor 30 may thus classify the input feature-vector 98 as belonging to “Class 2” by utilizing the decision tree 96” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node… may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the logic circuitry is the processor and the classification node is the leaf. Examiner further notes that the next-state is the selected fourth entry with a feature value of f2.). Response to Arguments The previous 112(b) rejections have been withdrawn in light of the instant amendments. Examiner notes that new 112 rejections have been made in light of the instant amendments. On pages 12-14, Applicant argues: The Office Action alleges that independent claims 1, 11, and 20 recite a mental process. Office Action, pp. 6-7. Claim 1 is not directed to a mental process. Claim 1 sets forth "memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest" and "when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle." The features "memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest" and "when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array and when the selected entry is not associated with the leaf of the random forest, initiate a second cycle." cannot be performed in the mind. Nor did human minds do such things before the advent of computers. … Similarly, here, the memory including a classification data structure, the outputting of a classification associated with the input feature array and the initiation a second cycle, of pending claim 1, cannot be practically performed in the human mind, at least because it requires accessing a memory including a classification data structure, outputting a classification associated with the input feature array and initiation of a second cycle. The human mind cannot perform such operations. Regarding the Applicant’s argument that the claims are not directed to a mental process, the Examiner respectfully disagrees. Specifically, Examiner notes that the independent claims recite the mental processes of “compare the feature value to a threshold corresponding to the initial node identifier;”, “select a second entry of the plurality of entries when the first feature value exceeds the first threshold;”, and “select a third entry when the first feature value is below the first threshold.” Further, Examiner notes that the limitation “memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest” recites generic computing components on which to apply the abstract idea and using a computer as a tool to perform the abstract idea cannot provide significantly more (see MPEP 2106.05(f)). Examiner additionally notes that “when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array” and “when the selected entry is not associated with the leaf of the random forest, initiate a second cycle” are insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)). The former limitation of outputting a classification is the well understood, routine, and conventional activity of “transmitting or receiving data over a network” (see MPEP 2106.05(d)(II); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network)), and the latter limitation of initiating a second cycle is the well understood, routine, and conventional activity of “Performing repetitive calculations” (see MPEP 2106.05(d)(II); Flook, 437 U.S. at 594, 198 USPQ2d at 199) which cannot provide significantly more than the judicial exception. On pages 14-15, Applicant argues: The claim at issue in Enfish was directed to a specific improvement on "how computers could carry out one of their basic functions of storage and retrieval of data." Elec. Power Grp., LLC v. Alstom S.A., 830 F.3d 1350, 1354 (Fed. Cir. 2016) (citing Enfish, 822 F.3d at 1335-36). Similarly, here, claim 1 is a specific improvement on how a computer can implement a random forest. Regarding the Applicant’s argument that claim 1 provides an improvement, Examiner respectfully disagrees. Specifically, Examiner notes that the Applicant provides a bare assertion of an improvement without the detail necessary to be apparent to one of ordinary skill in the art and, thus, cannot provide an improvement (MPEP 2106.04(d)(1)). On pages 15-16, Applicant argues: On the question of whether the claims recite additional elements that integrate the judicial exception into a practical application, the Office Action alleges that the additional elements do not integrate the abstract idea into a practical application because they amount to mere "apply it on a computer." Office Action, p. 11. On the contrary, the elements of claim 1 are integrated into a practical application. See MPEP 2106.04(/I)(A) ("Step 2A is a two-prong inquiry, in which examiners determine in Prong One whether a claim recites a judicial exception, and if so, then determine in Prong Two if the recited judicial exception is integrated into a practical application of that exception." ( emphasis added)). … Similarly, here, the elements of pending claim 1 recite a specific manner of implementing a random forest by outputting a classification associated with the input feature array or initiating a second cycle based on the selected entry being associated with a leaf of the random forest. Regarding the Applicant’s argument that additional elements integrate the judicial exception into a practical application, Examiner respectfully disagrees. Specifically, Examiner notes that the additional elements “when the selected entry is associated with a leaf of the random forest, output a classification associated with the input feature array” and “when the selected entry is not associated with the leaf of the random forest, initiate a second cycle” do not integrate the abstract idea into a practical application because they recites insignificant extra-solution activity of data gathering (see MPEP 2106.05(g)).) On page 16, Applicant argues: In addition, the Federal Circuit held that the claims at issue in En.fish resulted in a technological improvement as directed to patent-eligible subject matter regardless of the claimed improvement being implemented on a general-purpose computer. En.fish at 1338 ("Moreover, we are not persuaded that the invention's ability to run on a general-purpose computer dooms the claims."). The En.fish court held "that the claims at issue in this appeal are not directed to an abstract idea within the meaning of Alice. Rather, they are directed to a specific improvement to the way computers operate, embodied in the self-referential table." En.fish at 1336. Here, claim 1 is directed to a specific improvement in how random forests are implemented. This is not merely adding "insignificant pre-solution activities," as alleged in the Office Action. Regarding the Applicant’s argument that these elements provide an improvement, Examiner respectfully disagrees. Specifically, Examiner notes that the Applicant provides a bare assertion of an improvement without the detail necessary to be apparent to one of ordinary skill in the art and, thus, cannot provide an improvement (MPEP 2106.04(d)(1)). On pages 18-19, Applicant argues: Claim 1 of the instant application contains a unique, ordered combination of elements that set forth particular technical features of selecting entries based on a comparison of the first feature value to the first threshold, outputting a classification associated with the input feature array when the selected entry is associated with a leaf of the random forest, and initiating a second cycle when the selected entry is not associated with the leaf of the random forest. The particular arrangement of elements in claim 1 of the instant application results in at least the technical improvement of implementing a random forest in a system that includes limited resources. As noted in the August 2025 USPTO guidance on subject matter eligibility, examiners were reminded that if it is a "close call" as to whether a claim is eligible, they should only make a rejection when it is more likely than not (i.e., more than 50%) that the claim is ineligible under 35 U.S.C. 101. A rejection of a claim should not be made simply because an examiner is uncertain as to the claim's eligibility. In order to make a rejection of a claim under any of the statutory bases (i.e., 35 U.S.C. 101, 102, 103, 112), unpatentability must be established by a preponderance of the evidence. An important consideration in determining whether a claim improves technology or a technical field is the extent to which the claim covers a particular solution to a problem or a particular way to achieve a desired outcome, as opposed to merely claiming the idea of a solution or outcome. The examiner is reminded to consult the specification to determine whether the disclosed invention improves technology or a technical field, and evaluate the claim to ensure it reflects the disclosed improvement. The specification does not need to explicitly set forth the improvement, but it must describe the invention such that the improvement would be apparent to one of ordinary skill in the art. The claim itself does not need to explicitly recite the improvement described in the specification. Charles Kim, Deputy Commissioner for Patents, USPTO, Memorandum: Reminders on evaluating subject matter eligibility of claims under 35 U.S.C. 101 (August 4, 2025). As noted by the Director, subject matter eligibility rejections should be the exception, rather than the rule. The presently pending claims clearly recite patent eligible subject matter rooted in technology and providing a technological solution to a particular technological problem. Regarding the Applicant’s argument that these elements provide an improvement, Examiner respectfully disagrees. Specifically, Examiner notes that the Applicant provides a bare assertion of an improvement without the detail necessary to be apparent to one of ordinary skill in the art and, thus, cannot provide an improvement (MPEP 2106.04(d)(1)). On pages 20-21, Applicant argues: Fu generally mentions that "the input data to be streamed (e.g., from the processor 12) to the automata processor 30 may be generated by the processor 12 based on a feature vector 130 corresponding to the input data". (Fu, para. [0064]). However, even if the input data described by Fu is construed as a classification data structure, a suggestion that the Applicant does not agree, but only discusses for the sake of explanation, Fu still fails to teach a classification data structure including a plurality of entries, each associated with a node of the random forest. Fu further mentions that "the processor 12 may access a lookup-table (LUT) 146, which may include an array of feature labels corresponding to the feature values 144." (Id, para. [0065]). However, a lookup-table including an array of feature labels does not teach or suggest a classification data structure including a plurality of entries, each associated with a node of the random forest. Further, Fu mentions "the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node ... may correspond to the next-state if the threshold qualification is met" (Id, para. [0059]). However, Fu mentions a processor that utilizes a threshold to inform a decision tree which includes nodes and classification nodes. That is, the threshold of Fu is used to inform decisions in a decision tree and not to select entries of a classification data structure. Accordingly, Fu does not teach or suggest an apparatus including memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest, and logic circuitry to select a second plurality of entries when the first feature value exceeds the first threshold or select a second value when the first feature value is below the first threshold, as set forth in claim 1. Regarding the Applicant’s argument that Fu does not teach “an apparatus including memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forest, and logic circuitry to select a second plurality of entries when the first feature value exceeds the first threshold or select a second value when the first feature value is below the first threshold”, Examiner respectfully disagrees. Specifically, Figure 9 teaches the classification data structure including a plurality of entries each associated with a node of the random forest. See Figure 9 below PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that the entries are the features of f0, f1, f2, etc. Examiner additionally notes that the claims do not recite “select a second plurality of entries” or “select a second value when the first feature value is below the first threshold. Instead, the claims recite and Fu teaches: the logic circuitry to: select a second entry of the plurality of entries when the first feature value exceeds the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that next-state 102 selects the second entry of f4 when f1, the first feature value exceeds the first threshold of 0.2. The logic circuitry is the processor.); or select a third entry of the plurality of entries when the first feature value is below the first threshold (Fu, page 18, paragraph 0059, “Each right node (e.g., child nodes 104, 108, and 112) may correspond to the previous state if the threshold qualification is not met” where “the processor 12 may capture this threshold check for the split feature as a split node in the decision tree 96, in which each left node (e.g., child nodes 102, 106, and 110) may correspond to the next-state if the threshold qualification is met” (Fu, page 18, paragraph 0059) and Fu, FIG. 9 PNG media_image1.png 698 1378 media_image1.png Greyscale Examiner notes that previous-state 104 selects the second entry of f3 when f1, the first feature value is below the first threshold of 0.2. The logic circuitry is the processor.); On pages 21-22, Applicant argues: Independent claim 11 sets forth a non-transitory computer readable medium including instructions to cause one or more processors to at least access a first entry of a plurality of entries of a classification data structure, ones of the plurality of entries associated with a node of a random forest, and select a second entry of the plurality of entries when the first feature value exceeds the first threshold, or select a third entry of the plurality of entries when the first feature value is below the first threshold. Fu does not to anticipate such a non-transitory computer readable storage medium. Thus, independent claim 11 and all claims depending therefrom are allowable over Fu. Withdrawal of the§ 102 rejections therefrom is respectfully requested. Independent claim 20 sets forth an apparatus including a memory including a classification data structure, the classification data structure including a plurality of entries, each associated with a node of the random forests, and processor circuitry to select a second entry of the plurality of entries when the first feature value exceeds the first threshold or select a third entry of the plurality of entries when the first feature value is below the first threshold. Fu does not to anticipate such an apparatus. Thus, independent claim 10 and all claims depending therefrom are allowable over Fu. Withdrawal of the § I 02 rejections therefrom is respectfully requested. Regarding Applicant’s argument that Fu does not anticipate the non-transitory computer readable medium and the apparatus set forth in claims 11 and 20, Examiner respectfully disagrees. Specifically, Examiner notes that besides the difference in statutory category, claims 1, 11, and 20 recite substantially similar limitations. As such, claims 11 and 20 are rejected under 102 in a similar fashion as claim 1. Examiner respectfully points the Applicant to the above prior art rejections. Regarding the Applicant’s argument that the dependent claims are allowable at least due in part to their dependency on the independent claims, the Examiner respectfully disagrees and notes the instant rejections and response to arguments regarding the independent claims above. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Sharp (“Implementing Decision Trees and Forests on a GPU”) also discusses decision trees and random forests used for classification. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAITLYN R LAU whose telephone number is (571)272-1429. The examiner can normally be reached Monday - Thursday: 8:00 am - 6:00 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michelle Bechtold can be reached at (571) 431-0762. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /K.R.L./Examiner, Art Unit 2148 /MICHELLE T BECHTOLD/Supervisory Patent Examiner, Art Unit 2148
Read full office action

Prosecution Timeline

Jan 13, 2022
Application Filed
Oct 17, 2025
Non-Final Rejection mailed — §101, §102, §103
Jan 14, 2026
Response Filed
Feb 24, 2026
Final Rejection mailed — §101, §102, §103
Apr 24, 2026
Response after Non-Final Action
May 19, 2026
Request for Continued Examination
May 22, 2026
Response after Non-Final Action
Aug 11, 2026
Non-Final Rejection mailed — §101, §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12688298
FEATURE SELECTION FOR CYBERSECURITY THREAT DISPOSITION
4y 7m to grant Granted Jul 21, 2026
Patent 12602431
METHODS FOR PERFORMING INPUT-OUTPUT OPERATIONS IN A STORAGE SYSTEM USING ARTIFICIAL INTELLIGENCE AND DEVICES THEREOF
3y 10m to grant Granted Apr 14, 2026
Patent 12572828
METHOD FOR INDUSTRY TEXT INCREMENT AND ELECTRONIC DEVICE
4y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 3 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
60%
Grant Probability
99%
With Interview (+66.7%)
3y 11m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 10 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month