DETAILED ACTION
This final action is in response to the amendment and remarks filed 07/14/2025 for application 17/615,945.
Claims 9, 11, 16, and 18-19 have been amended. Claims 1-8, 10, and 17 have been cancelled.
Claims 9, 11-16, and 18-21 thereby remain pending in the application. Claims 9 and 16 are independent claims.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification is objected to because the title of the invention (“Inference Processing Apparatus and Inference Processing Method”) is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Method and Apparatus for Alternating Feedback Modes to Reduce Processing Time of Recurrent Neural Network”.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
“An inference calculator” in claims 9-15 as described in P[0074-0076] of the disclosure.
“A first determination device” in claim 9 as described in P[0073-0078 and 0123-0132] of the disclosure.
“A second determination device” in claim 13 as described in P[0162-0166 and 0201-0205] of the disclosure.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9, 11-16, and 18-21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 9, it recites the limitation “wherein the process performed by the inference calculator ends when the first memory does not have the input data for which inference performed in the inference calculator is needed”. It is unclear, in view of previously recited limitations, what “process” is being referred to by the recited “process performed by the inference calculator”. It is further unclear if the recitation of “when the first memory does not have the input data for which inference performed in the inference calculator is needed” is referring to the condition of a particular input data being absent from the first memory, or is instead simply referring to the condition of there being no remaining input data in the first memory for processing. Consequently, the intended scope of the claim is indefinite
For purposes of examination and as best understood in light of the specification [¶ 0089-0090], the limitation is interpreted as “wherein inference processing performed by the inference calculator ends when the first memory does not have remaining input data for which inference processing is needed”.
Regarding claim 16, it has substantially similar deficiencies to those found in claim 9 above. Consequently, it is rejected for the same reasons and likewise interpreted as detailed above.
Regarding claims 11-15 and 18-21, they inherit the deficiencies of their parent claims. Consequently, they are also rejected under 35 U.S.C. 112(b) as being indefinite for depending on an indefinite parent claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9, 14-15, 16, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over DIRIL et al (“DIRIL”) (US 20190171927) in view of DAS et al (“DAS”) (US 10108850), WOO et al (“WOO”) (US 10019668), (“TERASAKI”) (US 20200210818), CELLA et al (“CELLA”) (US 20180284758), and KANG et al. (Pub. No. US 20180046897 A1, “Hardware Accelerator for Compressed RNN on FPGA”, published 02/15/2018).
Regarding claim 9, DIRIL teaches: [a]n inference processing apparatus comprising: an inference calculator configured to perform calculation of a neural network (page 12, P[0029] a hardware processing unit 160, which may include one or more processors and data storage units used for performing inference calculations for layers of a neural network.); a second memory configured to store the weight; a third memory configured to store a first value relating to an inference result of the neural network (page 14, P[0043] Buffer 780 may be a memory device or other data storage unit for use during inference operations, for instance for storing weights, output data, etc).
However, DIRIL does not expressly teach an inference calculator configured to perform calculation of a neural network based on input data of each of consecutive time steps and a first operation mode in which the inference calculator performs calculation of the neural network based on the input data, the weight, and the first value at each of the consecutive time steps, wherein the first value is an inference result obtained by the inference calculator at an immediately previous time step of the consecutive time steps
DAS teaches: an inference calculator configured to perform calculation of a neural network based on input data of each of consecutive time steps (page 66, column 40, lines 36-41 The RNN 1400 operates based on time-steps. The state of the RNN at a given time step is influenced based on the previous time step via the feedback mechanism 1405. For a given time step, the state of the hidden layers 1404 is defined by the previous state and the input at the current time step. [Examiner notes: the RNN is considered to be the inference calculator]), and a first operation mode in which the inference calculator performs calculation of the neural network based on the input data, the weight, and the first value at each of the consecutive time steps (page 66, column 40, lines 36-41 The RNN 1400 operates based on time-steps. The state of the RNN at a given time step is influenced based on the previous time step via the feedback mechanism 1405. For a given time step, the state of the hidden layers 1404 is defined by the previous state and the input at the current time step. Page 65, column 38, lines 8-16 Recurrent neural networks (RNNs) are a family of feedforward neural networks that include feedback connections 10 between layers. RNNs enable modeling of sequential data by sharing parameter data across different parts of the neural network. The architecture for a RNN includes cycles. The cycles represent the influence of a present value of a variable on its own value at a future time, as at least a portion of the 15 output data [first value] from the RNN is used as feedback for processing subsequent input in a sequence.”), wherein the first value is an inference result obtained by the inference calculator at an immediately previous time step of the consecutive time steps (page 66, column 40, lines 32-41 “The illustrated RNN 1400 can be described has having an input layer 1402 that receives an input vector, hidden layers 1404 to implement a recurrent function, a feedback mechanism 1405 to enable a 'memory' of previous states, and an output layer 1406 to output a result. The RNN 1400 operates based on time-steps. The state of the RNN at a given time step is influenced based on the previous time step via the feedback mechanism 1405. For a given time step, the state of the hidden slayers 1404 is defined by the previous state and the input at the current time step” Page 63, column 34, lines 55-59 “Training a neural network involves selecting a network topology, using a set of training data representing a problem being modeled by the network, and adjusting the weights until the network model performs with a minimal error for all instances of the training data set.” Page 63, column 34, lines 36-49 “A feedforward network may be implemented as an acyclic graph in which the nodes are arranged in layers. Typically, a feedforward network topology includes an input layer and an output layer that are separated by at least one hidden layer. The hidden layer transforms input received by the input layer into a representation that is useful for generating output in the output layer. The network nodes are fully connected via edges to the nodes in adjacent layers, but there are no edges between nodes within each layer. Data received at the nodes of an input layer of a feedforward network are propagated (i.e., "fed forward") to the nodes of the output layer via an activation function that calculates the states of the nodes of each successive layer in the network based on coefficients ("weights") respectively associated with each of the edges connecting the layers.” Page 65, column 38, lines 8-16 Recurrent neural networks (RNNs) are a family of feedforward neural networks that include feedback connections 10 between layers. RNNs enable modeling of sequential data by sharing parameter data across different parts of the neural network. The architecture for a RNN includes cycles. The cycles represent the influence of a present value of a variable on its own value at a future time, as at least a portion of the 15 output data [first value] from the RNN is used as feedback for processing subsequent input in a sequence.”). DIRIL and DAS are analogous arts because both relate to inference calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL with the output value based on each of the consecutive time steps from DAS. Doing so would increase the processing efficiency for inference calculations. (DAS: page 47, column 1, lines 31-33)
However, DIRIL and DAS do not expressly teach a first memory configured to store the input data.
WOO teaches: a first memory configured to store the input data (page 10, column 4, lines 47-52 that is electrically coupled to the hardware circuit. The hardware circuit can be a packaged electronic device that includes one or more non-transitory machine-readable 50 storage mediums (e.g., memory) for storing inputs to a neural network layer and parameters used to process the inputs.). DIRIL, DAS, and WOO are considered analogous because they relate to inference calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL and DAS with the storage of input data for inference calculation from WOO. Doing so would optimize the memory for the processing of inputs through the neural network. (WOO: page 10, lines 14-18)
However, DIRIL, DAS, and WOO do not expressly teach a weight of a trained neural network to infer a feature of the input data.
TERASAKI teaches: a weight of a trained neural network to infer a feature of the input data (page 11, P[0006] “In a recurrent neural network, a hidden layer of a neural network such as a multilayer perceptron is coupled to a subsequent-stage layer (for example, an output layer) and a layer (a recurrent layer) which is recurrently coupled to an input of the hidden layer is also provided. A weight of the recurrent layer is a combination of all units of the hidden layer in a round-robin manner.” Page 22, P[0232] “The neural network system 201 performs a feature extracting process and an identification process on the data of an image input from the image sensor 202 and outputs data of the process results to the automatic driving control unit 203). DIRIL, DAS, WOO, and TERASAKI are considered analogous to the claimed invention because they use neural networks to identify features. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL, DAS, and WOO with the weight from a trained neural network to identify a feature of the input data from TERASAKI. Doing so would decrease the cost and power usage of the device. (TERASAKI: P[0407])
However, DIRIL, DAS, WOO, and TERASAKI do not expressly teach a first switching controller configured to control switching between a first operation mode in which the inference calculator performs calculation of the neural network, and a second operation mode in which the inference calculator performs calculation of the neural network based on the input data and the weight at each of the consecutive time steps, wherein the first switching controller includes: a first switch configured to generate a control signal indicating switching between the first operation mode and the second operation mode.
CELLA teaches: a first switching controller configured to control switching between a first operation mode in which the inference calculator performs calculation of the neural network based on the input data, the weight, and the first value at each of the consecutive time steps and a second operation mode in which the inference calculator performs calculation of the neural network based on the input data and the weight at each of the consecutive time steps, wherein the first switching controller includes: a first switch configured to generate a control signal indicating switching between the first operation mode and the second operation mode (page 374, P[0925] “In one non-limiting example, an expert system may switch from a simple neural network structure like a feedforward neural network [second operation; uses inputs and weights to perform calculations] to a more complex neural network structure like a recurrent neural network, a convolutional neural network, or the like [first operation; uses inputs, weights, and outputs to perform calculation] upon receiving an indication that a continuously variable transmission is being used to drive a generator, turbine, or the like in a system being analyzed.” Page 303, P[0463] “As an example, a signal source, such as a sensor in an industrial environment may provide a data valid signal that transmits an indication of when data from the sensor is available.”) DIRIL, DAS, WOO, TERASAKI, and CELLA are considered analogous because they relate using neural networks to perform calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL, DAS, WOO, and TERASAKI with the switching controller to switch between neural networks from CELLA. Doing so would improve neural network model training. (CELLA: P[0939])
However, DIRIL, DAS, WOO, TERASAKI, and CELLA do not expressly teach wherein the first switching controller includes: a first determination device configured to determine whether or not the first operation mode or the second operation mode has ended based on a preset condition regarding a number of pieces of input data to be processed by the inference calculator; and switching between the first operation mode and the second operation mode based on a determination result of the first determination device, and wherein the process performed by the inference calculator ends when the first memory does not have the input data for which inference performed in the inference calculator is needed.
KANG teaches a means of recurrent neural network optimization (“The present invention relates to artificial neural networks, e.g., recurrent neural network (RNN). In particular, the present invention relates to how to implement a hardware accelerator for compressed RNN based on an embedded FPGA” [Kang ¶ 0002]) comprising a first determination device configured to determine whether or not a first or second operation mode has ended based on a preset condition regarding a number of pieces of input data to be processed by the inference calculator (“The present invention employs a state machine. The RNN operation is performed through the state transition of the state machine. In the present invention, the parallelized pipeline design of the customized circuit is reflected in the control of the state machine. Pipeline design can effectively balance the I/O bandwidth and the computational efficiency for specific RNN models.…FIG. 8 shows the state transition of a state machine according to one embodiment of the present invention…In one embodiment of the present invention, the state machine includes three states…As shown in FIG. 8, State_1 and State_2 are conducted alternatively” [Kang ¶ 0121-0129]; “The Activation Read/Write Unit contains two activation register files that accommodate the source and destination activation values respectively during a single round of FC layer computation. The source and destination register files exchange their role for next layer” [Kang ¶ 0066]; “The Central Control Unit (CCU) is the root LNZD Node. It communicates with the master such as CPU and monitors the state of every PE by setting the control registers. There are two modes in the Central Unit: I/O and Computing… the CCU will keep collecting and sending the values from source activation banks in sequential order until the input length is exceeded.” [Kang ¶ 0071, 0073]; Kang discloses control of state monitoring and state transitions of RNN operations implemented on processing elements (PEs) through the CCU (i.e., determination device), wherein set input length in source activation register files indicates when an operation ends), and switching between operation mode[s] based on a determination result of the first determination device ([Kang ¶ 0121-0129, 0066, 0071, 0073] as detailed above), and wherein the process performed by the inference calculator ends when a first memory does not have the input data for which inference performed in the inference calculator is needed (“The Activation Read/Write Unit contains two activation register files that accommodate the source and destination activation values respectively during a single round of FC layer computation. The source and destination register files exchange their role for next layer” [Kang ¶ 0066]; “ActQueue Unit 110: ActQueue Unit 110 receives and stores input vectors, and then sends them to ALU 140. Input vectors of ActQueue 110 include vector x in RNN's input sequence and hidden layer activation h.Further, ActQueue Unit 110 may comprise several first-in-first-out buffers (FIFOs), each of which corresponds to one PE” [Kang ¶ 0099-0100]; “… the CCU will keep collecting and sending the values from source activation banks in sequential order until the input length is exceeded.” [Kang ¶ 0073]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have incorporated the teachings of KANG into DIRIL, DAS, WOO, TERASAKI, and CELLA because KANG is analogously directed towards recurrent neural network optimization. Incorporating the pipeline design teachings of KANG via modification of the switch configuration taught by CELLA would allow the overall system to be better adapted to the particular operations of the RNN model of DIRIL, thereby balancing I/O bandwidth and improving computational efficiency (“The RNN operation is performed through the state transition of the state machine. In the present invention, the parallelized pipeline design of the customized circuit is reflected in the control of the state machine. Pipeline design can effectively balance the I/O bandwidth and the computational efficiency for specific RNN models” [Kang ¶ 0121]).
Regarding claim 14, DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG teaches all of the limitations of claim 9 as shown in the rejection above. DIRIL also teaches: [t]he inference processing apparatus according to claim 9, wherein the inference calculator includes a plurality of inference calculators (page 12, P[0029] a hardware processing unit 160, which may include one or more processors and data storage units used for performing inference calculations for layers of a neural network.)
DIRIL does not expressly teach configured to perform calculations of the neural network in parallel.
However, DAS teaches: configured to perform calculations of the neural network in parallel (page 47, column 2, lines 35-37 FIG. 9B illustrates a framework for parallel execution of neural networks in machine learning according to one embodiment.). DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG are considered analogous because their neural networks perform inference calculation. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG with the parallel neural network calculations from DAS. Doing so would increase the processing efficiency for inference calculations. (DAS: page 47, column 1, lines 31-33)
Regarding claim 15, DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG teaches all of the limitations of claim 9 as shown in the rejection above. DIRIL also teaches: [t]he inference processing apparatus according to claim 9 (page 12, P[0029] a hardware processing unit 160, which may include one or more processors and data storage units used for performing inference calculations for layers of a neural network.), wherein the neural network is a recurrent neural network (page 14, P[0041] Embodiments of the instant disclosure may also be applied to a recurrent neural network (RNN)).
Regarding claims 16 and 21, they are method claims that largely correspond to the apparatuses of claims 9 and 15, which are already taught by the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG as detailed above. Consequently, they are rejected for the same reasons as claims 9 and 15.
Claims 11 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG, as applied to claims 9 and 16, further in view of SUMIMOTO et al (“SUMIMOTO”) (JP 2008204555).
Regarding claim 11, the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG teaches all of the limitations of claim 9 as shown in the rejection above. DIRIL also teaches [t]he inference processing apparatus according to claim 9 (page 12, P[0029] a hardware processing unit 160, which may include one or more processors and data storage units used for performing inference calculations for layers of a neural network.), further comprising a memory controller (page 16, P[0060] For example, as illustrated in FIG. 8, computing system 810 may include a memory controller 818, an Input/Output (I/O) controller 820, and a communication interface 822.) wherein the inference calculator (page 12, P[0029] a hardware processing unit 160, which may include one or more processors and data storage units used for performing inference calculations for layers of a neural network.).
CELLA teaches: when the control signal indicates switching to the second operation mode (page 374, P[0925] “In one non-limiting example, an expert system may switch from a simple neural network structure like a feedforward neural network to a more complex neural network structure like a recurrent neural network, a convolutional neural network, or the like upon receiving an indication [signal] that a continuously variable transmission is being used to drive a generator, turbine, or the like in a system being analyzed.” Page 303, P[0463] “As an example, a signal source, such as a sensor in an industrial environment may provide a data valid signal that transmits an indication of when data from the sensor is available.”). DIRIL and CELLA are considered analogous because they both relate to using neural networks to perform calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL with the control signal indication to switch operations from CELLA. Doing so would improve neural network model training. (CELLA: P[0939])
WOO teaches: is configured to batch-process calculations of the neural network based on the input data corresponding to the preset batch size (page 13, column 9, lines 55-59 In particular, the maximum batch size supported by storage units 204 can be determined based, in part, on the largest working set of inputs and parameters that are processed by a given neural network layer. Page 14, column 11, lines 53-58 At block 406, circuit 100 processes the batch of neural network inputs using the hardware circuit of the system. In some implementations, processing a batch of neural network inputs using the hardware circuit can include loading respective sets of parameters for the layers in the superlayer into memory 106.). DIRIL, CELLA, and WOO are considered analogous because they relate to using neural networks to perform calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL and CELLA with the processing of batch calculations of a neural network and the predetermined batch size from WOO. Doing so would optimize the memory for the processing of inputs through the neural network. (WOO: page 10, lines 14-18)
However, DIRIL, CELLA, and WOO do not expressly teach configured to read the input data corresponding to a preset batch size from the first memory.
SUMIMOTO teaches: configured to read the input data corresponding to a preset batch size from the first memory (page 9, lines 21-23 the test data is written to the memory cell block A data input / output circuit for performing control to divide all the bit data of the memory cell block into a specific data width and read the data in a batch;). DIRIL, CELLA, WOO, and SUMIMOTO are considered analogous because they relate to using operations to perform calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL the reading input data from a batch from SUMIMOTO. Doing so would improve the speed of the calculations. (SUMIMOTO: page 2, line 5)
Regarding claim 18, it is a method claim that largely corresponds to the apparatus of claim 11, which is already taught by the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, KANG, and SUMIMOTO as detailed above. Consequently, it is rejected for the same reasons as claim 11.
Claims 12-13 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG, as applied to claims 9 and 16 above, and further in view of MATSUOKA et al (“MATSUOKA”) (US 5956702).
Regarding claim 12, the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, and KANG teaches all of the limitations of claim 9 as shown in the rejection above. DIRIL also teaches: [t]he inference processing apparatus according to claim 9 (page 12, P[0029] a hardware processing unit 160, which may include one or more processors and data storage units used for performing inference calculations for layers of a neural network.), further comprising: a fourth memory (page 17, P[0070] Storage devices 832 and 833 generally represent any type or form of storage device or medium capable of storing data and/or other computer-readable instructions.).
CELLA teaches: a second switching controller configured to control switching between a third operation mode in which the inference calculator performs calculation of the neural network (page 374, P[0925] “In one non-limiting example, an expert system may switch from a simple neural network structure like a feedforward neural network to a more complex neural network structure like a recurrent neural network, a convolutional neural network, or the like upon receiving an indication [signal] that a continuously variable transmission is being used to drive a generator, turbine, or the like in a system being analyzed.” Page 303, P[0463] “As an example, a signal source, such as a sensor in an industrial environment may provide a data valid signal that transmits an indication of when data from the sensor is available.”). DIRIL and CELLA are considered analogous because they both relate to using neural networks to perform calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL with the control signal indication to switch operations from CELLA. Doing so would improve neural network model training. (CELLA: P[0939])
However, DIRIL and CELLA do not expressly teach configured to store a second value relating to an internal state of an intermediate layer of the neural network and using the second value at each of the consecutive time steps and a fourth operation mode in which the inference calculator performs calculation of the neural network without using the second value at each of the consecutive time steps, wherein the second value is an internal state of the intermediate layer of the neural network at an immediately previous time step of the consecutive time steps.
MATSUOKA teaches: configured to store a second value relating to an internal state of an intermediate layer of the neural network (page 57, column 34, claim 17, lines 12-15 “neural network means for storing an internal state representing information about a probability in which a probability distribution relating to a discrete value of the time-series [time-steps] data is selected; and estimated value output means for obtaining an estimated value having a high occurrence probability using the internal state, and outputting the estimated value as an estimation result.” Page 41, column 2, lines 21-32 “To solve the problems of network scales, a recurrent neural network having a feedback structure has been designed (Jerome T. Connor, R. Douglas Martin, and L. E. Atlas. Recurrent Neural Networks and Robust Time Series Prediction, IEEE Transactions on Neural Networks, 5(2):240-254, March 1994.). There are two main types of recurrent neural networks. That is, a method in which an output layer recurs (Jordan method), and a method in which an intermediate layer recurs (Elman method). The recurrent neural network is specifically provided with a layer for storing recurrent information.”) using the second value at each of the consecutive time steps and a fourth operation mode in which the inference calculator performs calculation of the neural network without using the second value at each of the consecutive time steps, wherein the second value is an internal state of the intermediate layer of the neural network at an immediately previous time step of the consecutive time steps (page 57, column 34, claim 17, lines 12-15 “neural network means for storing an internal state representing information about a probability in which a probability distribution relating to a discrete value of the time-series [time-steps] data is selected; and estimated value output means for obtaining an estimated value having a high occurrence probability using the internal state, and outputting the estimated value as an estimation result.” Page 41, column 2, lines 21-32 “To solve the problems of network scales, a recurrent neural network having a feedback structure has been designed (Jerome T. Connor, R. Douglas Martin, and L. E. Atlas. Recurrent Neural Networks and Robust Time Series Prediction, IEEE Transactions on Neural Networks, 5(2):240-254, March 1994.). There are two main types of recurrent neural networks. That is, a method in which an output layer recurs (Jordan method), and a method in which an intermediate layer recurs (Elman method). The recurrent neural network is specifically provided with a layer for storing recurrent information.” Page 43, column 6, lines 26-32 “The capabilities of exactly following great changes in trend that a linear model cannot follow are guaranteed by assigning a discrete variable to a hidden element of a neural network. At this time, an identifying method is also provided to configure a filter capable of appropriately follow the changes. To process [calculate] an abnormal value that cannot be processed by a linear model or by assuming a simple distribution, a saturation property, that is, one of the nonlinear properties of a network, is used.” [Does not use internal state]). DIRIL, CELLA, and MATSUOKA are analogous because they use neural networks to perform calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL and CELLA with storing and using an internal state of an intermediate layer of a neural network at each of the time-steps from MATSUOKA. Doing so would aid in efficiently performing the calculations. (MATSUOKA: Page 42, column 3, lines 54-63)
Regarding claim 13, the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, KANG, and MATSUOKA teaches all of the limitations of claim 12 as shown in the rejection above. DIRIL also teaches: [t]he inference processing apparatus according to claim 12 (page 12, P[0029] a hardware processing unit 160, which may include one or more processors and data storage units used for performing inference calculations for layers of a neural network.), based on a preset condition regarding a number of pieces of input data to be processed by the inference calculator (page 15, P[0047] The scaling factor may be adjusted at any time during training or inference. For example, the scaling factor may be updated at fixed intervals (e.g., after a predetermined) number of inferences has been performed). The scaling factor may also be adjusted relative to dataset processing (e.g., after each time a dataset or group of datasets is evaluated).).
CELLA teaches: wherein the second switching controller (page 374, P[0925] “In one non-limiting example, an expert system may switch from a simple neural network structure like a feedforward neural network to a more complex neural network structure like a recurrent neural network, a convolutional neural network, or the like upon receiving an indication [signal] that a continuously variable transmission is being used to drive a generator, turbine, or the like in a system being analyzed.” Page 303, P[0463] “As an example, a signal source, such as a sensor in an industrial environment may provide a data valid signal that transmits an indication of when data from the sensor is available.”) and a second switch configured to generate a control signal indicating switching between the third operation mode and the fourth operation mode (page 374, P[0925] “In one non-limiting example, an expert system may switch from a simple neural network structure like a feedforward neural network to a more complex neural network structure like a recurrent neural network, a convolutional neural network, or the like upon receiving an indication [signal] that a continuously variable transmission is being used to drive a generator, turbine, or the like in a system being analyzed.” Page 303, P[0463] “As an example, a signal source, such as a sensor in an industrial environment may provide [generate] a data valid signal that transmits an indication of when data from the sensor is available.”). DIRIL and CELLA are considered analogous because they both relate to using neural networks to perform calculations. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine DIRIL with the control switch to switch between neural networks from CELLA. Doing so would improve neural network model training. (CELLA: P[0939])
KANG teaches a second determination device configured to determine whether or not a third or fourth operation mode has ended based on a preset condition regarding a number of pieces of input data to be processed by the inference calculator (“The present invention employs a state machine. The RNN operation is performed through the state transition of the state machine. In the present invention, the parallelized pipeline design of the customized circuit is reflected in the control of the state machine. Pipeline design can effectively balance the I/O bandwidth and the computational efficiency for specific RNN models.…FIG. 8 shows the state transition of a state machine according to one embodiment of the present invention…In one embodiment of the present invention, the state machine includes three states…As shown in FIG. 8, State_1 and State_2 are conducted alternatively” [Kang ¶ 0121-0129]; “The Activation Read/Write Unit contains two activation register files that accommodate the source and destination activation values respectively during a single round of FC layer computation. The source and destination register files exchange their role for next layer” [Kang ¶ 0066]; “The Central Control Unit (CCU) is the root LNZD Node. It communicates with the master such as CPU and monitors the state of every PE by setting the control registers. There are two modes in the Central Unit: I/O and Computing… the CCU will keep collecting and sending the values from source activation banks in sequential order until the input length is exceeded.” [Kang ¶ 0071, 0073]; Kang discloses control of state monitoring and state transitions (i.e., switching) of RNN operations implemented on processing elements (PEs) through the CCU (i.e., determination device), wherein set input length in source activation register files indicates when an operation ends) and switching between operation mode[s] based on a determination result of the second determination device ([Kang ¶ 0121-0129, 0066, 0071, 0073] as detailed above).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have incorporated the teachings of KANG into the combination because KANG is analogously directed towards recurrent neural network optimization. Incorporating the pipeline design teachings of KANG via modification of the switch configuration taught by CELLA would allow the overall system to be better adapted to the particular operations of the RNN model of DIRIL, thereby balancing I/O bandwidth and improving computational efficiency (“The RNN operation is performed through the state transition of the state machine. In the present invention, the parallelized pipeline design of the customized circuit is reflected in the control of the state machine. Pipeline design can effectively balance the I/O bandwidth and the computational efficiency for specific RNN models” [Kang ¶ 0121]).
Regarding claims 19-20, they are method claims that largely correspond to the apparatus of claims 12-13, which is already taught by the combination of DIRIL, DAS, WOO, TERASAKI, CELLA, KANG, and MATSUOKA as detailed above. Consequently, they are rejected for the same reasons as claims 12-13.
Response to Amendment and Arguments
The amendment filed 07/14/2025 has been entered.
Applicant’s amendment to the specification with respect to resolving objections has been considered, and the previous objections are consequently withdrawn.
Applicant’s amendment to the claims with respect to resolving objections has been considered, and the previous objections are consequently withdrawn.
The remarks filed 07/14/2025 have been fully considered.
Applicant’s remarks traversing the obviousness rejections under 35 U.S.C. 103 set forth in the office action mailed 05/01/2025, in view of claims 9, 11-16, and 18-21 as amended, have been considered, but are moot because the new grounds of rejection set forth above does not rely on the reference(s) applied in the prior rejection of record for the subject matter being specifically challenged in applicant' s argument (see newly added reference KANG).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wierstra et al. (Pub. No. US 20190266475 A1, “Recurrent Environment Predictors”, filed 05/03/2019) discloses a recurrent neural network that is configured to, at each of multiple time steps, receive a preceding action of an agent interacting with an environment, and update an initial hidden state, a final hidden state, and a cell state of the recurrent neural network from the preceding time step. The neural network system includes a decoder neural network that is configured, for one or more time steps, to process the final hidden state of the recurrent neural network and produce as output a predicted observation of the environment for the time step. After processing the actions that have already been performed at the one or more initial time steps, the environment simulation 100 predicts future observations that will result from the agent 102 performing planned actions at the time steps after the initial time steps by either a prediction-dependent [see ¶ 0041] prediction process or a prediction-independent [see ¶ 0042] prediction process.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/V.M.B./
Examiner, Art Unit 2143
/JENNIFER N WELCH/Supervisory Patent Examiner, Art Unit 2143
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