Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 07/29/2025 has been entered.
Response to Amendments
Acknowledgment is made of the amendment filed August 15th, 2025 (“ANE.I”), in which: claims 1 and 2 are amended; no new claims are added; no claims are canceled; and the rejection of the claims are traversed. Claims 1 – 17 are currently pending an Office Action on the merits as follows, wherein claims 3 and 8 – 17 are withdrawn from consideration.
Response to Arguments
Applicant’s arguments with respect to claims 1 – 17 have been fully considered but are moot in view of the new grounds of rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1 – 2 and 4 – 5 are rejected under 35 U.S.C. 103 as being unpatentable over Endo et al. (US 20120267690 A1), and further in view of Shinohara (US 20170243955 A1).
Regarding independent Claim 1, Endo teaches an imaging device comprising:
a first substrate (Fig. 2; first chip 201 interpreted to be a first substrate) including a photoelectric conversion section (Fig. 2; n-type charge storage regions 212 constituting the photoelectric conversion elements. See [0050]) and a first transistor (Fig. 11; transfer transistor 304. See [0034] and [0045]) in a first semiconductor substrate (Fig. 2; first substrate 204), the photoelectric conversion section and the first transistor being included in a sensor pixel (Endo teaches in [0045] that each pixel includes the photoelectric conversion element 303, the transfer transistor 304, and the amplifying transistor 306);
a second substrate (Fig. 2; the unlabeled portion of the multilayer structure 211 between the substrate 208 and interconnect layer 228 is interpreted to be a second substrate) that is stacked on the first substrate (Fig. 2) and includes a second transistor (Fig. 11; amplifying transistor 306. See [0048]) , … and
a through wiring line (Fig. 2; through electrode 235) provided in [[the]]an opening (Fig. 2; an opening is provided at the connection portion 311), the through wiring line electrically coupling the first substrate and the second substrate (Fig. 2).
However, Endo remains silent regarding:
… wherein an adjuster is formed on at least one of a side surface of the second substrate …
… the adjuster adjusting a threshold voltage of the second transistor; …
However, in the same field of endeavor, Shinohara teaches in [0112] a laminated structure including an insulating film HK and a metal film ME1 (Figs. 12 and 28); wherein the metal film ME1 is taught to adjust the threshold voltage of a transistor, and the insulating film HK aids in the prevention of current leakage. Examiner notes that in at least [0098] of the instant specification, the instant adjuster is taught to reduce the occurrence of current leakage. Therefore, examiner is interpreting both the insulating film HK and the metal film ME1 of the laminated structure to be an adjuster. Thus, Shinohara teaches an adjuster (Fig. 12; laminated structure including the insulating film HK and the metal film ME1) is formed on at least one of a side surface of the second substrate (Fig. 12; interlayer insulating film IL1 may be considered as a second substrate), the adjuster adjusting a threshold voltage of the second transistor ([0114]). Examiner asserts that Shinohara’s laminated structure may be used to modify Endo’s second transistor, specifically around the gate electrode 226, to yield the imaging device wherein an adjuster is formed on at least one of a side surface of the second substrate, the adjuster adjusting a threshold voltage of the second transistor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify the imaging device of Endo to include Shinohara’s insulating film HK and metal film ME1 to form an adjuster, because such a modification is the result of combining prior art elements according to known methods to yield predictable results. More specifically, Endo’s second transistor as modified by Shinohara’s adjuster can yield a predictable result of enabling one to control the threshold voltage of the second, e.g., amplification, transistor since sensitivity to noise/current leakage is reduced. Since the claimed invention is merely a combination of old elements, and in the combination each element merely would have performed the same function as it did separately, one of ordinary skill in the art would have recognized that the results of the combination were predictable before the effective filing date of the instant invention.
Regarding dependent Claim 2, Endo, further in view of Shinohara, teach the imaging device according to claim 1, wherein:
the adjuster is formed on a whole of the side surface of
Shinohara teaches the insulating film HK and the metal film ME1 formed on a whole of the side surface of the interlayer insulating film IL1, which is analogous to the second substrate. The modification of Endo, further in view of Shinohara, yields the adjuster formed on a whole of a side surface of portion of the opening holding gate electrode 226 (See Fig. 2 of Endo showing the unlabeled portion of the multilayer structure 211 between the substrate 208 and interconnect layer 228, i.e., the second substrate).
Regarding dependent Claim 6, Endo, further in view of Shinohara, teach the imaging device according to claim 1, wherein
the adjuster is formed by using a metal oxide film (Shinohara: [0113]).
Regarding dependent Claim 7, Endo, further in view of Shinohara, teach the imaging device according to claim 6, wherein
the metal oxide film includes an aluminum oxide film, a hafnium oxide film, an yttrium oxide film, or a lanthanum oxide film (Shinohara: [0113]).
Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Endo et al. (US 20120267690 A1), and further in view of Shinohara (US 20170243955 A1) and Ando et al. (US 20150108475 A1).
Regarding dependent Claim 4, Endo, further in view of Shinohara, teach the imaging device according to claim 1; however, Shinohara remains silent wherein
the adjuster includes an impurity region doped with a p-type impurity.
However, in the same field of endeavor, Ando teaches an oxide semiconductor film 206/oxide semiconductor film (Figs. 11B and 35) that adjust/controls the threshold voltage for a transistor (E.g., [0244] – [0245]), that includes a p-type impurity ([0092]) which may include boron ([0144] and [0148]). Examiner asserts that it would have been obvious to modify the materials of Shinohara’s adjuster, further in view of Ando, to yield the imaging device wherein the adjuster includes an impurity region doped with a p-type impurity.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant invention to modify the adjuster of Endo, further in view of Shinohara, to include an impurity region doped with a p-type impurity, as disclosed by Ando, because such a modification is based on the use of known techniques to improve similar devices in the same way. More specifically, Ando’s oxide semiconductor film is comparable to Shinohara’s insulating film HK and metal film ME1 because both teach their respective transistor features to adjust the threshold voltage of a transistor. Therefore, it is within the capabilities of one of ordinary skill in the art to modify the adjuster of Endo, further in view of Shinohara, to include an impurity region doped with a p-type impurity, as disclosed by Ando with the predictable result of forming an adjuster.
Regarding dependent Claim 5, Endo, further in view of Shinohara and Ando, teach the imaging device according to claim 4, wherein
the impurity region is doped with boron (B) (Ando: [0092], [0144], [0148]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 20170025456 A1 previously relied upon.
US 20220052100 A1 previously relied upon.
US 20120002090 A1 previously relied upon.
US 10355019 B1 previously relied upon.
US 20210351223 A1 teaches a similar imaging device.
US 20180138224 A1 teaches an imaging device using similar materials.
US 20190057997 A1 teaches an imaging device with similar features.
US 20200357723 A1 teaches an imaging device with similar features.
US 6087275 A teaches features of an imaging device to adjust threshold voltages for a transistor.
US 20150263007 A1 teaches some relevant features to the instant imaging device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARIO A AUTORE whose telephone number is (571)270-0059. The examiner can normally be reached Monday - Friday, 8 am - 5 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MARIO A. AUTORE JR.
Examiner
Art Unit 2897
/MARIO ANDRES AUTORE JR/Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897