DETAILED ACTION
This action is in response to the original filing of 12-28-2021. Claims 1-14 are pending and have been considered below:
Claim Objections
Claims 2-3 are objected to as being dependent upon a rejected base claim, but would be allowable over prior art if rewritten in independent form including all of the limitations of the base claim and any intervening claims. However a 112 rejection is applied and would need to be overcome.
Claim Rejections - 35 USC § 112
Claims 1, 2, 8, 9 and 11-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1, 8, 12 and 13 recite determining fidelity, however the parameters for determining if fidelity is met are not established.
Additionally, Claims 2, 9 and 11 provides equations without properly defining the parameters of the expression (i.e. multiple representations of Hilbert’s space dimension).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-13 is/are rejected under 35 U.S.C. 103 as being
unpatentable over Characterizing quantum supremacy in near term devices; Boixo et al. (“Boixo”) Pages 1-23, 4-6-2017 in view of A comparative study of estimation methods in quantum tomography; Acharya et al. (“Acharya”) pages 1-40, 1-23-2019.
Claim 1: Boixo discloses a method for estimating the fidelity of a quantum computing system, the method comprising:
defining one or more random quantum circuits, wherein a noisy experimental implementation of each random quantum circuit is approximated by a depolarizing channel with respective polarization parameter (Boixo: Page 6, Column 1, Paragraph 4 and Column 2, Paragraph 3; depolarizing channel);
generating, for each defined random quantum circuit and by the quantum computing system, a set of experimental data, wherein data items in the set of experimental data comprise measured bit strings corresponding to experimental implementations of the random quantum circuit (Figure 2, Page 2, Column 1, Paragraph 3, Page 5, Column 1, Paragraph 3; random quantum circuit provides data);
and determining an estimate of the fidelity of the quantum computing system based on the determined estimates of respective polarization parameters (Page 6, Section III, Paragraph 1 and Page 20; Appendix H; Paragraphs 1-2; fidelity determination).
Boixo may not explicitly disclose every aspect of determining, for each of the one or more random quantum circuits, an estimate of the respective polarization parameter, comprising maximizing a log-likelihood of the polarization parameter conditioned on the respective set of experimental data using series inversion;
However Acharya is provided because it utilizes maximum likelihood estimation for quantum state parameters. This functionality provides measurements used to define likelihood function of parameters, and maximizes the log-likelihood method of estimating the parameters (which provides an equivalent function to the claim limitation) (Page 7, Section 3.1).
Therefore it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to use a known technique to a known device in the same way and provide a parameter estimator in Boixo.
One would have been motivated to provide the functionality because the additional techniques of evaluation capture relevant data from smaller samples (Acharya: Page 2, Line 1-3), enhancing the ability to optimize fidelity analysis.
Claim 4: Boixo and Acharya disclose a method of claim 1, wherein generating a set of experimental data for a defined random quantum circuit comprises, repeatedly, for a predetermined number of times (Boixo: Figure 2 and Page 2, Column 2, Paragraph 2): initializing a quantum computing system qubit register in an initial state; applying the defined random quantum circuit to the initial state to generate an evolved state; and measuring the evolved state to obtain a bit string (Boixo: Page 4, Section B, Page 20, Appendix H; measure difference of random selected bit string and Page 5, Column 1, Paragraph 3-Column 2, Paragraph 2; sample of bit string computed and estimate (measurement) provided).
Claim 5: Boixo and Acharya disclose a method of claim 1, further comprising determining a variance of the estimate of the respective polarization parameter by computing a second derivative of the log-likelihood of the polarization parameter conditioned on the respective set of experimental data (Boixo: Page 16, Table I and Column 2; different parameters utilized and compared for difference (variance) and Acharya: Page 7, Section 3.1).
Claim 6: Boixo and Acharya disclose a method of claim 1, wherein outputs of experimental implementations of the one or more random quantum circuits are approximated by a Porter-Thomas distribution (Boixo: Figure 2 and Page 6, Column 2, Paragraphs 2-3; Porter-Thomas).
Claim 7: Boixo and Acharya disclose a method of claim 1, wherein the one or more quantum circuits comprise random quantum circuits that operate on a same number of qubits and have a same circuit depth (Boixo: Page 8; Paragraph 2, Page 12, Column 2, Paragraph 5; circuit depth).
Claim 8: Boixo and Acharya disclose a method of claim 1, wherein determining an estimate of the fidelity of the quantum computing system based on the determined estimates of respective polarization parameters comprises: computing an average estimate of the polarization parameter; and determining an estimate of the fidelity of the quantum computing system using the average estimate of the polarization parameter (Boixo: Page 2, Column 2, Paragraph 1; parameters are comparable and Page 21, Column 2, Paragraph 5-Page 22-Column 1, Paragraph 1; compare/fidelity).
Claim 9: Boixo and Acharya disclose a method of claim 8, wherein the estimate of the fidelity F of the quantum computing system is given by F=p+(1-Ƥ)/D, where D =2 represents Hilbert space dimension and, represents a number of qubits on which the defined one or more random quantum circuits operate (Page 2, Paragraph 1; Hilbert space and Page 6, Section III; FIDELITY ANALYSIS).
Claim 10: Boixo and Acharya disclose a method of claim 8, further comprising calculating an estimate of Pauli error rate of the quantum computing system using the average estimate of the polarization parameter(Boixo: Page 6, Column 1, Paragraphs 2-3 and Page 7, Paragraph 2; Pauli error).
Claim 11: Boixo and Acharya disclose a method of claim 10, wherein the estimate of Pauli error rate rpauli of the quantum computing system is given by
PNG
media_image1.png
34
146
media_image1.png
Greyscale
where D = 2 represents Hilbert space dimension and, represents a number of qubits on which the defined one or more random quantum circuits operate (Boixo: Page 6, Column 1, Paragraphs 2-3 and Page 7, Paragraph 2; Pauli error determined with equivalent equation).
Claim 12: Boixo and Acharya disclose a method of claim 1, further comprising determining one or more properties of the quantum computing system using the determined estimate of the fidelity of quantum computing system (Boixo: abstract; circuit fidelity determined, Page 6, FIDELITY ANALYSIS).
Claim 13: Boixo and Acharya disclose a method of claim 1, further comprising: determining one or more adjustments to quantum hardware control parameters based on the determined estimate of the fidelity; and implementing the determined one or more adjustments to perform quantum computations using quantum computing hardware (Boixo: Page 7, Section IV; gates are placed/adjusted based on simulation and Page 10, Column 2, Paragraph 2; provides rewriting of gate path).
Claim 14 is similar in scope to claim 1 and therefore rejected under the same rationale.
Additionally, Boixo discloses one or more classical processors; and quantum computing hardware in data communication with the one or more classical processors; wherein the apparatus is configured to perform operations (Page 15, Section 3. Performance, Paragraph 1; intel processor).
Conclusion
The prior art made of record and not relied upon is considered pertinent to Applicant’s disclosure:
20020030186 A1 ABSTRACT
Applicant is required under 37 C.F.R. § 1.111(c) to consider these references fully when responding to this action.
It is noted that any citation to specific pages, columns, lines, or figures in the prior art references and any interpretation of the references should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. In re Heck, 699 F.2d 1331, 1332-33, 216 U.S.P.Q. 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 U.S.P.Q. 275, 277 (C.C.P.A. 1968)).
In the interests of compact prosecution, Applicant is invited to contact the examiner via electronic media pursuant to USPTO policy outlined MPEP § 502.03. All electronic communication must be authorized in writing. Applicant may wish to file an Internet Communications Authorization Form PTO/SB/439. Applicant may wish to request an interview using the Interview Practice website: http://www.uspto.gov/patent/laws-and-regulations/interview-practice.
Applicant is reminded Internet e-mail may not be used for communication for matters under 35 U.S.C. § 132 or which otherwise require a signature. A reply to an Office action may NOT be communicated by Applicant to the USPTO via Internet e-mail. If such a reply is submitted by Applicant via Internet e-mail, a paper copy will be placed in the appropriate patent application file with an indication that the reply is NOT ENTERED. See MPEP § 502.03(II).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHERROD KEATON whose telephone number is 571-270-1697. The examiner can normally be reached 9:30am to 5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor MICHELLE BECHTOLD can be reached at 571-431-0762. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SHERROD L KEATON/ Primary Examiner, Art Unit 2148
12-16-2025