Prosecution Insights
Last updated: April 19, 2026
Application No. 17/631,823

SIMULATION SYSTEM, SIMULATION PROGRAM, AND SIMULATION METHOD

Final Rejection §103
Filed
Jan 31, 2022
Examiner
KHAN, IFTEKHAR A
Art Unit
2187
Tech Center
2100 — Computer Architecture & Software
Assignee
Global Security Inc.
OA Round
2 (Final)
78%
Grant Probability
Favorable
3-4
OA Rounds
3y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allow Rate
455 granted / 586 resolved
+22.6% vs TC avg
Strong +27% interview lift
Without
With
+26.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
25 currently pending
Career history
611
Total Applications
across all art units

Statute-Specific Performance

§101
22.3%
-17.7% vs TC avg
§103
41.9%
+1.9% vs TC avg
§102
6.5%
-33.5% vs TC avg
§112
18.2%
-21.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 586 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION 1. Claims 1-10 and 12-15 have been presented for examination based on the amendment filed on 10/22/2025. 2. Claim rejection of Claims 1-10 and 12, 13 under USC 101 is withdrawn based on the amendment filed on 10/22/2025. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 12 and 13 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 3. Claims 1-9, and 12-13 are rejected under 35 U.S.C. 103 as being obvious over Ernest G. Ulrich et al. hereafter Ulrich (Exclusive Simulation of Activity in Digital Networks, ACM, 1969, pp 102-110), in view of Varghese et al. hereafter Varghese (Hashed and Hierarchical Timing Wheels: Efficient Data Structures for Implementing a Timer Facility, IEEE/ACM, 1997. pp 824-834), further in view of Fan et al. hereafter Fan (Patent No.: US 6,389,019 B1). Regarding Claim 1, Ulrich disclose a simulation system for simulating a simulation model including a plurality of events in each of which a start-up time for start-up in any coordinate space is stored (Ulrich: abstract & Introduction, page 102), the simulation system comprising: an event registration module that registers the event by registering the event in association with the tags of the plurality of time wheels of the hierarchical time wheel generated by the time wheel generation module, wherein (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique), wherein the event associated with the tags is started when the first designated position of the first time wheel and the n-th designated position of the n-th time wheel coincide with the start-up time of the event (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique), and wherein results of the simulating of the simulation model, including when the event associated with the tags is started, are used to control a traveling direction of a mobile body (Ulrich: page 103 column 1 paragraph 2: logical activity may be viewed as a vehicle which travels on narrowly confined but continuously shifting "paths of activity" through an otherwise idle digital network. The existence of such paths of activity suggests a simulation technique which follows these paths and avoids idle elements.). Ulritch do not explicitly disclose: a time wheel generation module that generates a hierarchical time wheel comprising a plurality of time wheels in which a plurality of step sizes of time evaluated as subsequent times in discrete time are set as tags and an event is registered in association with the tags, to correspond to the start-up time of the event ranging over a plurality of time tiers having different time units, wherein the plurality of time tiers comprise a time tier of seconds, a time tier of minutes, and a time tier of hours; Varghese discloses: a time wheel generation module that generates a hierarchical time wheel comprising a plurality of time wheels in which a plurality of step sizes of time evaluated as subsequent times in discrete time are set as tags and an event is registered in association with the tags, to correspond to the start-up time of the event ranging over a plurality of time tiers having different time units, wherein the plurality of time tiers comprise a time tier of seconds, a time tier of minutes, and a time tier of hours (Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section); Ulrich and Varghese are analogous art because they are from the same field of endeavor. They both relate to digital timing simulation system. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the above digital network simulation development application, as taught by Ulrich, and incorporating the use of hierarchical time wheel, as taught by Varghese. One of ordinary skill in the art would have been motivated to do this modification in order to support thousands of outstanding timers without much overhead, as suggested by Varghese (Varghese: abstract). Ulrich do not explicitly disclose an error generated between saved time and an actual time. Fan discloses an error generated between saved time and an actual time (Fan: column 10 lines 1-21). Ulrich and Fan are analogous art because they are from the same field of endeavor. They both relate to digital timing simulation system. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the above digital network simulation development application, as taught by Ulrich, and incorporating the use of error correction methodology, as taught by Fan. One of ordinary skill in the art would have been motivated to do this modification in order to improve quality of service (QoS) by proving better scheduling for queuing events, as suggested by Fan (Fan: column 1 lines 22-43). Regarding Claims 12 and 13, the claims recite the same substantive limitations as Claim 1 and are rejected using the same teachings. Regarding Claim 2, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 1, wherein the time wheel generation module sets the number of tags to any number in accordance with the simulation model when the hierarchical time wheel is generated (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique). Regarding Claim 3, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 1, wherein the time wheel generation module registers, in a memory, the plurality of time wheels of the hierarchical time wheel generated to correspond to the time tiers of the start-up time of the event (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section), and the event registration module registers the event in association with the tags of the plurality of time wheels of the hierarchical time wheel registered in the memory by the time wheel generation module (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section). Regarding Claim 4, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 1, wherein the event registration module stores, as an offset correction value, the current time indicated by the n-th designated position of the n-th time wheel of the hierarchical time wheel (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section), and adjusts the error in the start-up time of the event on a basis of the offset correction value when the event is started (Fan: column 10 lines 1-21; column 11 line 43- column 13 line 2). Regarding Claim 5, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 1, wherein the time wheels corresponding to the plurality of time tiers constituting the hierarchical time wheel generated by the time wheel generation module are stored, and the time wheels and the hierarchical time wheel are associated with each other by storing the time wheels (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section). Regarding Claim 6, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 1, wherein when the event is progressed from a start point of the tag to an end point of the tag of the n-th time wheel toward start of the event in the time tier of the n-th time wheel in the hierarchical time wheel, the event is progressed from the current tag to a subsequent tag of the first time wheel toward the start of the event in the time tier of the first time wheel (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section). Regarding Claim 7, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 6, wherein when a time wheel corresponding to a higher-order time tier than the first time wheel is present, the event associated with the tags of the time wheel corresponding to the higher-order time tier is started by progressing the event from the current tag to the subsequent tag of the first time wheel toward the start of the event in the time tier of the first time wheel (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section). Regarding Claim 8, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 1, wherein when the event started with reference to the first time wheel in the hierarchical time wheel is assumed as a first event, the event started with reference to the n-th time wheel in the hierarchical time wheel is assumed as an n-th event, and the first event and the n-th event are started on a basis of the time tier corresponding to the first time wheel, the n-th event is repetitively started on a basis of the time tier corresponding to the n-th time wheel such that the time tier of the first time wheel and the time tier of the n-th time wheel coincide with each other (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section). Regarding Claim 9, the combinations of Ulrich, Varghese and Fan further disclose the simulation system according to claim 1, wherein the event registration module registers, as the event, a time at which an entity included in the simulation model and disposed in the coordinate space starts to act, in association with the tags of the time wheels (Ulrich: Figures 3 & 4, pages 104-106- section Scheduling and Simulation; Figure 7, pages 107-108 section Extensions of the Time-Mapping Technique; Varghese: Figures 7 & 8 : hierarchical time wheels; page 827: section: Discrete event simulation; pages 829-830: section: Exploiting Hierarchy - note how discrete events are tagged to discrete times as narrated in details in these section). 4. Claims 10, 14 and 15 are rejected under 35 U.S.C. 103 as being obvious over Ernest G. Ulrich et al. hereafter Ulrich (Exclusive Simulation of Activity in Digital Networks, ACM, 1969, pp 102-110), in view of Varghese et al. hereafter Varghese (Hashed and Hierarchical Timing Wheels: Efficient Data Structures for Implementing a Timer Facility, IEEE/ACM, 1997. pp 824-834), in view of Fan et al. hereafter Fan (Patent No.: US 6,389,019 B1), further in view of Marsan et al. hereafter Marsan (Simulation of three MAC protocols for intelligent highway packet radio networks, Computer Communications 19 (1996) 943-953) Regarding Claim 10, the combinations of Ulrich, Varghese and Fan do not explicitly disclose wherein the simulation model is an evaluation of an autonomous driving vehicle. Marsan discloses wherein the simulation model is an evaluation of an autonomous driving vehicle (Marsan: Figure 1, page 947-column 1 & 2, section 4: Simulation scenario). Ulrich, Varghese, Fan and Marsan are analogous art because they are from the same field of endeavor. All of them relate to digital timing simulation system. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the above logic simulation development application, as taught by the combinations of Ulrich, Varghese and Fan, and incorporating the evaluation of autonomous driving vehicle, as taught by Marsan. One of ordinary skill in the art would have been motivated to do this modification in order to improve operations of the vehicle by the information transfer capabilities provided by the mobile packet network., as suggested by Marsan (Marsan: page 943 column 2 paragraph 1). Regarding Claims 14 and 15, the claims recite the same substantive limitations as Claim 10 and are rejected using the same teachings. Examination Considerations 5. Examiner has cited particular columns and line numbers (or paragraphs) in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific imitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the Applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. The entire reference is considered to provide disclosure relating to the claimed invention. 6. The claims and only the claims form the metes and bounds of the invention. "Office personnel are to give the claims their broadest reasonable interpretation in light of the supporting disclosure. In re Morris, 127 F.3d 1048, 105455, 44USPQ2d 1023, 1027-28 (Fed. Cir. 1997). Limitations appearing in the specification but not recited in the claim are not read into the claim. In re Prater, 415 F.2d, 1393, 1404-05, 162 USPQ 541, 550-551 (CCPA 1969)" (MPEP p 2100-8, c 2, I 45-48; p 2100-9, c 1, I 1-4). The Examiner has full latitude to interpret each claim in the broadest reasonable sense. Examiner will reference prior art using terminology familiar to one of ordinary skill in the art. Such an approach is broad in concept and can be either explicit or implicit in meaning. 7. Examiner's Notes are provided with the cited references to prior art to assist the applicant to better understand the nature of the prior art, application of such prior art and, as appropriate, to further indicate other prior art that maybe applied in other office actions. Such comments are entirely consistent with the intent and spirit of compact prosecution. However, and unless otherwise stated, the Examiner's Notes are not prior art but a link to prior art that one of ordinary skill in the art would find inherently appropriate. Conclusion 8. Claims 1-10 and 12-15 are rejected. 9. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Correspondence Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to IFTEKHAR A KHAN whose telephone number is (571)272-5699. The examiner can normally be reached on M-F from 9:00AM-6:00PM (CST). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Emerson Puente can be reached on (571)272-3652. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center and the Private Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from Patent Center or Private PAIR. Status information for unpublished applications is available through Patent Center and Private PAIR to authorized users only. Should you have questions about access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated- interview-request-air-form. /IFTEKHAR A KHAN/Primary Examiner, Art Unit 2187
Read full office action

Prosecution Timeline

Jan 31, 2022
Application Filed
Jul 26, 2025
Non-Final Rejection — §103
Oct 22, 2025
Response Filed
Jan 05, 2026
Final Rejection — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+26.7%)
3y 5m
Median Time to Grant
Moderate
PTA Risk
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