DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The response filed 12/16/2025 is accepted, in which, independent claim 1 is amended. Claims 1, 4, 5, 7-9, 19, and 20 await an action on the merits as follows.
Response to Arguments
Regarding claim 1, Applicant's argument regarding White is moot based on the new rejection.
The reference Ichihara (US 20050104080 A1) teaches flanks running perpendicular to the lower side of the device. It would have been obvious to one of ordinary skill in the art to combine White with Ichihara to create a device with high efficiency and low consumed power, that makes miniaturization possible; increasing the strength against mechanical vibration with the advantage of long lifespan and high reliability (Ichihara, [0002]).
On page 7 of the response, Applicant argues,
"In this sense, Nakamura teaches away from forming the flanks perpendicular to the lower side, as presently claimed."
Examiner respectfully disagrees.
The layers of Nakamura cited in the rejection meet the limitations of the arrangement in the stack, away from the lower side, to one another, not their location laterally in the device. The reference White (US 20200303591 A1) is relied upon to meet the other limitations of claim 1. Nakamura's layers continue from the center of the device through the flanks to the edge of the device. Examiner would expect Nakamura's layers to do the same when combined with White and Ichihara as described in the rejection below.
Regarding claim 19, on page 9 of the response, Applicant argues,
"For at least this reason, claim 19 is not rendered obvious by the cited art and Applicant respectfully submits that rejection of claim 19 and its dependent claim 20 may be withdrawn."
Examiner respectfully disagrees.
According to MPEP 2141.01(a).II, for prior art to be considered analogous, the court has found "the similarities and differences in structure and function of the inventions disclosed in the references to carry far greater weight." In re Ellis, 476 F.2d 1370, 1372, 177 USPQ 526, 527 (CCPA 1973).
While Applicant has argued the criticality of the ranges of refractive indices cited in claim 19, the rejection of the claim based on the combination of White, Nakamura, and Chen remains valid because the materials comprising the layers of White and Nakamura are the same as the materials of the instant application.
It is well known in the art that refractive indices are a ratio between two materials' light transmission characteristics at the boundary between the two materials' surfaces. The refractive index at a boundary would be entirely dependent on the materials in contact at that boundary despite any claim limitations limiting index values.
In view of MPEP 2141.01(a).II, since the materials of the reference are the same as the materials of the instant application, the expectation of the resulting indices between layers is inherent in the reference combination.
Therefore, the combination of White, Nakamura, and Chen meet the limitations of claim 19 and the argument is traversed.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 4, and 7 are rejected under 35 U.S.C. 103 as being unpatentable over White (US 20200303591 A1), in view of Nakamura (US 2021/0074885 A1), and further in view of Ichihara (US 20050104080 A1).
Regarding claim 1, White teaches an optoelectronic semiconductor chip (72, Fig 12B) comprising:
a semiconductor body (14/16) with an active layer (18); a top side (16"); a lower side (14B: bottom horizontal surface of 14) opposite (shown opposite) to the top side (16"); and flanks (60) … , wherein:
the active layer (18) is configured to generate electromagnetic radiation (L; light emitted) during operation (causing the chip to emit light from the active layer 18, [0059]);
the flanks (60) delimit (shown delimiting) the semiconductor body (14/16) in a lateral directions (X; horizontal in Fig 12B);
the flanks (60) are each covered (shown covered) with a first passivation layer (76);
the first passivation layer (76) and the semiconductor body (14/16) in the region (shown in the region) of the flanks (60);
for the electromagnetic radiation (L) generated by the active layer (18) during operation,
the refractive index (2.0) of the first passivation layer (76; comprised of SiN, [0071]; silicon nitride is known to have n=2.0); and
a metal layer (44) is arranged (shown arranged) on a side (S1; side opposite side 60' of semiconductor body 14/16) of the first passivation layer (76) facing away (shown facing away) from the semiconductor body (14/16), wherein
the metal layer (44) is electrically conductively connected (shown electrically connected) to the semiconductor body (14/16) such that the metal layer (44) is configured to energize (electrically connected with layer 16, [0072]) the optoelectronic semiconductor chip (72) during operation.
White fails to explicitly teach flanks running perpendicular to the lower side; a second passivation layer is arranged in each case between the first passivation layer and the semiconductor body in the region of the flanks; for the electromagnetic radiation generated by the active layer during operation, the refractive index of the second passivation layer is smaller than the refractive index of the first passivation layer.
However, Nakamura teaches a second passivation layer (51, Fig 1) is arranged in each case between (the second passivation layer of Nakamura would reside inside the first passivation layer and the reflective layer 26 of White as taught by Nakamura in Fig 1, [0113], making the second passivation layer between the first passivation layer and the semiconductor body) the first passivation layer and the semiconductor body in the region of the flanks;
for the electromagnetic radiation generated by the active layer during operation, the refractive index (1.46) of the second passivation layer (51; comprised of SiO2, [0114]; silicon dioxide is known to have an = 1.46) is smaller (smaller) than the refractive index of the first passivation layer.
Ichihara teaches flanks running perpendicular (shown with flanks that are perpendicular to the lower side, Fig 3) to the lower side.
White, Nakamura, and Ichihara are considered analogous to the claimed invention because all are from the same field of endeavor of semiconductor optoelectronic chip devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the device of White with the features of Nakamura and Ichihara to create a device with flanks running perpendicular to the lower side; a second passivation layer is arranged in each case between the first passivation layer and the semiconductor body in the region of the flanks; for the electromagnetic radiation generated by the active layer during operation, the refractive index of the second passivation layer is smaller than the refractive index of the first passivation layer capable of enhancing the emission intensity and the orientation of emission light (Nakamura, [0009]) with high efficiency and low consumed power, that makes miniaturization possible; increasing the strength against mechanical vibration with the advantage of long lifespan and high reliability (Ichihara, [0002]).
Regarding claim 4, the combination of White, Nakamura, and Ichihara discloses the chip of claim 1. Nakamura teaches the second passivation layer (51, Fig 1).
White goes on to teach a high-refractive dielectric layer (26, Fig 12B) having a greater refractive index (2.3, [0055]) than the second passivation layer is arranged between (the second passivation layer of Nakamura would reside inside the first passivation layer and the reflective layer 26 of White as taught by Nakamura in Fig 1, [0113], making the high-refractive dielectric layer 26 between the first and second passivation layers) the first passivation layer (76) and the second passivation layer.
Regarding claim 7, the combination of White, Nakamura, and Ichihara discloses the chip of claim 1. White goes on to teach wherein the top side (16", Fig 12B) of the semiconductor body (14/16) comprises coupling-out structures (R1; rough surface on top of 16; nonplanar surface, [0071]).
Claims 5, 8, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over White (US 20200303591 A1), in view of Nakamura (US 2021/0074885 A1), in view of Ichihara (US 20050104080 A1), and further in view of Perzlmaier (US 2018/0198045 A1).
Regarding claim 5, the combination of White, Nakamura, and Ichihara discloses the chip of claim 1. Nakamura teaches the second passivation layer (51, Fig 1), but the combination fails to explicitly teach the second passivation layer has a thickness ranging from at least 100 nm to at most 1000 nm.
However, Perzlmaier teaches the second passivation layer has a thickness ranging from at least 100 nm to at most 1000 nm (400 nm, [0064]).
White, Nakamura, Ichihara, and Perzlmaier are considered analogous to the claimed invention because all are from the same field of endeavor of semiconductor optoelectronic chip devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the device of White, Nakamura, and Ichihara with the features of Perzlmaier to create a device wherein the second passivation layer has a thickness ranging from at least 100 nm to at most 1000 nm having high efficiency and an inexpensive and simplified method of producing one or a plurality of these components (Perzlmaier, [0003]).
Regarding claim 8, the combination of White, Nakamura, and Ichihara discloses the chip of claim 1. White teaches the metal layer (44, Fig 12B) and the flank (60). White goes on to teach the first passivation layer (76) comprises two sections (shown with two sections);
the first section (A1; section parallel to 60') runs parallel (shown parallel) to the flank (60) and the second section (A2; section under element 38 extending horizontally) runs transversely (shown running transversely) to the flank (60) and extends away (shown extending away) from the semiconductor body (14/16); and
the metal layer (44) adjoins (shown adjoining) the second section (A2) of the first passivation layer (76).
The combination fails to explicitly teach the metal layer has a thickness ranging from at least 500 nm measured perpendicular to the flank.
However, Perzlmaier teaches the metal layer has a thickness (1 um, [0066]) ranging from at least 500 nm (1 um = 1000 nm) measured perpendicular to the flank.
White, Nakamura, Ichihara, and Perzlmaier are considered analogous to the claimed invention because all are from the same field of endeavor of semiconductor optoelectronic chip devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the device of White, Nakamura, and Ichihara with the features of Perzlmaier to create a device wherein the metal layer has a thickness ranging from at least 500 nm measured perpendicular to the flank having high efficiency and an inexpensive and simplified method of producing one or a plurality of these components (Perzlmaier, [0003]).
Regarding claim 9, the combination of White, Nakamura, and Ichihara discloses the chip of claim 1. White teaches the semiconductor body (14/16, Fig 12B) and goes on to teach the first passivation layer (76) comprises silicon nitride (SiN, [0071]).
Nakamura teaches the second passivation layer (51, Fig 1) comprises silicon dioxide (SiO2, [0114]).
The combination fails to explicitly teach the semiconductor body is based on AlnIn1-n-mGamN.
However, Perzlmaier teaches the semiconductor body is based on AlnIn1-n-mGamN (White teaches the semiconductor body is comprised of p-type layer 14 under a n-type layer 16; Perzlmaier discloses the first semiconductor layer 21 can be n-type over the p-type second semiconductor layer 22 in paragraph [0083] and teaches AlnIn1-n-mGamN as materials in paragraph [0084]).
White, Nakamura, Ichihara, and Perzlmaier are considered analogous to the claimed invention because all are from the same field of endeavor of semiconductor optoelectronic chip devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the device of White, Nakamura, and Ichihara with the features of Perzlmaier to create a device wherein the semiconductor body is based on AlnIn1-n-mGamN having high efficiency and an inexpensive and simplified method of producing one or a plurality of these components (Perzlmaier, [0003]).
Claims 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over White (US 20200303591 A1), in view of Nakamura (US 2021/0074885 A1), and further in view of Chen (US 20130314772 A1).
Regarding claim 19, White teaches an optoelectronic semiconductor chip (72, Fig 12B) comprising:
a semiconductor body (14/16) with a first doped region (14), a second doped region (16), an active layer (18) arranged between (shown between) the first doped region (14) and the second doped region (16), a top side (16"), and flanks (60) running transversely (shown running transversely) to the top side (16"), wherein:
the active layer (18) is configured to generate electromagnetic radiation (L; light emitted) during operation (causing the chip to emit light from the active layer 18, [0059]);
the flanks (60) delimit (shown delimiting) the semiconductor body (14/16) in a lateral direction (X; horizontal in Fig 12B);
the flanks (60) are each covered (shown covered) with a first passivation layer (76);
the first passivation layer (76) and the semiconductor body (14/16) in the region (shown in the region) of the flanks (60);
for the electromagnetic radiation (L) generated by the active layer (18) during operation,
the refractive index (2.0) of the first passivation layer (76; comprised of SiN, [0071]; silicon nitride is known to have n=2.0); and
a lateral extent (L1; the horizontal width at the dotted line of active layer 18 where 14, 16, and 18 all reside) of the first doped region (14), the second doped region (16), and the active layer differ (18) by at most 5% (less than 5%; shown with identical lateral extent at L1);
a high-refractive dielectric layer (26; comprised of TiO2, [0055]).
White fails to explicitly teach a second passivation layer is arranged in each case between the first passivation layer and the semiconductor body in the region of the flanks; for the electromagnetic radiation generated by the active layer during operation, the refractive index of the second passivation layer is smaller than the refractive index of the first passivation layer; and a high-refractive dielectric layer having a greater refractive index that is at least 2 times greater than the refractive index of the second passivation layer and is at least 1.5 times greater than the refractive index of the first passivation layer, wherein the high-refractive dielectric layer is arranged between the first passivation layer and the second passivation layer.
However, Nakamura, in view of Chen, teaches a second passivation layer (51, Fig 1) is arranged in each case between (the second passivation layer of Nakamura would reside inside the first passivation layer and the reflective layer 26 of White as taught by Nakamura in Fig 1, [0113], making the second passivation layer between the first passivation layer and the semiconductor body) the first passivation layer and the semiconductor body in the region of the flanks;
for the electromagnetic radiation generated by the active layer during operation, the refractive index (1.46) of the second passivation layer (51; comprised of SiO2, [0114]; silicon dioxide is known to have an = 1.46) is smaller (smaller) than the refractive index of the first passivation layer; and
a high-refractive dielectric layer having a refractive index (2.7; taught by Chen [0014]) that is at least 2 times greater than the refractive index (1.46) of the second passivation layer and is at least 1.5 times greater than the refractive index of the first passivation layer,
The materials of the first and second passivation layers are SiN and SiO2 respectively, as claimed in claim 9, and disclosed by White and Nakamura respectively as stated in the above rejection.
The material of the high-refractive dielectric layer is disclosed in the instant application on page 8 of the specification as TiO2, which is disclosed by White for use in layer 26 in paragraph [0055].
The instant application is silent to other materials for the high-refractive dielectric layer. The ratios of the high-refractive layer of White to the second passivation layer of Nakamura and the first passivation layer of White meet the limitations of claim 19 since the materials are identical to those of the instant application.
According to MPEP 2141.01(a).II, for prior art to be considered analogous, the court has found "the similarities and differences in structure and function of the inventions disclosed in the references to carry far greater weight." In re Ellis, 476 F.2d 1370, 1372, 177 USPQ 526, 527 (CCPA 1973).
It is well known in the art that refractive indices are a ratio between two materials' light transmission characteristics at the boundary between the two materials' surfaces. The refractive index at a boundary would be entirely dependent on the materials in contact at that boundary despite any claim limitations limiting index values.
In view of MPEP 2141.01(a).II, since the materials of the reference are the same as the materials of the instant application, the expectation of the resulting indices between layers is inherent in the reference combination.
White then goes on to teach the high-refractive dielectric layer (26) is arranged between (the second passivation layer of Nakamura would reside inside the first passivation layer and the reflective layer 26 of White as taught by Nakamura in Fig 1, [0113], making the high-refractive dielectric layer 26 between the first and second passivation layers) the first passivation layer (76) and the second passivation layer.
White and Nakamura are considered analogous to the claimed invention because both are from the same field of endeavor of semiconductor optoelectronic chip devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the device of White with the features of Nakamura to create a device wherein a second passivation layer is arranged in each case between the first passivation layer and the semiconductor body in the region of the flanks; for the electromagnetic radiation generated by the active layer during operation, the refractive index of the second passivation layer is smaller than the refractive index of the first passivation layer; and a high-refractive dielectric layer having a greater refractive index that is at least 2 times greater than the refractive index of the second passivation layer and is at least 1.5 times greater than the refractive index of the first passivation layer, wherein the high-refractive dielectric layer is arranged between the first passivation layer and the second passivation layer capable of enhancing the emission intensity and the orientation of emission light (Nakamura, [0009]). Examiner notes Chen is merely relied upon for the index of refraction of titanium dioxide.
Regarding claim 20, the combination of White, Nakamura, and Chen discloses the chip of claim 19. White teaches the flanks (60, Fig 12B).
Nakamura goes on to teach in each case the second passivation layer (51, Fig 1) completely covers (shown completely covering) the flanks.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ichikawa (US 2020/0266176 A1) — Micro-LED with similar structure.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeremy D Watts whose telephone number is (703)756-1055. The examiner can normally be reached M-R 8:00am-4:30pm, F 8:00-3pm EST.
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/JEREMY DANIEL WATTS/Examiner, Art Unit 2897
/CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897