DETAILED ACTION
The Office Action is sent in response to Applicant’s Communication received on 10/31/2025 for application number 17/637,531. The Office hereby acknowledges receipt of the following and placed of record in file: Applicant’s Remarks, claim amendments, and IDS.
Examiner Notes the following: Claims 1, 11, and 20 have been amended. Claims 2-5 and 12-15 have been cancelled. Claims 1, 6-11, and 16-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the plurality of layers of the neural network must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1, 6, 11, and 16 objected to because of the following informalities:
In claim 1, line 9, “processing circuitry” should read “a processing circuitry”.
In claim 1, line 16, “multiplication circuitry” should read “a multiplication circuitry”.
In claim 6, line 2, “a signed multiword” should read “the signed multiword”.
In claim 11, line 3, “the hardware circuit” should read “a hardware circuit”.
In claim 11, line 11-12, “multiplication hardware” should read “ a multiplication hardware”.
In claim 16, line 2, “a signed multiword” should read “the signed multiword”.
Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Under the Alice Framework Step 1, claims 1-10 recites a hardware circuit and, therefore, is a machine. Claims 11-19 recite a method and, therefore, is a process. Claim 20 recites a non-transitory machine-readable storage device and, therefore, is an article of manufacture.
Under the Alice Framework Step 2A prong 1, claim 1 recites:
A hardware circuit for implementing a neural network comprising a plurality of layers, the hardware circuit comprising, for each layer of the plurality of layers of the neural network:
Circuitry that receives input activations from another layer of the plurality of layers, the circuitry configured to process the input activations based on a set of parameters associated with the layer, wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input, the circuitry comprising:
processing circuitry that receives the first input and the second input, each of the first and second inputs having a respective bit-width, wherein the processing circuitry is
configured to represent at least the first input as a signed multiword input based on the
first input having a bit-width that exceeds a fixed bit-width of the hardware circuit; and
one or more signed multipliers, each of the one or more signed multipliers being
configured to multiply two or more signed inputs, each signed multiplier comprising
multiplication circuitry configured to:
receive the signed multiword input that represents the first input;
receive a signed second input that corresponds to the second input; and
generate a signed output in response to multiplying the signed multiword
input with the signed second input.
Wherein the circuitry is configured to generate an output activation as part of an inference operation based on the signed output.
Wherein the signed multiword input is a shifted signed number comprising N words, each N word comprising B bits, and N is an integer greater than 1 and B is an integer greater than 1
Wherein a numerical value of the shifted signed number is defined based on a sum of products of individual words with respective powers of 2, wherein a power of 2 corresponding to an individual word is based on a product of B bits and a value of N associated with the individual word,
Wherein a representable numerical range of the shifted signed number is defined based on:
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The above underlined limitations are related to converting the data into another format and using the data in multiplication amounts to mathematical calculations and relationships which falls under the “mathematical concepts” groupings of abstract ideas (see specification paragraphs 3, 12, 20-21, 23-27, 31, 33-45, and 48). See Gottschalk v. Benson, 409 U.S. 63, 70, 175 USPQ 673, 676 (1972), wherein the conversion of binary-coded-decimal (BCD) numerals into pure binary numbers is directed to “Mathematical Concepts” of abstract ideas. As such, conversion of the data into another format is directed to “Mathematical Concepts” of abstract ideas. Accordingly, the claim is directed to an abstract idea.
Under the Alice Framework Step 2A prong 2, claim 1 recites the following additional elements: “a hardware circuit”, “neural network comprising a plurality of layers”, “circuitry that receives input activations from another layer of the plurality of layers…, the circuitry configured to process the input activations based on a set of parameters associated with the layer, wherein at least one input activation…is a first input and at least one parameter … is a second input”, “a processing circuitry”, “signed multipliers”, “multiplication circuitry”, “receives a first input and a second input”, “receive the signed multiword input that represents the first input”, “receive a signed second input that corresponds to the second input” and “circuitry is configured to generate an output activation as part of an inference operation based on the signed output”. However, the additional elements of “: “a hardware circuit”, “neural network comprising a plurality of layers”, “circuitry that receives input activations…process the input activations…”, “a processing circuitry”, “signed multipliers” and “multiplication circuitry” and “the circuitry is configured to generate an output activation…” are recited at a high-level of generality (i.e., as a generic computer component to use the neural network as a generic tool; as a generic computer component to receive data; as a generic computer component for converting the format of data; as a generic computer component for multiplying data; and as a generic computer component to output an solution) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The additional elements of “receives input activations from another layer of the plurality of layers… wherein at least one input activation…is a first input and at least one parameter … is a second input“ “receives a first input and a second input”, “receive the signed multiword input that represents the first input” and “receive a signed second input that corresponds to the second input” are merely adding insignificant extra-solution activities. The recitation of “neural network comprising a plurality of layers“ also merely indicates a field of use or technological environment in which the judicial exception is performed. Although the additional element “neural network comprising a plurality of layers” limits the identified judicial exceptions, this type of limitation merely confines the use of the abstract idea to a particular technological environment (neural networks) and thus fails to add an inventive concept to the claims. See MPEP 2106.05(h). The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under the Alice Framework Step 2B, claim 1 does not include additional elements that individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “: “a hardware circuit”, “neural network comprising a plurality of layers”, “circuitry that receives input activations…process the input activations…”, “a processing circuitry”, “signed multipliers” and “multiplication circuitry” and “the circuitry is configured to generate an output activation…” are recited at a high-level of generality (i.e., as a generic computer component to use the neural network as a generic tool; as a generic computer component to receive data; as a generic computer component for converting the format of data; as a generic computer component for multiplying data; and as a generic computer component to output an solution) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The additional elements of “receives input activations from another layer of the plurality of layers… wherein at least one input activation…is a first input and at least one parameter … is a second input“ “receives a first input and a second input”, “receive the signed multiword input that represents the first input” and “receive a signed second input that corresponds to the second input” are merely adding insignificant extra-solution activities. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Storing and retrieving information in memory” as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. The recitation of “neural network comprising a plurality of layers“ also merely indicates a field of use or technological environment in which the judicial exception is performed. Although the additional element “neural network comprising a plurality of layers” limits the identified judicial exceptions, this type of limitation merely confines the use of the abstract idea to a particular technological environment (neural networks) and thus fails to add an inventive concept to the claims. See MPEP 2106.05(h). The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under the Alice Framework Step 2A prong 1, Claims 6-10 recite further steps and details to converting the data into another format and using the data in multiplication and falls within the “mathematical Concepts” and/or “mental Processes” grouping of abstract ideas. Claim 6, is directed to the format of the converted data that is used in the computation of the mathematical operations. Claim 7, is directed to using a quantization scheme to modify the data format which is directed to “Mathematical Concepts” of abstract ideas. See Gottschalk v. Benson, 409 U.S. 63, 70, 175 USPQ 673, 676 (1972), wherein the conversion of binary-coded-decimal (BCD) numerals into pure binary numbers is directed to “Mathematical Concepts” of abstract ideas. As such the “quantization” or conversion of the data into another format is directed to “Mathematical Concepts” of abstract ideas. Claim 8, is directed to quantization scheme to generate word portions and a total bit-width that represents the size of each word portion which is directed to mathematical calculations and relationships. Claim 9, is directed to the format of multiword and mathematical operation to produce the output using the multiplication circuitry in claim 1. Claim 10, is directed to converting the second input into a signed multiword input and computing the mathematical operation to produce the output using the multiplication circuitry in claim 1. In particular claims 6-10 do not include additional elements that would require further analysis under Step 2A prong 2 and Step 2B. As such, the claims are directed to an abstract idea, the claims are not integrated into a practical application and the claims does not amount to significantly more than the abstract idea.
Under the Alice Framework Step 2A prong 1, claim 11 recites:
A method for implementing a neural network comprising a plurality of layers, the method comprising:
Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers
Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer, wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input.
receiving, by the processing circuit of the hardware circuit, the first input and the second input, each of the first and second inputs having a respective bit-width, wherein at least the first input has a bit-width that exceeds a fixed bit-width of multiplication hardware included in the hardware circuit, the multiplication hardware being used to multiply the first and second inputs;
generating, from at least the first input, a signed multiword input comprising a plurality of signed words that each have a plurality of bits, wherein a bit-width of the signed multiword input is less than the fixed bit-width of the multiplication hardware;
providing the signed multiword input and a signed second input to the multiplication hardware for multiplication, wherein the signed second input corresponds to the second input and has a bit-width that is within the fixed bit-width of the multiplication hardware;
generating a signed output from the multiplication hardware using at least the first and second inputs. and
generating an output activation as part of an inference operation based on the signed output
Wherein the signed multiword input is a shifted signed number comprising N words, each N word comprising B bits, and N is an integer greater than 1 and B is an integer greater than 1
Wherein a numerical value of the shifted signed number is defined based on:
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2
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wherein a represents a respective signed word of the signed multiword input, and
Wherein a representable numerical range of the shifted signed number is defined based on:
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The above underlined limitations are related to converting the data into another format and using the data in multiplication amounts to mathematical calculations and relationships which falls under the “mathematical concepts” groupings of abstract ideas (see specification paragraphs 3, 12, 20-21, 23-27, 31, 33-45, and 48). See Gottschalk v. Benson, 409 U.S. 63, 70, 175 USPQ 673, 676 (1972), wherein the conversion of binary-coded-decimal (BCD) numerals into pure binary numbers is directed to “Mathematical Concepts” of abstract ideas. As such, conversion of the data into another format is directed to “Mathematical Concepts” of abstract ideas. Accordingly, the claim is directed to an abstract idea.
Under the Alice Framework Step 2A prong 2, claim 11 recites the following additional elements: “a neural network comprising a plurality of layers“, “Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers”, “Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer, wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input“, “a processing circuit”, “the hardware circuit“, “multiplication hardware”, “receiving… a first input and a second input”, “providing the signed multiword input and a signed second input”, and “generating an output activation as part of an inference operation based on the signed output“. However, the additional elements of “a neural network comprising a plurality of layers“, “Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers”, Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer…“, “a processing circuit”, “the hardware circuit“, “multiplication hardware” and “generating an output activation as part of an inference operation based on the signed output“ are recited at a high-level of generality (i.e., as a generic computer component to use the neural network as a generic tool; as a generic computer component to receive data; as a generic computer component for converting the format of data; as a generic computer component for multiplying data; and as a generic computer component to output an solution) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The additional elements of “Receiving… input activations from another layer of the plurality of layers”, “…wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input“, “receiving… a first input and a second input” and “providing the signed multiword input and a signed second input” are merely adding insignificant extra-solution activities. The recitation of “neural network comprising a plurality of layers“ also merely indicates a field of use or technological environment in which the judicial exception is performed. Although the additional element “neural network comprising a plurality of layers” limits the identified judicial exceptions, this type of limitation merely confines the use of the abstract idea to a particular technological environment (neural networks) and thus fails to add an inventive concept to the claims. See MPEP 2106.05(h). The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under the Alice Framework Step 2B, claim 11 does not include additional elements that individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a neural network comprising a plurality of layers“, “Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers”, Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer…“, “a processing circuit”, “the hardware circuit“, “multiplication hardware” and “generating an output activation as part of an inference operation based on the signed output“ are recited at a high-level of generality (i.e., as a generic computer component to use the neural network as a generic tool; as a generic computer component to receive data; as a generic computer component for converting the format of data; as a generic computer component for multiplying data; and as a generic computer component to output an solution) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The additional elements of “Receiving… input activations from another layer of the plurality of layers”, “…wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input“, “receiving… a first input and a second input” and “providing the signed multiword input and a signed second input” are merely adding insignificant extra-solution activities. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Storing and retrieving information in memory” as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. The recitation of “neural network comprising a plurality of layers“ also merely indicates a field of use or technological environment in which the judicial exception is performed. Although the additional element “neural network comprising a plurality of layers” limits the identified judicial exceptions, this type of limitation merely confines the use of the abstract idea to a particular technological environment (neural networks) and thus fails to add an inventive concept to the claims. See MPEP 2106.05(h). The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Under the Alice Framework Step 2A prong 1, Claims 16-19 recite further steps and details to converting the data into another format and using the data in multiplication and falls within the “mathematical Concepts” and/or “mental Processes” grouping of abstract ideas. Claims 16-18 are directed to similar limitations of claims 2-8 respectively and are directed to “mathematical Concepts” and/or “mental Processes” grouping of abstract ideas for the same reasons. Claim 19, is directed to using a signed multiplier to compute the signed output using the signed multiword and signed second input. In particular claims 16-18 do not include additional elements that would require further analysis under Step 2A prong 2 and Step 2B. Accordingly, the claims are directed to an abstract idea.
Under the Alice Framework Step 2A prong 2, claim 19 recites the following additional element: “a single signed multiplier”. However, the additional element of “a single signed multiplier” is recited at a high-level of generality (i.e., as a generic computer component for multiplication) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claims are not integrated into a practical application.
Under the Alice Framework Step 2B, claim 19 does not include additional elements that individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional element of “a single signed multiplier” is recited at a high-level of generality (i.e., as a generic computer component for multiplication) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claims does not amount to significantly more than the abstract idea.
Under the Alice Framework Step 2A prong 1, claim 20 recites:
One or more non-transitory machine-readable storage devices of a hardware circuit and for storing instructions that are executable by one or more processing devices for implementing a neural network comprising a plurality of layers, the instructions causing performance of operations comprising:
Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers
Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer, wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input.
receiving, by a processing circuit of the hardware circuit, a first input and a second input, each of the first and second inputs having a respective bit-width, wherein at least the first input has a bit-width that exceeds a fixed bit-width of multiplication hardware included in the hardware circuit, the multiplication hardware being used to multiply the first and second inputs;
generating, from at least the first input, a signed multiword input comprising a plurality of signed words that each have a plurality of bits, wherein a bit-width of the signed multiword input is less than the fixed bit-width of the multiplication hardware;
providing the signed multiword input and a signed second input to the multiplication hardware for multiplication, wherein the signed second input corresponds to the second input and has a bit-width that is within the fixed bit-width of the multiplication hardware; and
generating a signed output from the multiplication hardware using at least the first and second inputs.
generating an output activation as part of an inference operation based on the signed output
Wherein the signed multiword input is a shifted signed number comprising N words, each N word comprising B bits, and N is an integer greater than 1 and B is an integer greater than 1
Wherein a numerical value of the shifted signed number is defined based on:
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2
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2
2
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wherein a represents a respective signed word of the signed multiword input, and
Wherein a representable numerical range of the shifted signed number is defined based on:
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The above underlined limitations are related to converting the data into another format and using the data in multiplication amounts to mathematical calculations and relationships which falls under the “mathematical concepts” groupings of abstract ideas (see specification paragraphs 3, 12, 20-21, 23-27, 31, 33-45, and 48). See Gottschalk v. Benson, 409 U.S. 63, 70, 175 USPQ 673, 676 (1972), wherein the conversion of binary-coded-decimal (BCD) numerals into pure binary numbers is directed to “Mathematical Concepts” of abstract ideas. As such, conversion of the data into another format is directed to “Mathematical Concepts” of abstract ideas. Accordingly, the claim is directed to an abstract idea.
Under the Alice Framework Step 2A prong 2, claim 1 recites the following additional elements: “a neural network comprising a plurality of layers“, “Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers”, “Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer, wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input“, “non-transitory machine-readable storage devices“, “a processing circuit”, “multiplication hardware”, “receiving… a first input and a second input”, “providing the signed multiword input and a signed second input”, and “generating an output activation as part of an inference operation based on the signed output“. However, the additional elements of “a neural network comprising a plurality of layers“, “non-transitory machine-readable storage devices“, “Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers”, Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer…“, “a processing circuit”, “the hardware circuit“, “multiplication hardware” and “generating an output activation as part of an inference operation based on the signed output“ are recited at a high-level of generality (i.e., as a generic computer component for storing instructions; as a generic computer component to use the neural network as a generic tool; as a generic computer component to receive data; as a generic computer component for converting the format of data; as a generic computer component for multiplying data; and as a generic computer component to output an solution) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The additional elements of “Receiving… input activations from another layer of the plurality of layers”, “…wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input“, “receiving… a first input and a second input” and “providing the signed multiword input and a signed second input” are merely adding insignificant extra-solution activities. The recitation of “neural network comprising a plurality of layers“ also merely indicates a field of use or technological environment in which the judicial exception is performed. Although the additional element “neural network comprising a plurality of layers” limits the identified judicial exceptions, this type of limitation merely confines the use of the abstract idea to a particular technological environment (neural networks) and thus fails to add an inventive concept to the claims. See MPEP 2106.05(h). The additional elements do not, individually or in combination, integrate the exception into a practical application. Accordingly, the claim is not integrated into a practical application.
Under the Alice Framework Step 2B, claim 1 does not include additional elements that individually or in combination, are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of “a neural network comprising a plurality of layers“, “non-transitory machine-readable storage devices“, “Receiving, by a processing circuit of the hardware circuit, input activations from another layer of the plurality of layers”, Processing, by the processing circuit of the hardware circuit, the input activations based on a set of parameters associated with the layer…“, “a processing circuit”, “the hardware circuit“, “multiplication hardware” and “generating an output activation as part of an inference operation based on the signed output“ are recited at a high-level of generality (i.e., as a generic computer component for storing instructions; as a generic computer component to use the neural network as a generic tool; as a generic computer component to receive data; as a generic computer component for converting the format of data; as a generic computer component for multiplying data; and as a generic computer component to output an solution) such that they amount to no more than mere instructions using a generic computer component or merely as tools to implement the abstract idea. The additional elements of “Receiving… input activations from another layer of the plurality of layers”, “…wherein at least one input activation from the input activations is a first input and at least one parameter of the set of parameters is a second input“, “receiving… a first input and a second input” and “providing the signed multiword input and a signed second input” are merely adding insignificant extra-solution activities. See MPEP 2106.05(d)(II) which states that the courts have recognized computer functions such as “Storing and retrieving information in memory” as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. The recitation of “neural network comprising a plurality of layers“ also merely indicates a field of use or technological environment in which the judicial exception is performed. Although the additional element “neural network comprising a plurality of layers” limits the identified judicial exceptions, this type of limitation merely confines the use of the abstract idea to a particular technological environment (neural networks) and thus fails to add an inventive concept to the claims. See MPEP 2106.05(h). The claim does not recite additional elements that alone or in combination amount to an inventive concept. Accordingly, the claim does not amount to significantly more than the abstract idea.
Response to Arguments
Applicant’s arguments and amendments filed 10/31/2025, did not address the claim objections in the prior office action. The Claim Objections of the Office Action mailed 07/02/2025, have been maintained. See Claim Objections above.
Applicant’s arguments, see pages 10-11, filed 10/31/2025, with respect to rejections under 35 U.S.C. 112, 102, and 103 have been fully considered and are persuasive. The rejections under 35 U.S.C. 112, 102, and 103 of the Office Action mailed 07/02/2025 has been withdrawn.
Applicant's arguments, see page 8-9, filed 10/31/2025, with respect to Rejections under 35 U.S.C. 101 have been fully considered but they are not persuasive. Applicant argues the claims do not recite features related to abstract ideas exceptions and used the newly claimed features as an example. See Remarks p.8, last par. However, the claims do recite abstract ideas such as mathematical concepts, such as “multiply two or more inputs”, “wherein a numerical value of the shifted signed number is defined based on a sum of products” and more (See rejection under 35 U.S.C. 101 above). Furthermore, the applicant has not argued why the additional features in question would integrate into a practical application or amount to significantly more than the abstract idea. See MPEP 2106.04 and 2106.05. The additional features does not integrate into a practical application or amount to significantly more than the abstract idea as it is directed to merely applying mathematical operations and insignificant extra solution activities of receiving data. See rejection under 35 U.S.C. 101 above. The examiner respectfully disagrees with the applicant’s assertion to the contrary for at least the reasons given above.
Applicant's arguments, see page 9-10, filed 10/31/2025, with respect to Rejections under 35 U.S.C. 101 have been fully considered but they are not persuasive. Applicant argues the claims as cited overall integrate the alleged abstract idea into a practical application with the benefit of only using signed multipliers. See Remarks p.9, last par. However, the claim as recited is open-ended and does not specifically limit the claim to only signed multipliers. The examiner respectfully disagrees with the applicant’s assertion to the contrary for at least the reasons given above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kenny K. Bui whose telephone number is (571)270-0604. The examiner can normally be reached 9:00 am to 2:00 pm on Monday, 8:00 am to 5:00 pm on Tuesday to Thursday, and 8:00 am to 4:00pm on Friday ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew T Caldwell can be reached at (571)272-3702. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KENNY K. BUI/Patent Examiner, Art Unit 2182 (571)270-0604
/ANDREW CALDWELL/Supervisory Patent Examiner, Art Unit 2182