DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on September 15, 2025 has been entered.
Response to Amendment
The examiner acknowledges the amending claims 1, 6, 7, 10 and 17 by the amendment submitted by the applicant(s) filed on September 15, 2025. Claims 1 – 20 are pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 6 and 8 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over Shiozaki (US 2007/0248125) in view of Jewell (US 5,719,891, examiner submitted in the PTO-892 from filed on February 21, 2025), further in view of Lin et al. (US 2007/0091961, examiner submitted in the PTO-892 from filed on June 13, 2025), further in view of Tu et al. (US 2022/0311212).
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Regarding claim 1, Shiozaki disclose a single emitter, comprising:
a substrate layer (see Figure 1 and 2, character 11 and paragraphs [0039 and 0041]);
a set of epitaxial layers (see Figure 1 and 2, character 2, paragraph [0039] and the reference called “resonance part”) disposed on a first side of the substrate layer (see Figure 1 and 2, character 11, the examiner interprets “a first side of the substrate layer” as the top surface of the substrate), comprising:
a first mirror (see Figure 1 and 2, character 12, paragraphs [0039 – 0041], the reference called “first DBR layer” or “first semiconductor multilayer reflective film”) and a second mirror (see Figure 1 and 2, character 15, paragraphs [0039 – 0041], the reference called “second DBR layer” or “second semiconductor multilayer reflective film”);
a trench (see Figure 1 and 2, characters 32A and 32B and paragraphs [0044 and 0048 – 0049], the reference called “pair of trenches”) axially extending into at least the second mirror (see Figure 1 and 2, character 15),
wherein the second mirror (see Figure 1 and 2, character 15) surrounds the trench (see Figure 1 and 2, characters 32A and 32B);
an active region (see Figure 1 and 2, character 13 and paragraphs [0039 and 0041]) between the first mirror (see Figure 1 and 2, character 12) and the second mirror (see Figure 1 and 2, character 15); and
an oxidation layer (see Figure 1 and 2, character 14, paragraphs [0039, 0042 and 0047], the reference called “current confinement layer”, the current confinement layer include a current confinement region (142) and current passage region (141)) with an oxidation aperture (see Figure 1 and 2, character 141, paragraphs [0039, 0042 and 0047], the reference called “current passage region”),
wherein the single emitter (see Figures 1 and 2, character 1) is a vertical cavity surface emitting laser (VCSEL) (Shiozaki do not explicitly discloses single emitter is a vertical cavity surface emitting laser (VCSEL). However, it was shown above that Shiozaki in Figure 2, paragraphs [0002 and 0039 – 0044] teach a surface emitting semiconductor laser device, the surface emitting semiconductor laser device include a stack structure including a first DBR layer (12), an active layer (13), a current confinement layer (14), a second DBR layer (15), a contact layer (16) which are sequentially layered on the face side of a substrate (11), a first electrode (17) and a second electrode (18). The surface emitting semiconductor laser device which emits a laser beam in a vertical direction by a resonator extending in the vertical direction. All these elements together provide a vertical cavity surface emitting laser (VCSEL). These features are implicitly taught single emitter is a vertical cavity surface emitting laser (VCSEL) as is claimed.);
a first electrical contact layer (see Figures 1 and 2, character 17, paragraphs [0039 and 0043 – 0044], the reference called “ first electrode”) disposed on the second mirror (see Figure 1 and 2, character 15), and
a second electrical contract layer (see Figures 1 and 2, character 18, paragraphs [0039 and 0043 – 0044], the reference called “ second electrode”) disposed on a second side of the substrate layer (see Figure 1 and 2, character 11, the examiner interprets “a second side of the substrate layer” as the bottom surface of the substrate).
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Shiozaki discloses the claimed invention except for at least one of the first mirror or the second mirror comprises at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer. Jewell teaches at least one of the mirrors comprises at least one reflector pair that comprises a semiconductor material layer (see Figure 5A, characters 84 and/or 90 and Figure 5D, characters 120 and/or 124) and an oxidized semiconductor material layer (see Figure 5A, characters 89 and Figure 5D, characters 119 and/or 123). However, it is well known in the art to apply and/or modify the at least one of the mirrors comprises at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer as discloses by Jewell in (see Figures 5A, 5D, column 3, lines 32 – 36, column 6, lines 54 – 67 and column 7, lines 1 – 11, 19 – 20 and 43 – 44). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the well-known at least one of the mirrors comprises at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer as suggested to the device of Shiozaki, in order to device can provide a large emission wavelength and also are capable of functioning as a current confining layer, a light confining layer and also could provide a path for electrical current.
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Shiozaki discloses the claimed invention except for an oxidation trench. Lin teaches a process to produce an oxidation trench (see Figures 2A and 2D, character 215). However, it is well known in the art to apply and/or modify the oxidation trench process to produce an oxidation trench as discloses by Lin in (see Figures 2A and 2D and paragraph [0010]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the oxidation trench process to produce an oxidation trench as suggested by device of Shiozaki, in order to produce an oxidation trench. Oxidation trenches could include openings that allow oxygen (e.g., dry oxygen, wet oxygen) to access the epitaxial layer from which oxidation layer is formed. The oxidation trenches could be etched to expose the epitaxial layer from which oxidation layer is formed.
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Shiozaki discloses the claimed invention except for an implant region surrounding the oxidation trench. Tu teaches an implant region (see Figure 2D, character 132, the reference called “implantation region”, the implantation region includes a first implantation region (132a), a second implantation region (132b) and a third implantation region (132c)), the first and the third implantation regions are surrounding the trench (see Figure 2D, character 128, the reference called “inner trench”). However, it is well known in the art to apply and/or modify the implantation region (the first and the third implantation regions) surrounding the trench as discloses by Tu in (see Figures 2D and 2E, Abstract and paragraphs [0038 – 0039]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the implantation region (the first and the third implantation regions) surrounding the trench as suggested to the device of Shiozaki, in order to provide an isolation or to isolate the emitter area of a VCSEL.
Regarding claim 2, Shiozaki, Jewell, Lin and Tu, Jewell disclose the semiconductor material layer (see Figure 5A, characters 84 and/or 90 and Figure 5D, characters 120 and/or 124) comprises aluminum gallium arsenide (see column 7, lines 4 – 13) and the oxidized semiconductor material layer (see Figure 5A, characters 89 and Figure 5D, characters 119 and/or 123) comprises aluminum oxide gallium arsenide (see column 7, lines 4 – 13).
Regarding claim 3, Shiozaki, Jewell, Lin and Tu do not explicitly disclose an aluminum content of the oxidized semiconductor material layer is higher than an aluminum content of the semiconductor material layer. However, it was shown above that Jewell in Figures 5A – 5F, and column 7, lines 4 – 13 teach that the semiconductor material layer comprises aluminum gallium arsenide and the oxidized semiconductor material layer comprises aluminum oxide gallium arsenide. That how do the standard process of oxidize, that way can control which layer is to be oxidized, the higher the aluminum content, the more it will cause oxidation. These features are implicitly taught an aluminum content of the oxidized semiconductor material layer is higher than an aluminum content of the semiconductor material layer as is claimed.
Regarding claim 4, Shiozaki, Jewell, Lin and Tu disclose the claimed invention except for a difference between a refractive index of the semiconductor material layer and a refractive index of the oxidized semiconductor material layer is greater than 1. It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the a difference between a refractive index of the semiconductor material layer and a refractive index of the oxidized semiconductor material layer is greater than 1 as suggested the device of Shiozaki, Jewell, Lin and Tu, the refractive index will be depend of the concentration of the materials, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
In addition, the selection of the refractive index between the first and second mirrors, it’s obvious because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996) (claimed ranges or a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill or art) and In re Aller, 105 USPQ 233 (CCPA 1995) (selection of optimum ranges within prior art general conditions is obvious).
Note that the specification contains no disclosure of either the critical nature of the claimed [a difference between a refractive index of the semiconductor material layer and a refractive index of the oxidized semiconductor material layer is greater than 1] or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen [a difference between a refractive index of the semiconductor material layer and a refractive index of the oxidized semiconductor material layer is greater than 1] or upon another variable recited in a claim, the Applicant must show that the chosen [a difference between a refractive index of the semiconductor material layer and a refractive index of the oxidized semiconductor material layer is greater than 1] are critical. In re Woodruf, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 5, Shiozaki, Jewell, Lin and Tu, Jewell disclose the at least one reflector pair comprises multiple oxide-layer-based reflector pairs (see Figure 5A, characters 89 and Figure 5D, characters 119 and/or 123 and claim 1 rejection).
Regarding claim 6, Shiozaki, Jewell, Lin and Tu, Shiozaki disclose oxidation of the oxidized semiconductor material layer extends short of an edge of the second mirror to provide a path for electrical current from the electrical contact layer (see claim 1 rejection).
Regarding claim 8, Shiozaki, Jewell, Lin and Tu, Shiozaki disclose the oxidation trench (see Figure 1 and 2, characters 32A and 32B and claim 1 rejection) defines an emitting region of the single emitter (see Figure 1 and 2, character 1 and claim 1 rejection).
Regarding claim 9, Shiozaki, Jewell, Lin and Tu, Shiozaki disclose a cross-sectional shape of the oxidation trench is a shape other than a circle (see Figures 11A – 11C. 12A – 12B, paragraph [0066] and claim 1 rejection).
Regarding claim 10, Shiozaki disclose an emitter device, comprising:
a substrate layer (see Figure 1 and 2, character 11 and paragraphs [0039 and 0041]); and
a set of epitaxial layers (see Figure 1 and 2, character 2, paragraph [0039] and the reference called “resonance part”) disposed on the substrate layer (see Figure 1 and 2, character 11), comprising:
a first mirror (see Figure 1 and 2, character 12, paragraphs [0039 – 0041] the reference called “first DBR layer” or “first semiconductor multilayer reflective film”) and a second mirror (see Figure 1 and 2, character 15, paragraphs [0039 – 0041], the reference called “second DBR layer” or “second semiconductor multilayer reflective film”); and
a trench (see Figure 1 and 2, characters 32A and 32B and paragraphs [0044 and 0048 – 0049], the reference called “pair of trenches”) axially extending into at least the second mirror (see Figure 1 and 2, character 15),
wherein the second mirror (see Figure 1 and 2, character 15) surrounds the trench (see Figure 1 and 2, characters 32A and 32B).
Shiozaki discloses the claimed invention except for at least one of the first mirror or the second mirror comprises at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer. Jewell teaches at least one of the mirrors comprises at least one reflector pair that comprises a semiconductor material layer (see Figure 5A, characters 84 and/or 90 and Figure 5D, characters 120 and/or 124) and an oxidized semiconductor material layer (see Figure 5A, characters 89 and Figure 5D, characters 119 and/or 123). However, it is well known in the art to apply and/or modify the at least one of the mirrors comprises at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer as discloses by Jewell in (see Figures 5A, 5D, column 3, lines 32 – 36, column 6, lines 54 – 67 and column 7, lines 1 – 11, 19 – 20 and 43 – 44). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the well-known at least one of the mirrors comprises at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer as suggested to the device of Shiozaki, in order to device can provide a large emission wavelength and also are capable of functioning as a current confining layer, a light confining layer and also could provide a path for electrical current.
Shiozaki discloses the claimed invention except for an oxidation trench. Lin teaches a process to produce an oxidation trench (see Figures 2A and 2D, character 215). However, it is well known in the art to apply and/or modify the oxidation trench process to produce an oxidation trench as discloses by Lin in (see Figures 2A and 2D and paragraph [0010]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the oxidation trench process to produce an oxidation trench as suggested by device of Shiozaki, in order to produce an oxidation trench. Oxidation trenches could include openings that allow oxygen (e.g., dry oxygen, wet oxygen) to access the epitaxial layer from which oxidation layer is formed. The oxidation trenches could be etched to expose the epitaxial layer from which oxidation layer is formed.
Shiozaki discloses the claimed invention except for an implant region surrounding the oxidation trench. Tu teaches an implant region (see Figure 2D, character 132, the reference called “implantation region”, the implantation region includes a first implantation region (132a), a second implantation region (132b) and a third implantation region (132c)), the first and the third implantation regions are surrounding the trench (see Figure 2D, character 128, the reference called “inner trench”). However, it is well known in the art to apply and/or modify the implantation region (the first and the third implantation regions) surrounding the trench as discloses by Tu in (see Figures 2D and 2E, Abstract and paragraphs [0038 – 0039]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the implantation region (the first and the third implantation regions) surrounding the trench as suggested to the device of Shiozaki, in order to provide an isolation or to isolate the emitter area of a VCSEL.
Regarding claim 11, Shiozaki, Jewell, Lin and Tu, Shiozaki disclose the at least one reflector pair includes one or more first reflector pairs of the first mirror (see Figure 1 and 2, character 12 and paragraphs [0040 – 0041]) and one or more second reflector pairs of the second mirror (see Figure 1 and 2, character 15 and paragraphs [0040 – 0041]).
Regarding claim 12, Shiozaki, Jewell, Lin and Tu, Jewell disclose the at least one reflector pair include at least one oxide-layer-based reflector pairs in the second mirror (see Figure 5A, characters 89 and Figure 5D, character 123 and claim 10 rejection).
Regarding claim 13, Shiozaki, Jewell, Lin and Tu, Jewell disclose the at least one reflector pair includes at least one oxide-layer-based reflector pair in the first mirror (see Figure 5D, characters 119 and claim 10 rejection).
Shiozaki, Jewell and Tu discloses the claimed invention except for the oxidation trench axially extends into the first mirror. Lin teaches the oxidation trench (see Figure 2D, character 215) axially extends into the first mirror (see Figure 2D, character 230). However, it is well known in the art to apply and/or modify the oxidation trench axially extends into the first mirror as discloses by Lin in (see Figures 2D and paragraphs [0013 – 0014]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the well-known the oxidation trench axially extends into the first mirror as suggested to the device of Shiozaki and Jewell, could be used to expose the epitaxial layer, it would have been an obvious matter of design choice bounded by well-known manufacturing constraints and ascertainable by routine experimentation and optimization to choose these particular dimensions because applicant has not disclosed that the dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669,
149 USPQ 47 (CCPA 1966).
Regarding claim 14, Shiozaki, Jewell, Lin and Tu, discloses the claimed invention except for the oxidation trench is concentric with at least the second mirror. It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the oxidation trench is concentric with at least the second mirror as suggested to the device of Shiozaki, Jewell and Lin, it would have been an obvious matter of design choice bounded by well-known manufacturing constraints and ascertainable by routine experimentation and optimization to choose these particular dimensions because applicant has not disclosed that the dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Regarding claim 15, Shiozaki, Jewell, Lin and Tu, Jewell disclose the at least one reflector pair comprises multiple oxide-layer-based reflector pairs (see Figure 5A, characters 89 and Figure 5D, characters 119 and/or 123 and claim 10 rejection).
Regarding claim 16, Shiozaki, Jewell, Lin and Tu, Shiozaki disclose the set of epitaxial layers (see Figure 1 and 2, character 2) further comprises an oxidation layer (see Figure 1 and 2, character 14, paragraphs [0039, 0042 and 0047], the reference called “current confinement layer”, the current confinement layer include a current confinement region (142) and current passage region (141)) with an oxidation aperture (see Figure 1 and 2, character 141, paragraphs [0039, 0042 and 0047], the reference called “current passage region”).
Regarding claim 17, Shiozaki, disclose a method, comprising:
forming, on a substrate layer (see Figure 1 and 2, character 11 and paragraphs [0039 and 0041]), a set of epitaxial layers (see Figure 1 and 2, character 2, paragraph [0039] and the reference called “resonance part”) comprising a first mirror (see Figure 1 and 2, character 12, paragraphs [0039 – 0041 and 0042], the reference called “first DBR layer” or “first semiconductor multilayer reflective film”), a second mirror (see Figure 1 and 2, character 15, paragraphs [0039 – 0041 and 0043], the reference called “second DBR layer” or “second semiconductor multilayer reflective film”), and an active region (see Figure 1 and 2, character 13 and paragraphs [0039 and 0041]) between the first mirror (see Figure 1 and 2, character 12) and the second mirror (see Figure 1 and 2, character 15);
etching a trench (see Figure 1 and 2, characters 32A and 32B and paragraphs [0044 and 0048 – 0049], the reference called “pair of trenches”) in the set of epitaxial layers (see Figure 1 and 2, character 2),
the trench (see Figure 1 and 2, characters 32A and 32B) axially extending into at least the second mirror (see Figure 1 and 2, character 15),
the second mirror (see Figure 1 and 2, character 15) surrounds the trench (see Figure 1 and 2, characters 32A and 32B).
Shiozaki discloses the claimed invention except for oxidizing the second mirror to form at least one reflector pair of the second mirror that comprises a semiconductor material layer and an oxidized semiconductor material layer. Jewell teaches at least one of the second mirrors to form at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer. However, it is well known in the art to apply and/or modify the at least one of the second mirrors to form at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer as discloses by Jewell in (see Figures 5A, 5D, column 3, lines 32 – 36, column 6, lines 54 – 67 and column 7, lines 1 – 11, 19 – 20 and 43 – 44). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the well-known at least one of the mirrors comprises at least one reflector pair that comprises a semiconductor material layer and an oxidized semiconductor material layer as suggested to the device of Shiozaki, in order to device can provide a large emission wavelength and also are capable of functioning as a current confining layer, a light confining layer and also could provide a path for electrical current.
Shiozaki discloses the claimed invention except for an oxidation trench. Lin teaches a process to produce an oxidation trench (see Figures 2A and 2D, character 215). However, it is well known in the art to apply and/or modify the oxidation trench process to produce an oxidation trench as discloses by Lin in (see Figures 2A and 2D and paragraphs [0010]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the oxidation trench process to produce an oxidation trench as suggested by device of Shiozaki, in order to produce an oxidation trench. Oxidation trenches could include openings that allow oxygen (e.g., dry oxygen, wet oxygen) to access the epitaxial layer from which oxidation layer is formed. The oxidation trenches could be etched to expose the epitaxial layer from which oxidation layer is formed.
Shiozaki discloses the claimed invention except for forming an implant region surrounding the oxidation trench. Tu teaches an implant region (see Figure 2D, character 132, the reference called “implantation region”, the implantation region includes a first implantation region (132a), a second implantation region (132b) and a third implantation region (132c)), the first and the third implantation regions are surrounding the trench (see Figure 2D, character 128, the reference called “inner trench”). However, it is well known in the art to apply and/or modify the implantation region (the first and the third implantation regions) surrounding the trench as discloses by Tu in (see Figures 2D and 2E, Abstract and paragraphs [0038 – 0039]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the implantation region (the first and the third implantation regions) surrounding the trench as suggested to the device of Shiozaki, in order to provide an isolation or to isolate the emitter area of a VCSEL.
Regarding claim 18, Shiozaki, Jewell, Lin and Tu, Shiozaki disclose depositing an electrical contact layer (see Figures 1 and 2, character 17, paragraphs [0039 and 0043
– 0044], the reference called “ first electrode”) on the set of epitaxial layers (see Figures
1 and 2, character 2).
Regarding claim 19, Shiozaki, Jewell, Lin and Tu, Shiozaki disclose etching a trench (see claim 17 rejection) at a lateral edge of the set of epitaxial layers (see Figures 1 and 2, character 2) to expose an oxidation layer (see Figure 1 and 2, character 14, paragraphs [0039, 0042 and 0047], the reference called “current confinement layer”, the current confinement layer include a current confinement region (142) and current passage region (141)) of the set of epitaxial layers (see Figures 1 and 2, character 2); and
oxidizing the oxidation layer (see Figure 1 and 2, character 14, paragraphs [0039, 0042 and 0047]) to form an oxidation aperture (see Figure 1 and 2, character 141, paragraphs [0039, 0042 and 0047], the reference called “current passage region”).
Regarding claim 20, Shiozaki, Jewell, Lin and Tu, Jewell disclose the semiconductor material layer (see Figure 5A, characters 84 and/or 90 and Figure 5D, characters 120 and/or 124) comprises aluminum gallium arsenide (see column 7, lines 4 – 13) and the oxidized semiconductor material layer (see Figure 5A, characters 89 and Figure 5D, characters 119 and/or 123) comprises aluminum oxide gallium arsenide (see column 7, lines 4 – 13).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Shiozaki (US 2007/0248125) in view of Jewell (US 5,719,891, examiner submitted in the PTO-892 from filed on February 21, 2025), further in view of Lin et al. (US 2007/0091961, examiner submitted in the PTO-892 from filed on June 13, 2025), further in view of Tu et al (US 2022/0311212)further in view of Tatum et al. (US 2004/0042518, examiner submitted in the PTO-892 from filed on February 21, 2025).
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Regarding claim 7, Shiozaki, Jewell, Lin and Tu discloses the claimed invention except for a buffer layer, wherein the second mirror is disposed on the buffer layer to expose a portion of the buffer layer. Tatum teaches a buffer layer (see Figure 5, character 428), wherein the second mirror (see Figure 5, character 442) is disposed on the buffer layer (see Figure 5, character 428) to expose a portion of the buffer layer (see Figure 5, character 428). However, it is well known in the art to apply and/or modify the a buffer layer, wherein the second mirror is disposed on the buffer layer to expose a portion of the buffer layer as discloses by Tatum in (see Figure 5 and paragraphs [0049 – 0050]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention was to apply and/or modify the buffer layer, wherein the second mirror is disposed on the buffer layer to expose a portion of the buffer layer, and an electrical contact layer disposed on the portion of the buffer layer as suggested to the device of Shiozaki, Jewell, Lin and Tu, the buffer could be acts as a spacer.
Response to Arguments
Applicant's arguments with respect to claims 1 – 20 have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Delma R. Forde whose telephone number is (571)272-1940. The examiner can normally be reached M - TH 7:00 AM - 4:00 PM.
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/Delma R Forde/Examiner, Art Unit 2828
/XINNING(Tom) NIU/Primary Examiner, Art Unit 2828