DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The response filed 07/22/2025 is accepted, in which, claims 8, 9, and 10 are amended and claims 1-6 and 12-15 are canceled. Claim 8 is independent with claims 8-10 awaiting an action on the merits as follows.
The rejection of claims 1, 8, and 12 under U.S.C. 112(a) is withdrawn in view of the canceled and amended claims.
The rejection of claims 1, 2, 3, 6, 8, 9, 10, 12, 13, and 14 under U.S.C. 112(b) is withdrawn in view of the canceled and amended claims.
Response to Arguments
Regarding claim 8, on page 10 of the response, Applicant argues,
"Applicant submits the applied art does not disclose or suggest at least those clarified claim features. Applicant submits none of the applied art discloses or suggests controlling or limiting the number of sub-pixels connecting to the corner auxiliary lines to be smaller than a second number of the sub-pixels connecting to the central auxiliary line."
Examiner respectfully disagrees.
Primary reference Yang (US 2018/0166018 A1) teaches a smaller number of pixels connected to the first pairs of auxiliary lines in the rounded corner portion of the display than the number of pixels connected to the second pairs of auxiliary lines in the central portion of the display. Figure 1 shows 7 pixels in the top row whereas there are 15 pixels across the center.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION. —The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 8 and 9 are rejected for indefiniteness.
Claim 8 recites, "the corner auxiliary lines of the first pair of auxiliary lines." There is insufficient antecedent basis for "pair." To further prosecution, Examiner will assume the claim should read, "the corner auxiliary lines of the first pairs of auxiliary lines."
Claim 8 recites, " the sub-pixels in the rounded corner portion;" "the sub-pixels connecting to the corner auxiliary lines;" and "the sub- pixels connecting to the central auxiliary lines." There is insufficient antecedent basis for "the sub-pixels." To further prosecution, Examiner will assume the claim should read,
"the plurality of sub-pixels in the rounded corner portion are arranged along the rounded corner portion; and a first number of the plurality of sub-pixels connecting to the corner auxiliary lines of the first pairs of the auxiliary lines extending along the first direction is smaller than a second number of the plurality of sub-pixels connecting to the central auxiliary lines of the first pairs of the auxiliary lines extending along the first direction."
Claim 9 recites, "number of pixels." There is insufficient antecedent basis for "pixels." To further prosecution, Examiner will assume the claim should read, "number of the plurality of pixels."
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US 2018/0166018 A1), in view of Matsumoto (US 2015/0090989 A1), in view of Jang (US 9947733 B2), in view of Zhu (US 2018/0301518 A1), and further in view of Lee (US 20160181350 A1).
Regarding claim 8, Yang teaches a display device (Fig 1) comprising:
a display region (A, Fig 1) including a rounded corner portion (A1);
a non-display region (B) located around (shown around) the display region (A);
a plurality of pixels (P) disposed in (shown in) the display region (A);
a first power line (11-left; 11 comprises two parts: 11-left is the gate driving circuit on the left side of the display, 11-right is the gate driving circuit on the right side of the display; gate driving circuits may also be located at both sides of the display area A, [0072]) located at a first end portion (left side) of the non-display region (B);
a second power line (11-right) located at a second end portion (right side) on a side opposite (shown opposite) to the first end portion (left side) of the non-display region (B) in a first direction (horizontal);
a plurality of auxiliary lines (12) extending along (shown extending along) the first direction (horizontal) …, and comprising
first pairs (12-top; signal lines 12 repeat throughout the display, 12-top is the top most pair in Fig 1) of the auxiliary lines (12) extending along (shown extending along) the first direction (horizontal),
a plurality (shown in plurality) of corner auxiliary lines (12-A1; scan signal lines 12 repeat throughout the display, 12-A1 are those contained within display region A1) of the first pairs of the auxiliary lines extending (shown extending) in the first direction (horizontal) and disposed in (shown in) the rounded corner portion (A1);
a plurality of central auxiliary lines (12-A2; those contained in display region A2) of the first pairs of the auxiliary lines extending (shown extending) in the first direction (horizontal) and disposed in (shown in) center portion side (A2) of the display region (A);
wherein the corner auxiliary lines of the first pairs of auxiliary lines (12-A1) are connected (shown connected) to the first power line (11-left) and the second power line (11-right) … in the second direction (vertical),
the central auxiliary lines of the first pairs of auxiliary lines (12-A2) are connected (shown connected) to the first power line (11-left) and the second power line (11-right) … in the second direction (vertical).
Yang fails to explicitly teach a plurality of sub-pixels arrayed in a matrix in the first direction and a second direction intersecting the first direction and arranged in the display region;
a plurality of auxiliary lines extending along the first direction and the second direction to be disposed in a lattice pattern in the display region,
second pairs of the auxiliary lines extending along the second direction arranged in the display region, to form a lattice pattern,
wherein the corner auxiliary lines of the first pairs of auxiliary lines are connected to the first power line and the second power line at a first interval in the second direction,
the central auxiliary lines of the first pairs of auxiliary lines are connected to the first power line and the second power line at a second interval smaller than the first interval in the second direction,
a substrate;
a first insulating layer disposed on the substrate;
a first lower electrode disposed on the first insulating layer;
a second lower electrode that is disposed on the first insulating layer, is separated from the first lower electrode, and is formed of the same material as the first lower electrode;
a second insulating layer disposed on the first lower electrode and the second lower electrode;
a first organic layer disposed on the first lower electrode and including a light emitting layer;
a second organic layer disposed on the second lower electrode and including the light emitting layer;
a first upper electrode disposed on the first organic layer; and
a second upper electrode disposed on the second organic layer,
the corner auxiliary lines of the first pairs of the auxiliary lines are disposed on the second insulating layer,
the central auxiliary lines of the first pairs of the auxiliary lines are disposed on the second insulating layer, and includes a lower layer, a middle layer, and an upper layer,
the middle layer is disposed on the lower layer, and the upper layer is disposed on the middle layer, and
a width of the middle layer is smaller than widths of the lower layer and the upper layer
the first upper electrode and the second upper electrode are electrically connected to the lower layer,
the first pairs of the auxiliary lines and the second pairs of the auxiliary lines surround the plurality of sub-pixels;
the sub-pixels in the rounded corner portion are arranged along the rounded corner portion; and
a first number of the sub-pixels connecting to the corner auxiliary lines of the first pairs of the auxiliary lines extending along the first direction is smaller than a second number of the sub- pixels connecting to the central auxiliary lines of the first pairs of the auxiliary lines extending along the first direction.
However, Matsumoto teaches a substrate (301, Fig 4);
a first insulating layer (303) disposed on (shown on) the substrate (301);
a first lower electrode (304-left; extending line IV to IV of Fig 3 to include a second pixel, Fig 4 would be repeated to include two pixels 280, this configuration shows two pixels containing similar components with the auxiliary line therebetween; please see annotated figure below) disposed on (shown on) the first insulating layer (303);
a second lower electrode (304-right; please see annotated figure below) that is disposed on (shown on) the first insulating layer (303), is separated (shown separated) from the first lower electrode (304-left), and is formed of the same material (since the pixels are repeated all components with similar number designations would be comprised of the same material) as the first lower electrode (304-left);
a second insulating layer (305) disposed on (shown on) the first lower electrode (304-left) and the second lower electrode (304-right);
a first organic layer (306-left; please see annotated figure below) disposed on (shown on) the first lower electrode (304-left) and including a light emitting layer (organic layer 306 includes a light emitting layer, [0033]);
a second organic layer (306-right; please see annotated figure below) disposed on (shown on) the second lower electrode (304-right) and including the light emitting layer (organic layer 306 includes a light emitting layer, [0033]);
a first upper electrode (307-left; please see annotated figure below) disposed on (shown on) the first organic layer (306-left); and
a second upper electrode (307-right; please see annotated figure below) disposed on (shown on) the second organic layer (306-right),
the corner auxiliary lines of the first pairs of auxiliary lines (320; please see annotated figure below) are disposed on (shown on) the second insulating layer (305),
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Jang teaches the central auxiliary lines of the first pairs of the auxiliary lines (210, Fig 2) are disposed on the second insulating layer (172), and includes a lower layer (211), a middle layer (212), and an upper layer (213),
the middle layer (212) is disposed on (shown on) the lower layer (211), and the upper layer (213) is disposed on (shown on) the middle layer (212), and
a width of the middle layer (212) is smaller (shown smaller) than widths of the lower layer (211) and the upper layer (213),
the first upper electrode and the second upper electrode are electrically connected (shown electrically connected) to the lower layer (211).
Zhu teaches the first auxiliary lines are connected (shown connected) to the first power line and the second power line at a first interval (space between the two lines, 3, on top or bottom of Fig 3, above and below the horizontal area covered by 51 and 52; lines 3 are shown spaced far apart in the vertical direction) in the second direction (vertical), and
the second auxiliary lines are connected (shown connected) to the first power line and the second power line at a second interval (space between two lines, 3, in between horizontal area covered by 51 and 52) smaller (shown smaller) than the first interval (space between the two lines, 3, on top or bottom of Fig 3, above and below the horizontal area covered by 51 and 52) in the second direction (vertical).
Lee teaches a plurality of sub-pixels (P1/P2/P3, Fig 1) arrayed in a matrix (shown arrayed in a matrix) in the first direction and a second direction (vertical) intersecting (shown intersecting) the first direction and arranged in (shown arranged in) the display region;
a plurality of auxiliary lines extending along (shown extending along) … and the second direction (vertical; wirings 310 may be auxiliary wirings, [0033]) to be disposed in a lattice pattern (shown in a lattice pattern) in the display region,
second pairs of the auxiliary lines (310, Fig 1; wirings 310 may be auxiliary wirings, [0033]) extending along (shown extending along) the second direction (vertical) arranged in (shown arranged in) the display region, to form a lattice pattern (shown in lattice pattern);
the first pairs of the auxiliary lines and the second pairs of the auxiliary lines (310) surround (shown surrounding) the plurality of sub-pixels;
Yang then goes on to teach the sub-pixels in the rounded corner portion (A1) are arranged along (shown arranged along) the rounded corner portion (A1); and
a first number (7; shown in top line) of the sub-pixels (P) connecting to the corner auxiliary lines of the first pairs of the auxiliary lines (12-A1) extending along (shown extending along) the first direction (horizontal) is smaller (shown smaller) than a second number (15; shown in fifth line down) of the sub- pixels (P) connecting to the central auxiliary lines of the first pairs of the auxiliary lines (12-A2) extending along (shown extending along) the first direction (horizontal).
Yang, Matsumoto, Jang, Zhu, and Lee are considered analogous to the claimed invention because all are from the same field of endeavor of organic semiconductor display devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the device of Yang with the features of Matsumoto, Jang, Zhu, and Lee to create a display device of claim 8 to create a device that improves an uniformity of the potential of the upper electrode with reducing the contrast reduction of display (Matsumoto, [0009]), so that the central auxiliary electrode with the relatively-small width can increase the gap space between the first bank and the second bank, whereby the cathode electrode is easily deposited in the gap space between the first bank and the second bank (Jang, [Col 10, Ln 55-60]), so that it is possible to prevent the upper surface of the second central auxiliary electrode from being corroded (Jang, [Col 10, Ln 63-64]), and so that power supply voltages received by the OLEDs are uniform at different positions, thereby solving the problem of a non-uniform brightness of the display screen (Zhu, [0008]) for displaying a high quality image by reducing IR drop in an integrally formed opposite electrode (Lee, [0009]) in order to provide a device with a wide is viewing angle, high contrast ratio, and rapid response time (Lee, [0005]).
Regarding claim 9, the combination of Yang, Matsumoto, Jang, Zhu, and Lee discloses the display device of claim 8. Yang goes on to teach wherein a third number (11, Fig 1; shown in second line down) of pixels (P) that the corner auxiliary lines of the first pairs of auxiliary lines (12-A1) overlap (shown overlapping) is smaller (shown smaller) than a second number (15; shown in sixth line down) of pixels (P) that the central auxiliary lines of the first pairs of auxiliary lines (12-A2) overlap (shown overlapping).
Regarding claim 10, the combination of Yang, Matsumoto, Jang, Zhu, and Lee discloses the display device of claim 8. Yang teaches the plurality of auxiliary lines (12, Fig 1).
Matsumoto goes on to teach the plurality of auxiliary lines (321/323, Fig 5) include a transparent material containing indium tin oxide or indium zinc oxide (includes a first auxiliary line 321 that is made of ITO, …, and a third auxiliary 323 line that is made of ITO).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Tong (US 10997905 B2) - Zigzag load compensation units in NDA.
Cho (US 2016/0181349 A1) - Zigzag wirings to adjust resistance.
Choung (US 2017/0373132 A1) - Connection electrodes and power line in NDA.
Gao (US 2018/0129106 A1) - Resistance compensation unit on signal lines.
Ochi (US 2021/0296425 A1) - Rounded corner display.
Nakamura (US 2014/0027756 A1) - Line density higher in center of display.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeremy D Watts whose telephone number is (703)756-1055. The examiner can normally be reached M-R 8:00am-4:30pm, F 8:00-3pm EST.
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/JEREMY DANIEL WATTS/Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897