DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
On response filed on 1/15/2026, claims 1, 18, and 29 were amended; claims 12-17 remain cancelled; no new claims were added. Thus claims 1-11, 18-31 are pending of which claims 1, 18 and 29 are in independent form.
Response to Arguments
On page 8 of Remarks filed on 1/15/2026, applicant argues that “…Tremlet does not describe generating a private key based on any other key, much less ‘generate a private key, different from the first key, associated with the memory system based at least in part on the first key.’” The argument has been carefully and respectfully considered but are moot in view of a new ground of rejection (see pages 22-23 of Tuyls, et al. (WO 2011/089143 A1)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 4-11, 18-19, 21-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koeberl et al. (US 2014/0189890 A1) hereinafter Koeberl, in view of Tremlet et al. (US 2017/0005811 A1) hereinafter Tremlet, and further in view of Tuyls et al. (WO 2011/089143 A1).
As to claim 1, Koeberl teaches an apparatus (see Fig. 2, hardware device 150), comprising:
a memory system (see Fig. 2, non-volatile memory 157); and
a controller for the memory system (see Fig. 8, memory controller 872 and 882) and configured to cause the apparatus to:
read a set of uninitialized memory cells of the memory system to obtain a first key associated with the memory system (see para. [0023] “[0023] Another PUF type is based on the power-up state of uninitialized six-transistor SRAM cells. The storage mechanism in an SRAM cell consists of four cross-coupled transistors that assume one of two stable states after power-up. Which state the cell enters is largely determined by the relative characteristics of the transistors, so any mismatch causes the cell to have a bias to one of the states. The mismatch is fixed at manufacturing time, resulting in a cell that tends to power up in the same state. The power-up behavior is random between cells, but robust for a single cell, resulting in a structure that is well suited for use as a PUF. The challenge in the case of an SRAM PUF can be considered to be a set of SRAM addresses, and the response the contents of those addresses post power-up.”; see also para. [0051] “After receiving all of the n keys from the PUF based key generation system, at 404, the device manufacturer hashes all of the outputted n keys into a smaller device ID (id_D).”).
Koeberl does not explicitly teach but Tremlet teaches the following limitations -
transmit an indication of a public key corresponding to the private key (see para. [0029]; It is noted that the private key K can be used to compute an associated public key, Q=k*P where P an Q being points of an elliptic curve over GF(p), a prime field of order p.; See para. [0029]-[0030] for generating a certificate associated with the public key Q generated where the public key certificate is signed with a system private key (e.g. certification authority private key).; see Fig. 5 520 for certificate with device public key being transmitted to a public key requestor.); and
transmit signaling that is encrypted based at least in part on the private key associated with the memory system (see Fig. 5 steps 522 and 534; It is noted that during the signature verification process the private key K signed challenge is returned to the requestor in response to the challenge 522.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Koeberl and Tremlet before him or her, to modify the scheme of Koeberl by including Tremlet. The suggestion/motivation for doing so would have been to reliably authenticate asymmetric cryptography-based ICs based on Physically Unclonable Functions (PUFs) that are immune to reverse engineering.
Even though Tremlet teaches generating a seed to be used in the generation of public key, the combination of Koeberl and Tremlet does not explicitly teach the first key (e.g., symmetric key derived from the seed generated from using the SRAM-based PUF output) contributing to the generation of a private key and the following limitation “generate a private key, different from the first key, associated with the memory system based at least in part on the first key.”
However, Tuyls teaches the limitation “generate a private key, different from the first key, associated with the memory system based at least in part on the first key” (see page 23, line 32 through page 24 line 8, “The PUF allows extracting the second cryptographic key for use in, e.g., symmetric cryptography from the entropy contained in a device. This secret may also be used as a seed value. The computing device 100 may use that seed as a basis for private/public key generation. Computing device 100 may use all or part of the second cryptographic key as a seed, this avoids use of the seed derivation module 115. Key derivation module 125 is connected to an encryption module 120. Encryption module 120 is configured for encryption using the second encryption key as encryption key. Encryption module 120 is connected to key generator 110. Encryption module 120 takes as input the first cryptographic key and produces as output an encrypted first cryptographic key, encrypted with the second cryptographic key.”; The examiner notes that the key derivation module 125 coupled to encryption module 120 for encrypting first key (i.e, private key) using the second key (e.g., AES symmetric key) is disclosed in page 23, lines 18-32 is connected to PUF 150 for deriving a second cryptographic key. The examiner notes that the second cryptographic key may also be used as a seed value as a basis for private/public key generation…where the private key is the first key.; see page 22 line 34-page 23 line 8 “Connected to seed derivation module 115 or possibly directly with physically unclonable function 150 is key generator 110. Key generator 110 is configured to produce a first cryptographic key…to generate an RSA key.”; see also page 16 line 32 through page 17, line 4 for PUF based on SRAM characteristic behaviors).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Koeberl, Tremlet and Tuyls before him or her, to modify the scheme of Koeberl and Tremlet by including Tuyls. The suggestion/motivation for doing so would have been to cut recurring seed generation processing time between symmetric and asymmetric key generation modules from an output of Physically Unclonable Functions (PUFs) by sharing the seed generation module and further using the symmetric key as a seed for generating an asymmetric key.
As to claims 18 and 29, claims 18 and 29 include similar limitations as claim 1 and thus claims 18 and 29 is/are rejected under the same rationale as in claim 1.
As to claim 2, in view of claim 1, Koeberl teaches wherein, to read the set of uninitialized memory cells to obtain the first key, the controller is configured to cause the apparatus to:
sense, for each memory cell of the set of uninitialized memory cells, a respective uninitialized state of the memory cell; and determine, for each memory cell of the set of uninitialized memory cells, a respective logic value corresponding to the respective uninitialized state of the memory cell (see para. [0023] “[0023] Another PUF type is based on the power-up state of uninitialized six-transistor SRAM cells. The storage mechanism in an SRAM cell consists of four cross-coupled transistors that assume one of two stable states after power-up. Which state the cell enters is largely determined by the relative characteristics of the transistors, so any mismatch causes the cell to have a bias to one of the states. The mismatch is fixed at manufacturing time, resulting in a cell that tends to power up in the same state. The power-up behavior is random between cells, but robust for a single cell, resulting in a structure that is well suited for use as a PUF. The challenge in the case of an SRAM PUF can be considered to be a set of SRAM addresses, and the response the contents of those addresses post power-up.”), wherein the first key is based at least in part on a set of logic values that comprises the respective logic value for each memory cell of the set of uninitialized memory cells (see para. [0012]-[0057]; It is noted that the SRAM cell consisting of four cross-coupled transistors that assume one of two stable states after power-up gives rise to the set of logic values being used to generate n keys (i.e., first key).)
As to claims 19 and 30, claims 19 and 30 include similar limitations as claim 2 and thus claim 19 is rejected under the same rationale as in claim 2.
As to claims 4, 21, in view of claims 2, and 19, respectively, Koeberl teaches wherein the respective uninitialized state that is sensed for a memory cell of the set of uninitialized memory cells is based at least in part on one or more physical characteristics of the memory cell (see para. [0023] “[0023] Another PUF type is based on the power-up state of uninitialized six-transistor SRAM cells. The storage mechanism in an SRAM cell consists of four cross-coupled transistors that assume one of two stable states after power-up. Which state the cell enters is largely determined by the relative characteristics of the transistors, so any mismatch causes the cell to have a bias to one of the states. The mismatch is fixed at manufacturing time, resulting in a cell that tends to power up in the same state. The power-up behavior is random between cells, but robust for a single cell, resulting in a structure that is well suited for use as a PUF. The challenge in the case of an SRAM PUF can be considered to be a set of SRAM addresses, and the response the contents of those addresses post power-up.”; see also para. [0051] “After receiving all of the n keys from the PUF based key generation system, at 404, the device manufacturer hashes all of the outputted n keys into a smaller device ID (id_D).”).
As to claims 5, 22, in view of claims 4 and 21, respectively, Koeberl teaches wherein the one or more physical characteristics of the memory cell are based at least in part on one or more variations in a fabrication process for the memory cell (see para. [0020] “Silicon PUF implementations leverage the complementary metal-oxide-semiconductor (CMOS) manufacturing technology used to fabricate the majority of integrated circuits (ICs) today. Silicon PUFs exploit the uncontrollable manufacturing variations that are a result of integrated circuit fabrication processes.”).
As to claims 6, 23, in view of claims 2 and 19, respectively, Koeberl teaches wherein a set of uninitialized states for the set of uninitialized memory cells comprises a physical unclonable function for the memory system (see para. [0023] “[0023] Another PUF type is based on the power-up state of uninitialized six-transistor SRAM cells. The storage mechanism in an SRAM cell consists of four cross-coupled transistors that assume one of two stable states after power-up. Which state the cell enters is largely determined by the relative characteristics of the transistors, so any mismatch causes the cell to have a bias to one of the states. The mismatch is fixed at manufacturing time, resulting in a cell that tends to power up in the same state. The power-up behavior is random between cells, but robust for a single cell, resulting in a structure that is well suited for use as a PUF. The challenge in the case of an SRAM PUF can be considered to be a set of SRAM addresses, and the response the contents of those addresses post power-up.”; see also para. [0051] “After receiving all of the n keys from the PUF based key generation system, at 404, the device manufacturer hashes all of the outputted n keys into a smaller device ID (id_D).”). the set of uninitialized states comprising the respective uninitialized state for each memory cell of the set of uninitialized memory cells (see para. [0023] “Another PUF type is based on the power-up state of uninitialized six-transistor SRAM cells. The storage mechanism in an SRAM cell consists of four cross-coupled transistors that assume one of two stable states after power-up”).
As to claim 7, in view of claim 1, Tremlet teaches wherein the controller is further configured to cause the apparatus to:
generate a certificate associated with the memory system based at least in part on the public key (see Fig. 2, step 214 “Generate Public key certificate and sign with system private key.”; see para. [0030]-[0032]); and output an indication of the certificate (see Fig. 5 step 524 “K-Signed Challenge”; see para. [0054] “In response, host 504 sends challenge 522 (e.g., a random number) to circuit 400 to be signed with a private key generated by PUF circuit 402. Upon receipt of response 524 from circuit 400 to challenge 522, host 504 verifies signed challenge 524 with the public key of circuit 400 to authenticate circuit 400 or any device carrying circuit 400.”).
As to claim 24, claim 24 includes similar limitations as claim 7 and thus claim 24 is rejected under the same rationale as in claim 7.
As to claim 8, in view of claim 1, Tremlet teaches wherein the controller is further configured to cause the apparatus to: receive an identity verification request; and
transmit, in response to the identity verification request, a unique identifier for the memory system and a signature based at least in part on the private key (see Fig. 5, step 520 and 524; see para. [0053] and [0054]; see also Fig. 3 and para. [0033]-[0040]).
As to claim 25, claim 25 includes similar limitations as claim 8 and thus claim 25 is rejected under the same rationale as in claim 8.
As to claim 9, in view of claim 1, Tremlet teaches wherein the controller is further configured to cause the apparatus to: generate the public key based at least in part on the private key (see para. [0029]; It is noted that the private key K can be used to compute an associated public key, Q=k*P where P an Q being points of an elliptic curve over GF(p), a prime field of order p.).
As to claim 26, claim 26 includes similar limitations as claim 9 and thus claim 26 is rejected under the same rationale as in claim 9.
As to claims 10, 27, in view of claims 1, and 18, respectively, Tuyls teaches wherein the first key comprises a symmetric key (see page 23, line 32 through page 24 line 8, “The PUF allows extracting the second cryptographic key for use in, e.g., symmetric cryptography from the entropy contained in a device. This secret may also be used as a seed value. The computing device 100 may use that seed as a basis for private/public key generation. Computing device 100 may use all or part of the second cryptographic key as a seed, this avoids use of the seed derivation module 115. Key derivation module 125 is connected to an encryption module 120. Encryption module 120 is configured for encryption using the second encryption key as encryption key. Encryption module 120 is connected to key generator 110. Encryption module 120 takes as input the first cryptographic key and produces as output an encrypted first cryptographic key, encrypted with the second cryptographic key.”; The examiner notes that the key derivation module 125 coupled to encryption module 120 for encrypting first key (i.e, private key) using the second key (e.g., AES symmetric key) is disclosed in page 23, lines 18-32 is connected to PUF 150 for deriving a second cryptographic key. The examiner notes that the second cryptographic key may also be used as a seed value as a basis for private/public key generation…where the private key is the first key.; The examiner notes that the second key of Tuyls (e.g., AES key) is a symmetric key equivalent to the application’s first key.).
As to claims 11, 28, in view of claims 1 and 18, respectively, Koeberl teaches wherein the set of uninitialized memory cells comprises a set of static random-access memory cells (see para. [0023] “[0023] Another PUF type is based on the power-up state of uninitialized six-transistor SRAM cells. The storage mechanism in an SRAM cell consists of four cross-coupled transistors that assume one of two stable states after power-up. Which state the cell enters is largely determined by the relative characteristics of the transistors, so any mismatch causes the cell to have a bias to one of the states. The mismatch is fixed at manufacturing time, resulting in a cell that tends to power up in the same state. The power-up behavior is random between cells, but robust for a single cell, resulting in a structure that is well suited for use as a PUF. The challenge in the case of an SRAM PUF can be considered to be a set of SRAM addresses, and the response the contents of those addresses post power-up.”)
Claim(s) 3, 20, 31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koeberl, in view of Tremlet, in view of Tuyls, and further in view of Hamlet et al. (US 8,516,269 B1) hereinafter Hamlet.
As to claim 3, in view of claim 2, the combination of Koeberl,Tremlet and Tuyls does not explicitly teach but Hamlet teaches wherein the controller is further configured to cause the apparatus to: generate the first key based at least in part on a redundancy associated with the set of logic values (see col. 13, lines 4 through 30 “Instead of directly using the binding PUF value to seed the key generator 615, binding logic 210 can feed the binding PUF value (noisy) into noise reduction circuit 610, which is interposed between the key generator 615 and binding logic 210 to convert the noisy binding PUF value to a filtered binding PUF seed that is stable and repeatable. While it is desirable for a given PUF circuit 605 to output different, random values between different physical devices, it is not desirable for a given PUF circuit 605 of a single instance of hardware device 105 to output different values over its lifecycle (unless PUF perturbation devices 625 have been reprogrammed by the end user as part of a deliberate re-fingerprinting of hardware device 105). Thus, noise reduction circuit 610 operates to remove the uncertainty in the noisy binding PUF value, which may be caused by noisy PUF values from either or both of the internal and external PUF circuits. In one embodiment, noise reduction circuit 610 is implemented as a fuzzy extractor, which uses ECC techniques to remove undesirable variability. Operation of a fuzzy extractor implementation of noise reduction circuit 610 is discussed in detail in connection with FIGS. 7 and 8 below. Key generator 615 is coupled to receive a binding seed value, which is based on the binding PUF value combined from the internal and external PUF values from PUF circuit 605 and external PUF circuit 607. Key generator 615 uses the binding seed value to seed its encryption engine and generate a unique public-private key pair.”; see col. 14, lines 26-49; The repeatable value generation is being interpreted by the examiner as redundancy.), wherein the set of logic values comprises a greater quantity of bits than the first key (see col. 13, lines 25-30; It is noted that the noisy binding seed value being fed to noisy reduction circuit 610 is of 2474 bits in length as shown in Figs 6 and 7 and that the seed out of the noise reduction circuit 610 is 128 bits in length. It is noted that the seed of bit size of 128 is being fed to the key generator 615 in Fig. 6 which the examiner view its length not exceeding the binding PUF bit length of 2474 bits.)
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Koeberl, Tremlet Tuyls and Hamlet before him or her, to modify the scheme of Koeberl,Tremlet, and Tuyls by introducing Hamlet. The suggestion/motivation for doing so would have been to remove the intra-device uncertainty in the noisy binding PUF value by removing undesirable variability, as briefly discussed in Hamlet, col 6. Lines 38-52.
As to claims 20 and 31, claims 20 and 31 include similar limitations as claim 3 and thus claims 20 and 31 are rejected under the same rationale as in claim 3.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HEE K SONG whose telephone number is (571)270-3260. The examiner can normally be reached on M-F 9:00 am – 5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eleni Shiferaw can be reached on (571)272-3867 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-7291.
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/HEE K SONG/Primary Examiner, Art Unit 2497
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